CN106328701A - III-nitride HEMT device based on double-cap-layer structure and manufacturing method of device - Google Patents
III-nitride HEMT device based on double-cap-layer structure and manufacturing method of device Download PDFInfo
- Publication number
- CN106328701A CN106328701A CN201611043281.4A CN201611043281A CN106328701A CN 106328701 A CN106328701 A CN 106328701A CN 201611043281 A CN201611043281 A CN 201611043281A CN 106328701 A CN106328701 A CN 106328701A
- Authority
- CN
- China
- Prior art keywords
- cap
- layer
- quasiconductor
- hemt device
- iii
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 29
- 230000012010 growth Effects 0.000 claims description 36
- 239000000463 material Substances 0.000 claims description 26
- 150000004767 nitrides Chemical class 0.000 claims description 24
- 229910002601 GaN Inorganic materials 0.000 claims description 20
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 19
- 229910002704 AlGaN Inorganic materials 0.000 claims description 15
- 238000011065 in-situ storage Methods 0.000 claims description 15
- 229910017083 AlN Inorganic materials 0.000 claims description 14
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 14
- 238000002161 passivation Methods 0.000 claims description 14
- 230000001590 oxidative effect Effects 0.000 claims description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 229910052681 coesite Inorganic materials 0.000 claims description 4
- 229910052593 corundum Inorganic materials 0.000 claims description 4
- 229910052906 cristobalite Inorganic materials 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 229910052682 stishovite Inorganic materials 0.000 claims description 4
- 229910052905 tridymite Inorganic materials 0.000 claims description 4
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 4
- 238000006701 autoxidation reaction Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 12
- 230000008569 process Effects 0.000 abstract description 7
- 230000003647 oxidation Effects 0.000 abstract description 6
- 238000007254 oxidation reaction Methods 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 abstract description 5
- 238000000407 epitaxy Methods 0.000 abstract description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 24
- 230000004888 barrier function Effects 0.000 description 19
- 230000003064 anti-oxidating effect Effects 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000009825 accumulation Methods 0.000 description 6
- 230000008859 change Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- 241000196324 Embryophyta Species 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 108090000723 Insulin-Like Growth Factor I Proteins 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- 102000013275 Somatomedins Human genes 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- -1 aluminum gallium nitrides Chemical class 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000007773 growth pattern Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66431—Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a III-nitride HEMT device based on a double-cap-layer structure and a manufacturing method of the device. The HEMT device comprises an epitaxial layer, and a source electrode, a drain electrode and a grid electrode matched with the epitaxial layer. The epitaxial layer comprises a heterostructure comprising a first semiconductor and a second semiconductor formed on the first semiconductor. A first cap layer and a second cap layer are sequentially formed on the second semiconductor. The first cap layer can generate charge through an ionization donor to compensate for the surface acceptor level of the second semiconductor, and the second cap layer can reduce or prevent a natural oxidation layer and dangling bonds generated on the surface of the epitaxial layer. The double-cap-layer structure is arranged in the HEMT device structure, so current collapse of the device can be effectively inhibited, threshold stability of the device is greatly improved, and the high-performance III-nitride HEMT device is obtained. Meanwhile, the technical process is simple, cost is low, the requirement for secondary epitaxy does not exist, and the manufacturing method is compatible with an existing device manufacturing technology.
Description
Technical field
The present invention relates to a kind of HEMT device and preparation method thereof, realized by Double layer lid cap layer structure particularly to one
The method of high-performance III group-III nitride HEMT device, belongs to field of semiconductor manufacture.
Background technology
HEMT device be make full use of quasiconductor heterojunction structure formed two-dimensional electron gas and make, with III-VI
Race (such as AlGaAs/GaAs HEMT) compares, and III group-III nitride semiconductor is due to piezoelectric polarization and spontaneous polarization effect, heterogeneous
In structure (Heterostructure), such as: AlGaN/GaN, it is possible to form the two-dimensional electron gas of high concentration.So using III
In the HEMT device that group-III nitride is made, barrier layer is typically made without doping.III group-III nitride have big energy gap,
The features such as higher saturated electron drift velocity, high critical breakdown electric field and extremely strong capability of resistance to radiation, it is possible to the full next generation
The power electronic system requirement to the work of power device greater power, higher frequency, smaller volume and higher temperature.
But, III group-III nitride HEMT device still suffers from lot of challenges, such as: current collapse, and threshold value is stable and device
Reliability etc., current collapse refer to device after high pressure off-state stress, the phenomenon that the conducting resistance of device increases.The increasing of conducting resistance
Add the power consumption that can seriously increase device, even cannot realize the unlatching of device, and this phenomenon main cause is III race
Interfacial state the most serious in nitride HEMT device or surface state, when device is in OFF state, can produce more thermoelectron, heat
Electronics can be by the defect capture in interfacial state or surface state after producing, when device needs to be changed into ON state by OFF state, and device ditch
Electron concentration in road reduces due to the capture of defect, and capture and the release of this electronics are if it occur that side, meeting under the gate
The threshold voltage causing device changes, and affects the reliability of device.
For reducing the current collapse of device and improving the reliability of device, growth cap is effective means, example
As for AlGaN/GaN HEMT device, can pass through at one layer of GaN of AlGaN superficial growth, to prevent AlGaN surface
Oxidation, thus reduce device surface state.Or, it is possible to use the method for growth in situ SiN reduces the table of device further
Face state, and obtain relatively low interfacial state.But, traditional single cap structure still exists for the restriction of current collapse
Limitation, needs further to improve it.
Summary of the invention
Present invention is primarily targeted at offer a kind of III group-III nitride HEMT device based on Double layer lid cap layer structure and
Its manufacture method, to overcome deficiency of the prior art.
In order to realize aforementioned invention purpose, the technical solution used in the present invention includes:
The embodiment of the invention discloses a kind of III group-III nitride HEMT device based on Double layer lid cap layer structure, including extension
Layer and the source electrode coordinated with epitaxial layer, drain and gate, described epitaxial layer includes that heterojunction structure, described heterojunction structure include the
Semiconductor and the second quasiconductor being formed on the first quasiconductor, described second quasiconductor has the band being wider than the first quasiconductor
Gap；Further, described epitaxial layer also includes the first cap and the second cap being sequentially formed on the second quasiconductor, institute
State the first cap and can produce electric charge to compensate the surface acceptor level of described second quasiconductor by ionized donor, described the
Two cap can reduce or prevent described epi-layer surface from producing natural oxidizing layer and dangling bonds.
Preferably, donor charge density being subject at least close to described second quasiconductor that described first cap ionization produces
The main density of states.
The embodiment of the invention also discloses the making of a kind of III group-III nitride HEMT device based on Double layer lid cap layer structure
Method, forms, including growth, the epitaxial layer comprising heterojunction structure and makes grid, source electrode and the drain electrode coordinated with heterojunction structure,
Described heterojunction structure includes the first quasiconductor and the second quasiconductor being formed on the first quasiconductor, and described second quasiconductor has
It is wider than the band gap of the first quasiconductor；Further, described manufacture method also includes: form the process of described epitaxial layer in growth
In, on the second quasiconductor, growth forms the first cap and the second cap successively, and described first cap can ionize to be executed
The raw electric charge of main product is to compensate the surface acceptor level of described second quasiconductor, and described second cap can reduce or prevent described
Epi-layer surface produces natural oxidizing layer and dangling bonds.
Preferably, donor charge density being subject at least close to described second quasiconductor that described first cap ionization produces
The main density of states.
Compared with prior art, the present invention, can be effective by arranging Double layer lid cap layer structure in HEMT device structure
The current collapse of suppression device, can also be greatly improved the threshold stability of device simultaneously, really realizes the nitridation of high-performance III race
Thing HEMT device.
Accompanying drawing explanation
Fig. 1 is a kind of high-performance III group-III nitride based on Double layer lid cap layer structure in the present invention one typical embodiments
The schematic diagram of HEMT device；
Fig. 2 a is that a kind of existing HEMT device is transferred to the partial structurtes schematic diagram of conducting state by off state；
Fig. 2 b is that a kind of existing HEMT device is transferred to the partial structurtes schematic diagram of off state by conducting state；
Fig. 3 is the partial structurtes signal of a kind of HEMT device based on Double layer lid cap layer structure in one embodiment of the invention
Figure；
Fig. 4 is a kind of high-performance GaN/AlGaN HEMT device based on Double layer lid cap layer structure in one embodiment of the invention
Structural representation；
Description of reference numerals: 1 substrate, 2 channel layer gallium nitride, 3 two-dimensional electron gas, 4 space layer aluminium nitride,
5 barrier layer aluminum gallium nitrides, 6 N-shaped cap, 7 anti-oxidation cap, 8 source electrodes, 9 drain electrodes, 10 grids, 11 N-shapeds
The positive charge that cap ionizes out, 12 gate mediums, 13 non-highly doped cap gallium nitride, 14 as the first of channel layer
Quasiconductor, 15 as the second quasiconductor of barrier layer, 16 raceway groove depletion regions, 17 negative charge accumulation areas, 18 space layer.
Detailed description of the invention
In view of deficiency of the prior art, inventor, through studying for a long period of time and putting into practice in a large number, is proposed the present invention's
Technical scheme.This technical scheme, its implementation process and principle etc. will be further explained as follows.
A kind of based on Double layer lid cap layer structure the III group-III nitride HEMT device that the embodiment of the present invention provides, including extension
Layer and the source electrode coordinated with epitaxial layer, drain and gate, described epitaxial layer includes that heterojunction structure, described heterojunction structure include the
Semiconductor and the second quasiconductor being formed on the first quasiconductor, described second quasiconductor has the band being wider than the first quasiconductor
Gap.Further, described epitaxial layer also includes the first cap and the second cap being sequentially formed on the second quasiconductor, institute
State the first cap and can produce the positive charge surface acceptor level with described second quasiconductor of compensation by ionized donor, described
Second cap can reduce or prevent described epi-layer surface from producing natural oxidizing layer and dangling bonds.
The lexical or textual analysis of aforementioned dangling bonds is as follows: general crystal terminates suddenly in surface because of lattice, outermost on surface
Each atom will have a unpaired electronics, i.e. have a unsaturated key, and this key is referred to as dangling bonds.
Further, it is additionally provided with dielectric layer and/or passivation layer between described second cap and grid.
Preferably, the material of described dielectric layer or passivation layer includes aluminium oxide, aluminium nitride, silicon oxide or silicon nitride etc., and
It is not limited to this.
More preferred, the donor charge density that described first cap ionization produces is at 1E17cm-3To 1E20cm-3It
Between.
Further, described first cap is N-shaped cap.
Further, in described N-shaped cap the doping content of donor impurity at 1E17cm-3To 1E20cm-3Between.
More specifically, the density that described N-shaped cap produces positive charge by ionized donor at least needs close to barrier layer
15 acceptor state density.
Preferably, the thickness of described first cap existsAbove.
Further, the material of described first cap includes AlN, GaN, AlGaN, AlInN, InGaN or AlInGaN,
And it is not limited to this.
Aforementioned second cap also can be named as anti-oxidation cap.
Preferably, the thickness of described second cap existsAbove.
Further, the material of described second cap includes Si3N4、SiO2Or Al2O3, and it is not limited to this.
Further, the material of described first quasiconductor includes GaN, and is not limited to this.
Further, the material of described second quasiconductor includes AlxGa(1-x)N, 0 ＜ x≤1, and it is not limited to this.
Further, it is provided with space layer between described first quasiconductor and the second quasiconductor.
Further, the material of described space layer includes AlN；And/or, described second quasiconductor is formed with source electrode, drain electrode
Ohmic contact, and it is not limited to this.
The making side of a kind of based on Double layer lid cap layer structure the III group-III nitride HEMT device that the embodiment of the present invention provides
Method, forms, including growth, the epitaxial layer comprising heterojunction structure and makes grid, source electrode and the drain electrode coordinated with heterojunction structure, institute
Stating heterojunction structure and include the first quasiconductor and the second quasiconductor being formed on the first quasiconductor, described second quasiconductor has width
Band gap in the first quasiconductor.Further, described manufacture method also includes: during growth forms described epitaxial layer,
On the second quasiconductor, growth forms the first cap and the second cap successively, and described first cap can be produced by ionized donor
Raw positive charge to compensate the surface acceptor level of described second quasiconductor, described second cap can reduce or prevent described outside
Prolong layer surface and produce natural oxidizing layer and dangling bonds.
Further, described manufacture method also includes: use growth in situ (in-situ) mode to grow formation described the
One cap and/or the second cap.
More preferred, described first cap, the second cap all use in-situ mode to grow.
Further, described manufacture method includes: when on the second quasiconductor, growth forms the first cap, use non-
Deliberately described first cap is doped by the mode of doping or deliberately doping.
Further, the donor charge density that described first cap ionization produces is at 1E17cm-3To 1E20cm-3Between.
Further, described first cap is N-shaped cap.
Further, in described N-shaped cap the doping content of donor impurity at 1E17cm-3To 1E20cm-3Between.
More specifically, described N-shaped cap produces the density of positive charge at 1E17cm by ionized donor-3Extremely
1E20cm-3Between.
Preferably, the thickness of described first cap existsAbove.
Further, the material of described first cap includes AlN, GaN, AlGaN, AlInN, InGaN or AlInGaN,
And it is not limited to this.
Preferably, the thickness of described second cap existsAbove.
Further, the material of described second cap includes Si3N4、SiO2Or Al2O3, and it is not limited to this.
Further, the material of described first quasiconductor includes GaN, and is not limited to this.
Further, the material of described second quasiconductor includes AlxGa(1-x)N, 0 ＜ x≤1, and it is not limited to this.
Further, it is provided with space layer between described first quasiconductor and the second quasiconductor.
Further, the material of described space layer includes AlN, and is not limited to this.
Further, described second quasiconductor forms Ohmic contact with source electrode, drain electrode.
Further, described manufacture method also includes: form gate dielectric layer and/or passivation layer in the second cap,
Grid is made afterwards on described gate dielectric layer and/or passivation layer.
Further, the material of described dielectric layer or passivation layer includes aluminium oxide, aluminium nitride, silicon dioxide or silicon nitride,
And it is not limited to this.
Further, during growing described epitaxial layer, can be realized device by regulation and control epitaxial growth conditions
The clause of part properity.Wherein, in described epitaxial growth conditions includes the power of described epitaxial device, described epitaxial device
Air pressure, combination of gases in described epitaxial device, and any one in the growth frequency in described epitaxial device or two
Plant above combination, and be not limited to this.
In some of the present invention more in specific embodiment, a kind of high-performance III race based on Double layer lid cap layer structure
The manufacture method of nitride HEMT device may include that
S1, offer epitaxial growth sample, the epitaxial layer of described epitaxial growth sample includes；Mainly by as the of channel layer
Semiconductor 14 and the heterojunction structure of the second quasiconductor composition as barrier layer；
S2, on the second quasiconductor in-situ epitaxial growth N-shaped cap, its doping content can be by involuntary doping
Or deliberately doping is controlled, and at least needs close to barrier layer interface state density；
S3, in N-shaped cap the anti-oxidation cap of in-situ epitaxial growth so that in technical process later not
Natural oxidizing layer can be produced, the most later when growth gate medium or passivation layer, low interface state density can be obtained.
S4, proceed HEMT device processing technology, obtain high-performance III group-III nitride HEMT device, note at growth grid
Note in view of the etching perforate to anti-oxidation cap during perforate after medium or passivation layer.
Wherein, aforementioned anti-oxidation cap, N-shaped cap material can be as it was noted above, here is omitted.
Further, on the second quasiconductor during in-situ epitaxial growth N-shaped cap, its doping way is δ doping,
Facilitate controlled concentration and doping depth, but be not limited to this.
Further, described anti-oxidation cap and N-shaped cap all use in-situ mode to grow.
The present invention, can by growing the cap (the second cap) of anti-oxidation in the superiors of HEMT device epitaxial layer
Effectively to reduce the dangling bonds of epi-layer surface, later when growth gate medium or passivation layer, interface can be reduced further
Natural oxidizing layer and dangling bonds, it is thus achieved that the device architecture of interface state density.And, by raw in the lower section of anti-oxidation cap
Long N-shaped cap (the first cap), on the basis of can reducing dangling bonds reducing oxidation, utilizes the ionization of N-shaped cap
Produce donor charge, effective compensation barrier layer surface acceptor level, reduce acceptor's capture to electronics, by thus reduce electric current
Avalanche, improves threshold stability, further boost device performance simultaneously.
It addition, the method realizing high-performance III group-III nitride HEMT device by Double layer lid cap layer structure that the present invention provides
Process is simple, with low cost, without the requirement of secondary epitaxy, the highest with existing device fabrication compatibility, is beneficial to big rule
Mould is implemented.
Refer to shown in Fig. 1, in a typical embodiments of the present invention, a kind of high property based on Double layer lid cap layer structure
Can III group-III nitride HEMT device may include that main by the first quasiconductor 14 as channel layer with as the second of barrier layer
The heterojunction structure of quasiconductor 15 composition, and source 8, leakage 9, grid 10.Wherein, source, drain electrode are by being formed in heterojunction structure
Two-dimensional electron gas 3 electrically connects.
Further, anti-oxidation cap 7 and the bilayer of N-shaped cap 6 composition it are additionally provided with on described barrier layer 15
Cap structure.Wherein, this N-shaped cap 6 ionizable generation donor charge 11 (positive charge).On this Double layer lid cap layer structure
Also can be provided with gate dielectric layer 12, grid 10 is located at above gate dielectric layer.
Further, described second quasiconductor 15 forms Ohmic contact with source electrode 8 and drain electrode 9 metal.
Further, the N-shaped cap 6 in described Double layer lid cap layer structure is highly doped, and doping content at least needs to connect
Nearly barrier layer interface state density.
Further, space layer 18 can be provided with between the first quasiconductor 14 and the second quasiconductor 15.
In certain embodiments, aforementioned heterojunction structure can be by GaN and AlxGa(1-x)N (0 ＜ x≤1) quasiconductor forms, source
8, leak 9 electrodes and be positioned at AlxGa(1-x)N surface and being connected with two-dimensional electron gas by Ohmic contact, grid is located at source, drain electrode
Between, at grid 10 metal and AlxGa(1-x)The double-deck block of anti-oxidation cap 7 and N-shaped cap 6 is there is between N surface
Rotating fields, Double layer lid cap layer structure can reduce natural oxidizing layer and the dangling bonds at interface, to obtain interface state density, and
The donor charge 11 produced by N-shaped cap 6 ionization can reduce acceptor's capture to electronics with effective compensation acceptor level.
Below in conjunction with accompanying drawing and some exemplary embodiments, technical scheme is carried out clear, complete retouching
State.
As shown in Figure 2 a, in existing a kind of HEMT device (as a example by AlGaN/GaN device), current collapse phenomenon
Reason is: under device off state, can accumulate negative charge at grid 10 both sides AlGaN with gate dielectric layer 12 interface and be formed negative
Electric charge accumulating region 17, due to electrostatic induction effect, the two-dimensional electron gas of the negative charge meeting part depletion underlying channel region of accumulation, shape
Become raceway groove depletion region 16.When grid voltage rise, make device from OFF state to ON state change time, the electric charge of negative charge accumulation area due to
It is in deeper trap level, it is impossible to be released in time so that the two-dimensional electron gas in lower channels is still within part consumption
Most state, makes the device can not be fully on, causes conducting resistance to increase, increases over time, the electricity of negative charge accumulation area 17
Lotus is gradually released, and the two-dimensional electron gas of lower channels recovers so that device progressivelyes reach fully on.According to current research
Structure, the time that negative charge is released from deep energy level defect can reach microsecond to the magnitude of second.
Additionally, as shown in Figure 2 b, in existing HEMT device (as a example by AlGaN/GaN device), threshold value instability
Reason is: under device off state, below grid 10 two-dimensional electron gas by grid voltage control depleted, simultaneously interfacial state and lack
The electronics of capture in the acceptor level that causes such as fall into also to be released, be not filled with electrons.When grid voltage rises, and device is from OFF state
When conducting state is changed, below grid 10, two-dimensional electron gas is risen by grid voltage control, and grid lower channels turns on, and device is led
Logical, and under device on-state, the acceptor level caused due to interfacial state and defect etc. also captures electronics, is filled with electrons,
When grid voltage decline, make device from conducting state to OFF state change time, the electronics in acceptor state in grid lower barrierlayer is owing to being in
In deeper trap level, it is impossible to be released in time so that the two-dimensional electron gas in grid lower channel is the most depleted, threshold value occurs
Positive excursion, has a strong impact on the stability of device.
The defect existed in view of above-mentioned common HEMT device, inventor proposes technical scheme.
Please continue to refer to Fig. 1, during extension, at complete the first quasiconductor 14 as channel layer of substrate Epitaxial growth
After as the second quasiconductor 15 of barrier layer, in barrier layer N-shaped grown above cap 6, by involuntary doping or event
The mode of meaning doping, the density controlling the donor charge 11 that its ionization produces at least needs close to barrier layer acceptor state density, thus
Produce donor charge, effective compensation barrier layer surface acceptor level by the ionization of N-shaped cap, reduce acceptor and electronics is caught
Obtain；N-shaped cap continues the anti-oxidation cap 7 of epitaxial growth one layer, owing to whole epitaxial process is in-situ mode
Growth in situ, can effectively reduce oxidation and reduce dangling bonds, and in device fabrication later, for growth gate medium or
During passivation layer, contribute to obtaining the device architecture of interface state density, utilize the combination of two kinds of cap, effectively inhibit
The current collapse of device, improves the threshold stability of device simultaneously, it is achieved high-performance III group-III nitride HEMT device.
Refer to again shown in Fig. 3, for the HEMT device with Double layer lid cap layer structure a kind of in one embodiment of the invention
For part, under device off state, below grid 10, two-dimensional electron gas is controlled depleted by grid voltage, and the dangling bonds on surface
And the interfacial state that natural oxidizing layer causes is due to anti-oxidation cap 7 structure, has obtained obvious minimizing, and it causes
Acceptor level also due to N-shaped cap 6 ionizes produced donor charge 11 is compensated, negative charge accumulation area will not be formed,
When grid voltage rise, device from OFF state to conducting state change time, below grid 10, two-dimensional electron gas is risen, grid by grid voltage control
Pole lower channels conducting, break-over of device, owing to there is not the electric charge being in trap level, the two-dimensional electron gas in lower channels is complete
Full conducting, does not exists or largely reduces current collapse；Meanwhile, and due to interfacial state the acceptor level caused is always by n
Type cap 6 ionizes produced donor charge 11 and is compensated, and when grid voltage declines, makes device change to OFF state from conducting state
Time, the acceptor level that under grid, two-dimensional electron gas is not caused by interfacial state is affected so that the Two-dimensional electron in grid lower channel
Gas normally exhausts, and threshold value is not drifted about, and improves the stability of device.
Above technical solution of the present invention is summarized, in order to be the public's actual application of being better understood on the present invention
It is worth, as a example by HEMT device based on AlGaN/GaN hetero-junctions, technical scheme is expanded on further below.
The manufacture method of a kind of based on AlGaN/GaN hetero-junctions the HEMT device in this embodiment may include that
Referring to shown in Fig. 4, the initial epitaxial layer structure of this HEMT device includes the channel layer 2 on substrate 1, space layer 4
With barrier layer 5.Certainly, actual epitaxial layer structure may also include other epitaxial structures, as nucleating layer, resistive formation and transition zone etc. are tied
Structure (not shown), is formed with two-dimensional electron gas 3 in epitaxial layer structure.
Afterwards, one layer of doped n-type cap 6 of in-situ epitaxial growth on initial epitaxial layer sheet, its doping way can
With but be not limited to δ doping, control its doping content so that it is be not more than ± 40% with the deviation range of barrier layer interface state density,
Donor charge is produced by the ionization of N-shaped cap, effective compensation barrier layer surface acceptor level, the N-shaped cap of growth
Material can be AlGaN, but is not limited to this.
Further, N-shaped cap continues the anti-oxidation cap 7 of epitaxial growth one layer, due to whole epitaxial process
Being the growth in situ of in-situ mode, can effectively reduce oxidation and reduce dangling bonds, the anti-oxidation cap of growth can be
Si3N4Deng, but it is not limited to this.
In-situ extension makes source electrode 8 and drain electrode 9 on the surface of sample, first in sample surfaces spin coating photoetching after terminating
Glue, then by the mask plate of design and photoetching technique sample surfaces formed source, drain electrode graphical, afterwards it is noted that to anti-
The etching perforate of oxidation cap, utilizes photoresist to make mask, and its etching mode can be, but not limited to RIE, then redeposited gold
Belong to, be typically chosen the multilamellars such as titanium deposition, aluminum, nickel, gold (Ti, Al, Ni, Au, thickness is respectively 20nm, 130nm, 50nm, 150nm)
Metal, by clean for the metal-stripping outside source, drain electrode after metal deposit, then carries out short annealing, and condition is 890 DEG C of annealing 30
Second, after annealing, source electrode 8 is connected with two-dimensional electron gas 3 with drain electrode 9.
Then at sample surfaces somatomedin layer 12, its growth pattern can be, but not limited to Plasma Enhanced Chemical Vapor and sinks
Long-pending (PECVD), ald (ALD), low-pressure chemical vapor deposition (LPCVD) and inductively coupled plasma chemical gaseous phase are sunk
Amass and wait conventional semiconductor deposition techniques.The medium of deposition is optional but is not limited to aluminium oxide, aluminium nitride, silicon oxide and silicon nitride etc.
Dielectric film conventional in quasiconductor.Now due to the existence of anti-oxidation cap, the natural oxidizing layer on surface reduces, with before
The interface of dielectric layer and barrier layer, it is possible to obtain lower interface state density.
The figure of grid metal is formed again by the method for photoetching, in barrier layer etch areas upper of sample after having deposited
Side's deposition grid metal and stripping technology, form grid 10, finally etched by the dielectric layer in source, drain electrode clean.Grid metal is general
Selecting Ni, Au, thickness is respectively 50nm, 150nm.
Referring to shown in Fig. 4, the high-performance MISHEMT device realized by aforementioned manufacture method includes source 8, leakage 9, grid again
Pole 10, gate medium 12 and heterojunction structure, source 8, leaked 9 electrodes and electrically connected by the two-dimensional electron gas 3 being formed in heterojunction structure,
Heterojunction structure is by GaN and AlxGa(1-x)N quasiconductor forms, and source, drain electrode are positioned at N-shaped cap gallium nitride 6 surface and pass through Europe
Nurse contact is connected with two-dimensional electron gas 3, and grid 24 is located between source, drain electrode, at gate metal and N-shaped cap gallium nitride 6
There is gate medium 12 between surface, form MISHEMT structure, and contact with semiconductor surface formation Xiao Jite.
The operation principle of high-performance MISHEMT device that the present invention realizes is: under device off state, grid 10 times
Side's two-dimensional electron gas is controlled depleted by grid voltage, and the interfacial state that the dangling bonds on surface and natural oxidizing layer cause is owing to preventing
Oxidation cap 7 structure, has obtained obvious minimizing, and its acceptor level caused is also due to N-shaped cap 6 ionizes produced
Donor charge 11 is compensated, substantially without forming negative charge accumulation area, when grid voltage rises, and device is changed to conducting state from OFF state
Time, below grid 10, two-dimensional electron gas is risen by grid voltage control, owing to there's almost no the electric charge being in trap level, and lower section
Two-dimensional electron gas in raceway groove can be fully on, break-over of device, does not exist or largely reduces current collapse；Meanwhile,
And the acceptor level caused due to interfacial state is ionized produced donor charge 11 by N-shaped cap 6 and compensates, and works as grid voltage always
Decline, make device from conducting state to OFF state change time, the acceptor level that under grid, two-dimensional electron gas is not caused by interfacial state
Impact so that the two-dimensional electron gas in grid lower channel normally exhausts, and threshold value is not drifted about, improve device stability.
The technology contents of the present invention and technical characteristic have revealed that as above, but those of ordinary skill in the art still may base
All replacements without departing substantially from spirit of the present invention and modification, therefore, scope is made in teachings of the present invention and announcement
The content disclosed in embodiment should be not limited to, and the various replacement without departing substantially from the present invention and modification should be included, and be this patent Shen
Please claim be contained.
Claims (10)
1. an III group-III nitride HEMT device based on Double layer lid cap layer structure, including epitaxial layer and coordinates with epitaxial layer
Source electrode, drain and gate, described epitaxial layer includes that heterojunction structure, described heterojunction structure include the first quasiconductor and be formed at first
The second quasiconductor on quasiconductor, described second quasiconductor has the band gap being wider than the first quasiconductor；It is characterized in that: outside described
Prolonging the first cap and the second cap that layer also includes being sequentially formed on the second quasiconductor, described first cap can be led to
Cross ionized donor produce electric charge with compensate described second quasiconductor surface acceptor level, described second cap can reduce or
Prevent described epi-layer surface from producing natural oxidizing layer and dangling bonds.
III group-III nitride HEMT device based on Double layer lid cap layer structure the most according to claim 1, it is characterised in that: institute
State and between the second cap and grid, be additionally provided with dielectric layer and/or passivation layer；Preferably, described dielectric layer or the material of passivation layer
Matter includes aluminium oxide, aluminium nitride, silicon oxide or silicon nitride.
III group-III nitride HEMT device based on Double layer lid cap layer structure the most according to claim 1, it is characterised in that: institute
State the donor charge density of the first cap ionization generation at 1E17cm-3To 1E20cm-3Between；And/or, described first block
Layer is N-shaped cap；Preferably, in described N-shaped cap the doping content of donor impurity at 1E17cm-3To 1E20cm-3It
Between；Preferably, the thickness of described first cap existsAbove；Preferably, the material of described first cap include AlN,
GaN, AlGaN, AlInN, InGaN or AlInGaN.
III group-III nitride HEMT device based on Double layer lid cap layer structure the most according to claim 1, it is characterised in that: institute
The thickness stating the second cap existsAbove；Preferably, the material of described second cap includes Si3N4、SiO2Or Al2O3。
III group-III nitride HEMT device based on Double layer lid cap layer structure the most according to claim 1, it is characterised in that: institute
The material stating the first quasiconductor includes GaN；And/or, the material of described second quasiconductor includes AlxGa(1-x)N, 0 ＜ x≤1；With/
Or, it is provided with space layer between described first quasiconductor and the second quasiconductor；Preferably, the material of described space layer includes AlN；
And/or, described second quasiconductor forms Ohmic contact with source electrode, drain electrode.
6. a manufacture method for III group-III nitride HEMT device based on Double layer lid cap layer structure, comprises different including growth formation
The epitaxial layer of matter structure and make grid, source electrode and the drain electrode coordinated with heterojunction structure, described heterojunction structure includes the first half
Conductor and the second quasiconductor being formed on the first quasiconductor, described second quasiconductor has the band gap being wider than the first quasiconductor；
It is characterized in that, described manufacture method also includes: during growth forms described epitaxial layer, on the second quasiconductor successively
Growth forms the first cap and the second cap, and described first cap can produce electric charge to compensate described the by ionized donor
The surface acceptor level of two quasiconductors, described second cap can reduce or prevent described epi-layer surface from producing autoxidation
Layer and dangling bonds.
Manufacture method the most according to claim 6, it is characterised in that including: use growth in situ mode to grow formation described
First cap and/or the second cap.
Manufacture method the most according to claim 6, it is characterised in that including: growth forms the first lid on the second quasiconductor
During cap layers, use the mode of involuntary doping or deliberately doping that described first cap is doped.
Manufacture method the most according to claim 6, it is characterised in that including: the alms giver that described first cap ionization produces
Charge density is at 1E17cm-3To 1E20cm-3Between；And/or, described first cap is N-shaped cap；Preferably, described n
In type cap, the doping content of donor impurity is at 1E17cm-3To 1E20cm-3Between；Preferably, the thickness of described first cap
SpendAbove；Preferably, the material of described first cap include AlN, GaN, AlGaN, AlInN, InGaN or
AlInGaN；And/or, the thickness of described second cap existsAbove；Preferably, the material of described second cap includes
Si3N4、SiO2Or Al2O3；And/or, the material of described first quasiconductor includes GaN；And/or, the material of described second quasiconductor
Including AlxGa(1-x)N, 0 ＜ x≤1；And/or, it is provided with space layer between described first quasiconductor and the second quasiconductor；Preferably
, the material of described space layer includes AlN；And/or, described second quasiconductor forms Ohmic contact with source electrode, drain electrode.
Manufacture method the most according to claim 6, it is characterised in that also include: form gate medium in the second cap
Layer and/or passivation layer, make grid afterwards on described gate dielectric layer and/or passivation layer；Preferably, described dielectric layer or passivation
The material of layer includes aluminium oxide, aluminium nitride, silicon oxide or silicon nitride.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611043281.4A CN106328701A (en) | 2016-11-24 | 2016-11-24 | III-nitride HEMT device based on double-cap-layer structure and manufacturing method of device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611043281.4A CN106328701A (en) | 2016-11-24 | 2016-11-24 | III-nitride HEMT device based on double-cap-layer structure and manufacturing method of device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106328701A true CN106328701A (en) | 2017-01-11 |
Family
ID=57817564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611043281.4A Pending CN106328701A (en) | 2016-11-24 | 2016-11-24 | III-nitride HEMT device based on double-cap-layer structure and manufacturing method of device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106328701A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110767746A (en) * | 2019-10-28 | 2020-02-07 | 北京华进创威电子有限公司 | HEMT structure with in-situ grown dielectric layer as cap layer and manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103022105A (en) * | 2011-09-27 | 2013-04-03 | 富士通株式会社 | Semiconductor device and method for manufacturing semiconductor device |
| US20140080277A1 (en) * | 2006-09-29 | 2014-03-20 | Fujitsu Limited | Compound semiconductor device and manufacturing method thereof |
| CN104183638A (en) * | 2013-05-27 | 2014-12-03 | 富士通株式会社 | Semiconductor device and method of manufacturing semiconductor device |
-
2016
- 2016-11-24 CN CN201611043281.4A patent/CN106328701A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140080277A1 (en) * | 2006-09-29 | 2014-03-20 | Fujitsu Limited | Compound semiconductor device and manufacturing method thereof |
| CN103022105A (en) * | 2011-09-27 | 2013-04-03 | 富士通株式会社 | Semiconductor device and method for manufacturing semiconductor device |
| CN104183638A (en) * | 2013-05-27 | 2014-12-03 | 富士通株式会社 | Semiconductor device and method of manufacturing semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110767746A (en) * | 2019-10-28 | 2020-02-07 | 北京华进创威电子有限公司 | HEMT structure with in-situ grown dielectric layer as cap layer and manufacturing method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6999197B2 (en) | Group III nitride enhancement type HEMT based on the composite barrier layer structure and its manufacturing method | |
| JP4179539B2 (en) | Compound semiconductor device and manufacturing method thereof | |
| US11888052B2 (en) | Semiconductor device and manufacturing method thereof employing an etching transition layer | |
| JP6522102B2 (en) | Field effect diode and method of manufacturing the same | |
| JP5190923B2 (en) | Nitride semiconductor transistor having GaN as channel layer and manufacturing method thereof | |
| JP5367429B2 (en) | GaN-based field effect transistor | |
| JP2010153837A (en) | GaN-BASED FIELD-EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME | |
| JP5003813B2 (en) | Semiconductor device and manufacturing method thereof | |
| JP2010192633A (en) | METHOD FOR MANUFACTURING GaN-BASED FIELD-EFFECT TRANSISTOR | |
| CN106033724A (en) | III-family nitride reinforced HEMT and preparation method thereof | |
| JP2010166027A (en) | GaN-BASED FIELD-EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME | |
| WO2015077916A1 (en) | Gan-based schottky barrier diode rectifier | |
| CN102916046A (en) | Nitride high-voltage device on silicon substrate and manufacturing method thereof | |
| CN108598149A (en) | A kind of GaN base HEMT device | |
| CN106920833A (en) | Semiconductor devices and its manufacture method | |
| CN111081763B (en) | Normally-off HEMT device with honeycomb groove barrier layer structure below field plate and preparation method thereof | |
| CN114899227A (en) | Enhanced gallium nitride-based transistor and preparation method thereof | |
| WO2020181548A1 (en) | Gan-based super-junction vertical power transistor and manufacturing method therefor | |
| CN112018176A (en) | Semiconductor device and manufacturing method thereof | |
| CN109860290A (en) | A kind of high electron mobility transistor and preparation method thereof | |
| CN211045445U (en) | Vertical conduction gallium nitride power diode | |
| CN114883407B (en) | HEMT based on Fin-FET gate structure and manufacturing method thereof | |
| CN106449746A (en) | GaN HEMT (High Electron Mobility Transistor) capable of improving current collapse effect | |
| CN116344586A (en) | Folded channel gallium nitride-based field effect transistor and preparation method thereof | |
| CN110556431A (en) | Vertical conduction gallium nitride power diode and preparation method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170111 |