CN106301241A - Charge-domain voltage signal amplifying circuit and use the testing circuit of this amplifying circuit - Google Patents
Charge-domain voltage signal amplifying circuit and use the testing circuit of this amplifying circuit Download PDFInfo
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- CN106301241A CN106301241A CN201610717387.1A CN201610717387A CN106301241A CN 106301241 A CN106301241 A CN 106301241A CN 201610717387 A CN201610717387 A CN 201610717387A CN 106301241 A CN106301241 A CN 106301241A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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Abstract
The invention provides a kind of novel voltage small signal amplification circuit and replace the voltage small signal amplification circuit based on amplifier of high power consumption, described charge-domain voltage small signal amplification circuit includes: two charge-storage node, the electric charge transmission that one is connected between two charge-storage node controls switch, it is connected to the first electric capacity of the first charge-storage node, it is connected to the capacitance programmable capacitor of the second charge-storage node, it is connected to the first voltage transmitting switch of the first charge-storage node, it is connected to the second voltage transmitting switch of the first charge-storage node, it is connected to the tertiary voltage transmitting switch of the second charge-storage node and is connected to the 4th voltage transmitting switch of the second charge-storage node.This charge-domain voltage small signal amplification circuit can be widely applied in detection and the amplification system of all kinds of voltage signal.
Description
Technical field
The present invention relates to a kind of small signal process circuit, a kind of use the little of charge-domain signal processing technology
Signal amplification circuit.
Background technology
Along with the development of Digital Signal Processing, the digitized of electronic system and integrated be inexorable trend.Appoint
In what electronic system, it is all important step that the detection of simulation small-signal is amplified, the raising day by day required along with energy-conserving and environment-protective, little letter
Number detection amplification treatment circuit energy consumption should also be as optimizing further, especially in portable terminal product, its power consumption should be
Littleization.
Existing small signal amplification circuit is based primarily upon operational amplifier, has in-phase input end and inverting input, input
End polarity and outfan be same polarity be exactly in-phase amplifier, the polarity of input and outfan opposite polarity are then
It is referred to as inverting amplifier.Be illustrated in figure 1 common voltage inverting amplifier circuit because amplifier input terminal voltage is zero, again because of
For in-phase input end ground connection, it follows that inverting input is the most also ground connection.This means that all of input voltage
Vi is connected across resistor R1 two ends, and all output voltage Vo are connected across resistor R2 two ends.Therefore, the electricity of inverting input is flowed into
Stream sum is Vi/R1+Vo/R2=0 i.e. Vo=-R2/R1*Vi.Therefore, voltage gain is G=-(R2/R1), i.e. feedback resistor
Resistance divided by the negative value of the resistance of input resistor.Fig. 2 show the conventional voltage detecting with bigger amplification and puts
Big circuit theory diagrams, use circuits cascading shown in two-stage Fig. 1 to form, and voltage gain is G=(R2/R1)2。
The work of above-mentioned voltage amplification detection amplifying circuit is completely dependent on the negative feedback with operational amplifier to ensure signal
The speed amplified, for ideal operational amplifier, amplifying circuit precision depends on the ratio of resistance R2/R1.In side circuit, the increasing of amplifier
Benefit and bandwidth are all limited, and this depends on the gain bandwidth product of amplifier, and high-gain big bandwidth discharge circuit needs substantial amounts of
Power dissipation overhead, therefore design novel voltage small signal amplification circuit replaces voltage low level signal amplification based on the amplifier electricity of high power consumption
There is realistic meaning on road very much.
Summary of the invention
It is an object of the invention to overcome the deficiencies in the prior art, it is provided that a kind of do not use the novel of high-gain amplifier
Low power consumption voltage small signal amplification circuit.
The purpose of the present invention can be achieved through the following technical solutions:
A kind of charge-domain voltage small signal amplification circuit, is characterized in that: include two charge-storage node, one be connected to
Electric charge transmission between two charge-storage node controls switch, is connected to the first electric capacity of the first charge-storage node, connection
To the second charge-storage node capacitance programmable capacitor, be connected to the first charge-storage node the first voltage transmitting switch,
The the second voltage transmitting switch being connected to the first charge-storage node, the tertiary voltage transmission being connected to the second charge-storage node
Switch and be connected to the 4th voltage transmitting switch of the second charge-storage node；
The annexation of described charge-domain voltage small signal amplification circuit is: one end of the first electric capacity is connected to the first electric charge
Memory node, the other end is connected to electric charge transmission and controls clock Clk；One end of capacitance programmable capacitor is connected to the second electric charge and deposits
Storage node, the other end is connected to electric charge transmission and controls clock Clkn；Electric charge transmission controls the control end of switch and is connected to transmission letter
Number Clkt, electric charge transmission controls switch ends and is connected to the first and second charge-storage node；The one of first voltage transmitting switch
End is connected to the first charge-storage node, and the other end is connected to reference voltage 1, and switch controlling signal meets Clkr；Second voltage passes
One end of defeated switch is connected to the first charge-storage node, and the other end is connected to input voltage Vi, and switch controlling signal meets Clks；
One end of tertiary voltage transmitting switch is connected to the second charge-storage node, and the other end is connected to reference voltage 2, and on-off control is believed
Number meet Clkr；One end of 4th voltage transmitting switch is connected to the second charge-storage node, and the other end is connected to output voltage Vo,
Switch controlling signal meets Clkt.
Described charge-domain voltage small signal amplification circuit, is characterized in that: complete primary voltage amplify after, output voltage with
The relation of input voltage be amplification coefficient be-C302/C305Linear relationship, wherein: C302And C305It is respectively the first electric capacity and appearance
The capacitance of value programmable capacitor.
A kind of circuit using charge-domain voltage small signal amplification circuit to carry out signal detection, is characterized in that including: sensing
Device, charge-domain voltage small signal amplification circuit, analog-digital converter and control circuit；Described use charge-domain voltage low level signal amplification
Circuit carries out its annexation of circuit of signal detection: the output voltage of sensor is connected to charge-domain voltage low level signal amplification
The input voltage port of circuit, the output voltage port of charge-domain voltage small signal amplification circuit is connected to the mould of analog-digital converter
Intending voltage input end mouth, the quantization code outfan of analog-digital converter is connected to the digital code input of control circuit, control circuit
The first control signal produce port output clock Clkr to the Clkr input end of clock of charge-domain voltage small signal amplification circuit
Mouthful, the second control signal of control circuit produces the port output clock Clks Clks to charge-domain voltage small signal amplification circuit
Input end of clock mouth, the 3rd control signal of control circuit produces port output clock Clk to charge-domain voltage low level signal amplification
The Clk input end of clock mouth of circuit, the 4th control signal of control circuit produces port output clock Clkn to charge-domain voltage
The Clkn input end of clock mouth of small signal amplification circuit, the 5th control signal of control circuit produces port output clock Clkt and arrives
The Clkt input end of clock mouth of charge-domain voltage small signal amplification circuit and the data output control terminal of analog-digital converter.
A kind of using method using charge-domain voltage small signal amplification circuit to carry out signal detection, is characterized in that: first
First control signal of control circuit produces port output clock Clkr and controls the state of charge-domain voltage small signal amplification circuit
Reset；Secondly, the second control signal of control circuit produces port output clock Clks control charge-domain voltage small-signal
Sensor input voltage signal is sampled by amplifying circuit；Again, the 4th and the 4th control signal of control circuit produces end
Mouth output clock Clk and Clkn simultaneously controls charge-domain voltage small signal amplification circuit and puts the voltage signal obtained of sampling
Obtain greatly output voltage；Finally, the 5th control signal of control circuit produces port output clock Clkt control charge-domain voltage
Output voltage is exported to analog-digital converter by small signal amplification circuit, and the 5th control signal of control circuit produces port simultaneously also
Output clock Clkt controls analog-digital converter and the voltage received carries out analog digital conversion the quantization code output that will be converted to
Digital code input to control circuit.
The invention have the advantage that designed small signal amplification circuit does not use high-gain amplifier, there is low-power consumption and height
Speed feature.
Accompanying drawing explanation
Fig. 1 is that existing voltage small-signal detects amplifying circuit principle schematic.
Fig. 2 is the voltage small-signal detection amplifying circuit principle schematic of existing cascade form.
Fig. 3 is charge-domain voltage small signal amplification circuit schematic diagram of the present invention.
Fig. 4 is charge-domain voltage small signal amplification circuit working waveform figure of the present invention.
Fig. 5 is that the present invention uses charge-domain voltage small signal amplification circuit to carry out the circuit block diagram of signal detection.
Detailed description of the invention
Below in conjunction with accompanying drawing, the preferred embodiment of the invention is described in detail.
Fig. 3 is charge-domain voltage small signal amplification circuit schematic diagram of the present invention.Charge-domain voltage small signal amplification circuit bag
Include: two charge-storage node Ni and No, an electric charge transmission being connected between two charge-storage node control switch
301, the first electric capacity 302 being connected to the first charge-storage node Ni, the capacitance being connected to the second charge-storage node No can be compiled
Journey electric capacity 305, be connected to the first charge-storage node Ni the first voltage transmitting switch 303, be connected to first electric charge storage joint
The second voltage transmitting switch 304 of some Ni, the tertiary voltage transmitting switch 307 being connected to the second charge-storage node No and connection
The 4th voltage transmitting switch 306 to the second charge-storage node No.
The annexation of foregoing circuit is: one end of the first electric capacity is connected to the first charge-storage node, and the other end connects
Clock Clk is controlled to electric charge transmission；One end of capacitance programmable capacitor 305 is connected to the second charge-storage node, and the other end is even
Receive electric charge transmission and control clock Clkn；Electric charge transmission controls the control end of switch and is connected to transmit signal Clkt, and electric charge transmits
Control switch ends and be connected to the first and second charge-storage node Ni and No；One end of first voltage transmitting switch 303 connects
To the first charge-storage node, the other end is connected to reference voltage 1Vr1, and switch controlling signal meets Clkr；Second voltage transmission is opened
The one end closing 304 is connected to the first charge-storage node, and the other end is connected to input voltage Vi, and switch controlling signal meets Clks；
One end of tertiary voltage transmitting switch 307 is connected to the second charge-storage node, and the other end is connected to reference voltage 2Vr2, switch
Control signal meets Clkr；One end of 4th voltage transmitting switch 306 is connected to the second charge-storage node, and the other end is connected to defeated
Going out voltage Vo, switch controlling signal meets Clkt.
This charge-domain voltage small signal amplification circuit work wave schematic diagram is as shown in Figure 4.Controlling clock Clk and Clkn is
Opposite in phase clock, switch controlling signal Clkr, Clks and Clkt are that phase place does not overlap clock.Before the t0 moment, the first He
Store the most independent electric charge, all voltage transmitting switches and electric charge transmission control in second charge-storage node Ni and No to open
Pass is in closed mode, and circuit is in not actuated.
When the t0 moment arrives, the state of Clkr changes, and Clkr is switched to high level by low level, and the first voltage passes
Defeated switch 303 and tertiary voltage transmitting switch 307 turn on；First charge-storage node Ni is reset to by the first voltage transmitting switch
Reference voltage 1Vr1；Second charge-storage node No is reset to reference voltage 2Vr2 by tertiary voltage transmitting switch.
When the t1 moment arrives, the state of Clkr and Clks changes, and Clkr becomes low level, Clks by low level to
High level switches；First voltage transmitting switch 303 and tertiary voltage transmitting switch 307 turn off, and the second voltage transmitting switch 304 is led
Logical；First charge-storage node Ni is connected to input voltage Vi by the second voltage transmitting switch；Second charge-storage node No is protected
Hold Vr2 constant.
When the t2 moment arrives, the state controlling clock Clks, Clk and Clkn changes, and Clks becomes low level,
Clkn is switched to high level by low level, and Clk is switched to low level by high level, now owing to connecting in each charge-storage node
Electric capacity 302 and 305 on stored electric charge will not undergo mutation, the voltage in the first and second charge-storage node Ni and No is just
Spline smoothing can occur, and the voltage in the first charge-storage node Ni is pulled low, and the voltage in the second charge-storage node No
It is driven high, owing to there is not path of releasing in the electric charge in now the first and second charge-storage node Ni and No, first and second
Voltage in charge-storage node Ni and No will keep constant and there is an obvious voltage difference.
When the t3 moment arrives, electric charge transmission controls the switch controlling signal Clkt of switch and becomes high level, and electric charge transmits
Control switch 301 conducting, just there is a charge discharging resisting path between the first and second charge-storage node Ni and No, due to this
Time the first and second charge-storage node Ni and No on voltage exist obvious voltage difference, i.e. a VNiLess than VNo, this voltage
The existence of difference can cause producing between the first and second charge-storage node Ni and No induced electric field, causes the first and second electric charges
On memory node Ni and No, the electric charge of storage shifts under the effect of induced electric field, it is assumed that electric charge is transported as electrons
Dynamic, then the direction of motion of electronics is to the second electric charge storage joint No motion by the first charge-storage node Ni, causes the first electric charge
The voltage of memory node Ni raises, and the voltage of the second electric charge storage joint No reduces, along with the constantly transfer two electric charge storage of electric charge
Voltage difference between node constantly reduces, and causes the induced electric field between the first and second charge-storage node Ni and No gradually to subtract
Little, electric charge transfer velocity constantly reduces, and voltage changing rate also decreases, if electric charge transmission control switch 301 is constantly on,
Then this electric charge transference process will be continued for, until the voltage phase between the first and second charge-storage node Ni and No
Deng, induced electric field is 0.
Along with the arrival in t4 moment, Clkt becomes low level, and electric charge transmission controls switch 301 shutoff, the first and second electricity
There is charge discharging resisting path between lotus memory node Ni and No to be disconnected, between the first and second charge-storage node Ni and No
Electric charge transfer end-of-job.Owing to there is not path of releasing, the voltage in the first and second charge-storage node Ni and No will be protected
Hold constant.Electric charge is completed to the transmission work of the second charge-storage node No by the first charge-storage node Ni.
In said process, if not loss in charge transfer process, it is assumed that the first electric capacity and the electricity of capacitance programmable capacitor
Capacitance is respectively C302And C305, then the electric charge flowing out the first charge-storage node Ni is Qi=C302* Δ Vi, injects the second electric charge
The electric charge of memory node No is Qo=C305* Δ Vo, and have Qi=C302* Δ Vi=Qo=C305*ΔVo.Fixed according to charge conservation
Reason, t1To t4Between electric charge effectively transmit, calculate C302On the charge Q that spreads out ofS。
QS=C305·(Vo-VP)=[(Vr1-Vi)-(VS-VL)]·C302 (1)
After collated, can obtain:
QS=-Vi·C302+QT (2)
Wherein, QT=(VL+Vr1-VS)·C302, VL、VPAnd VSIt is fixed voltage, VLFor the voltage of Ni point before the t3 moment,
VPFor the voltage of No point before the t3 moment；VSVoltage for t4 moment Ni point.After circuit complete design, ignore reference voltage and become
Change the disturbance brought, QTIt it is a constant.Due to QS=C302* Δ Vi=C305* Δ Vo, then have:
In formula (3), Section 1 is capacitance ratio linear relationship, and latter two are fixed value.It can be seen that voltage transmission
After completing, the relation of output voltage and input voltage be amplification coefficient be-C302/C305Linear relationship.I.e. output voltage becomes
The ratio of change amount and input voltage variable quantity is the ratio of the capacitance of the first electric capacity and capacitance programmable capacitor, by arranging two
Capacitance ratio is i.e. accurately controlled the output voltage signal amplification to input voltage signal.And if electric charge is with positive charge
Form is transmitted, and only need to be changed in voltage difference direction between electric charge transmission node in charge transfer process.
Q after circuit shown in Fig. 3 is carried out differential process, in formula (2)TTo be eliminated, obtain following formula:
QS,diff=-[Vin-Vip]·C302 (4)
VNon-VNop=-[Vin-Vip]·C302/C305 (5)
After voltage is transmitted, it is-C that the relation of output voltage and input voltage is similarly amplification coefficient302/C305Line
Sexual relationship.
It is special that heretofore described electric charge transmission controls to switch the invention that invention number can be used to be 201010291245.6
Embodiment described in profit realizes, and described voltage transmitting switch can use general metal-oxide-semiconductor or BJT switch to realize.
Fig. 5 is that the present invention uses charge-domain voltage small signal amplification circuit to carry out the circuit block diagram of signal detection.Its circuit
Structure includes: sensor, charge-domain voltage small signal amplification circuit, analog-digital converter (ADC) and control circuit.The connection of circuit
Relation is: the output voltage Vi of sensor is connected to the input voltage port of charge-domain voltage small signal amplification circuit, charge-domain
The output voltage port of voltage small signal amplification circuit is connected to the analog voltage input mouth of analog-digital converter, analog-digital converter
Quantization code outfan be connected to the digital code input of control circuit, the first control signal of control circuit produces port output
Clock Clkr produces to the Clkr input end of clock mouth of charge-domain voltage small signal amplification circuit, the second control signal of control circuit
Mouth of causing trouble output clock Clks is to the Clks input end of clock mouth of charge-domain voltage small signal amplification circuit, the 3rd of control circuit
Control signal produces the port output clock Clk Clk input end of clock mouth to charge-domain voltage small signal amplification circuit, controls electric
4th control signal on road produces the port output clock Clkn Clkn clock input to charge-domain voltage small signal amplification circuit
Port, the 5th control signal of control circuit produces port output clock Clkt to charge-domain voltage small signal amplification circuit
Clkt input end of clock mouth and the data output control terminal of analog-digital converter.
The work schedule of circuit shown in Fig. 5 uses the work wave schematic diagram that Fig. 4 provides completely.The operation principle of circuit
For: first the first control signal of control circuit produces port output clock Clkr control charge-domain voltage small signal amplification circuit
State reset；Secondly, the second control signal of control circuit produces port output clock Clks control charge-domain voltage
Sensor input voltage signal Vi is sampled by small signal amplification circuit；Again, the third and fourth control letter of control circuit
Number produce port export simultaneously clock Clk and Clkn control charge-domain voltage small signal amplification circuit to sampling obtain voltage letter
Number Vi is amplified obtaining output voltage Vo；Finally, the 5th control signal of control circuit produces port output clock Clkt control
Output voltage Vo is exported to analog-digital converter, the 5th control signal of control circuit by charge-domain voltage small signal amplification circuit processed
Generation port the most also exports clock Clkt control analog-digital converter to carry out the voltage Vo received analog digital conversion and will change
The quantization code obtained exports the digital code input of control circuit.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all spirit in the present invention and
Within principle, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (4)
1. a charge-domain voltage small signal amplification circuit, is characterized in that: include two charge-storage node, one be connected to two
Electric charge transmission control between individual charge-storage node switchs, is connected to the first electric capacity of the first charge-storage node, is connected to
The capacitance programmable capacitor of the second charge-storage node, it is connected to the first voltage transmitting switch of the first charge-storage node, company
The the second voltage transmitting switch receiving the first charge-storage node, the tertiary voltage transmission being connected to the second charge-storage node are opened
Close and be connected to the 4th voltage transmitting switch of the second charge-storage node；
The annexation of described charge-domain voltage small signal amplification circuit is: one end of the first electric capacity is connected to the first electric charge storage
Node, the other end is connected to electric charge transmission and controls clock Clk；One end of capacitance programmable capacitor is connected to the second electric charge storage joint
Point, the other end is connected to electric charge transmission and controls clock Clkn；Electric charge transmission controls the control end of switch and is connected to transmit signal
Clkt, electric charge transmission controls switch ends and is connected to the first and second charge-storage node；One end of first voltage transmitting switch
Being connected to the first charge-storage node, the other end is connected to reference voltage 1, and switch controlling signal meets Clkr；Second voltage transmission
One end of switch is connected to the first charge-storage node, and the other end is connected to input voltage Vi, and switch controlling signal meets Clks；The
One end of three voltage transmitting switches is connected to the second charge-storage node, and the other end is connected to reference voltage 2, switch controlling signal
Meet Clkr；One end of 4th voltage transmitting switch is connected to the second charge-storage node, and the other end is connected to output voltage Vo, opens
Close control signal and meet Clkt.
2. charge-domain voltage small signal amplification circuit as claimed in claim 1, is characterized in that: after completing primary voltage amplification,
The relation of output voltage and input voltage be amplification coefficient be-C302/C305Linear relationship, wherein: C302And C305It is respectively the
One electric capacity and the capacitance of capacitance programmable capacitor.
3. use a signal deteching circuit for charge-domain voltage small signal amplification circuit, it is characterized in that including: sensor, electric charge
Territory voltage small signal amplification circuit, analog-digital converter and control circuit；Described use charge-domain voltage small signal amplification circuit enters
Its annexation of the circuit of row signal detection is: the output voltage of sensor is connected to charge-domain voltage small signal amplification circuit
Input voltage port, the output voltage port of charge-domain voltage small signal amplification circuit is connected to the analog voltage of analog-digital converter
Input port, the quantization code outfan of analog-digital converter is connected to the digital code input of control circuit, the first of control circuit
Control signal produces the port output clock Clkr Clkr input end of clock mouth to charge-domain voltage small signal amplification circuit, control
It is defeated to the Clks clock of charge-domain voltage small signal amplification circuit that second control signal of circuit produces port output clock Clks
Inbound port, the 3rd control signal of control circuit produces port output clock Clk to charge-domain voltage small signal amplification circuit
Clk input end of clock mouth, the 4th control signal of control circuit produces port output clock Clkn to charge-domain voltage small-signal
The Clkn input end of clock mouth of amplifying circuit, the 5th control signal of control circuit produces port output clock Clkt to charge-domain
The Clkt input end of clock mouth of voltage small signal amplification circuit and the data output control terminal of analog-digital converter.
4. use a using method for the signal deteching circuit of charge-domain voltage small signal amplification circuit, it is characterized in that including with
Lower step: first the first control signal of control circuit produces port output clock Clkr control charge-domain voltage low level signal amplification
The state of circuit resets；Secondly, the second control signal of control circuit produces port output clock Clks control charge-domain
Sensor input voltage signal is sampled by voltage small signal amplification circuit；Again, the 4th and the 4th control of control circuit
Signal produces port and exports the voltage that sampling is obtained by clock Clk and Clkn control charge-domain voltage small signal amplification circuit simultaneously
Signal is amplified obtaining output voltage；Finally, the 5th control signal of control circuit produces port output clock Clkt control
Output voltage is exported to analog-digital converter by charge-domain voltage small signal amplification circuit, and the 5th control signal of control circuit produces
Port the most also exports clock Clkt and controls analog-digital converter and the voltage received carries out analog digital conversion and will be converted to
Quantization code exports the digital code input of control circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610717387.1A CN106301241B (en) | 2016-08-24 | 2016-08-24 | Charge-domain voltage signal amplifying circuit and the detection circuit for using the amplifying circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610717387.1A CN106301241B (en) | 2016-08-24 | 2016-08-24 | Charge-domain voltage signal amplifying circuit and the detection circuit for using the amplifying circuit |
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| CN106301241A true CN106301241A (en) | 2017-01-04 |
| CN106301241B CN106301241B (en) | 2018-11-27 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101262206A (en) * | 2007-03-08 | 2008-09-10 | 三洋电机株式会社 | Amplifier circuit |
| CN101611547A (en) * | 2007-01-19 | 2009-12-23 | 肯奈特公司 | Charge-domain pipelined analog-to-digital converter |
| CN101977056A (en) * | 2010-09-21 | 2011-02-16 | 中国电子科技集团公司第五十八研究所 | Charge transfer circuit suitable for common CMOS process and charge transfer control switch thereof |
-
2016
- 2016-08-24 CN CN201610717387.1A patent/CN106301241B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101611547A (en) * | 2007-01-19 | 2009-12-23 | 肯奈特公司 | Charge-domain pipelined analog-to-digital converter |
| CN101262206A (en) * | 2007-03-08 | 2008-09-10 | 三洋电机株式会社 | Amplifier circuit |
| CN101977056A (en) * | 2010-09-21 | 2011-02-16 | 中国电子科技集团公司第五十八研究所 | Charge transfer circuit suitable for common CMOS process and charge transfer control switch thereof |
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