CN106301054A - A kind of modified model POD modulation strategy of cascaded H-bridges photovoltaic DC-to-AC converter - Google Patents

Abstract

The invention discloses an improved POD modulation strategy for a cascaded H-bridge photovoltaic inverter, which includes: obtaining 16 switch states contained in the two H-bridge modules according to the switch states of the left and right bridge arms of each H-bridge module; When the DC input voltages of the two H-bridge modules are the same, calculate the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each switch state in the 16 switch states; select the two H-bridge modules All switch states whose sum of the total parasitic capacitor voltage remains constant form two switch state combinations; according to the two switch state combinations, the PWM drive signal is generated by comparing the modulated wave with the carrier wave, and the two The switching tube of each H-bridge module is controlled. This modulation strategy effectively improves the suppression effect of the leakage current of the photovoltaic grid-connected inverter.

Description

An improved POD modulation strategy for cascaded H-bridge photovoltaic inverters

technical field

The invention belongs to the technical field of active inverters, and relates to a leakage current suppression method applied to photovoltaic inverters, in particular to an improved POD modulation strategy for cascaded H-bridge photovoltaic inverters, which is suitable for photovoltaic power generation On-grid field.

Background technique

Photovoltaic inverter (Photovoltaic inverter) is a power adjustment device composed of semiconductor devices, mainly used to convert DC power into AC power; generally composed of a boost circuit and an inverter bridge circuit, the boost circuit converts solar cells The DC voltage is boosted to the DC voltage required for inverter output control; the inverter bridge circuit converts the boosted DC voltage into an AC voltage of common frequency equivalently.

For H-bridge photovoltaic inverters, the low-voltage DC side of each module can be independently powered by photovoltaic panels, which facilitates MPPT control of each module, so the H-bridge topology is especially suitable for photovoltaic inverters. Compared with traditional inverters, H-bridge photovoltaic inverters have obvious advantages, such as low switching frequency, small filter size, and easy modularization.

The H-bridge photovoltaic inverter can achieve the voltage required for grid connection through cascaded modules, so this type of inverter does not require a transformer, further reducing costs and increasing power density. However, the H-bridge photovoltaic inverter lacks the isolation function of the transformer, and there is a direct electrical connection between the photovoltaic panel and the grid, which causes the parasitic capacitance between the photovoltaic panel and the ground to form a loop and generate leakage current. Therefore, it seriously affects the efficiency and reliability of the system, and even poses a threat to personal safety; therefore, how to suppress the leakage current of the photovoltaic inverter becomes extremely important.

The Chinese photovoltaic standard GB/T30427-2013 has the following regulations on the leakage current of the photovoltaic grid-connected system: if the rated output of the photovoltaic inverter is less than 30kVA, the amplitude of the leakage current must be lower than 300mA, otherwise the photovoltaic inverter should be in Disconnect within 0.3s and output fault signal. Germany's low-voltage grid-connected directive VDE0126-1-1 also has relevant regulations on leakage current.

At present, the traditional leakage current suppression methods can be summarized into the following three types, namely: 1) using improved topologies, such as H5 topology, H6 topology and Heric topology, etc.; 2) using passive filters, such as common mode inductors and EMI filter, etc.; 3) adopt a new modulation strategy.

In the above three aspects, scholars have carried out relevant research, such as the literature "High-efficiency single-phase transformerless PV H6inverter with hybrid modulation method" BaojianJi, Jianhua Wang, Jianfeng Zhao, "IEEE Transactions on Industrial Electro-ronics", 2013 , 60(5), 2104–2115 (“Hybrid modulation method for high-efficiency single-phase non-isolated H6 inverter”, "IEEE Transactions-Journal of Industrial Electronics", 2013, Vol. 60, No. 5, pp. 2104-2115) adopted Although the cascaded H6 topology suppresses the leakage current to a certain extent, compared with the traditional H4 topology, its modulation strategy is relatively complex, the scalability is poor, and the cost increases as the number of cascaded modules increases.

Literature "Analysis and suppression of leakage current incascaded multilevel-inverter based PV systems" Y.Zhou and H.Li, "IEEE TransPower Electro-nics", 2014, 29(10), 5265–5277 ("Cascaded multilevel photovoltaic inverter Leakage Current Analysis and Suppression", "IEEE Journal-Journal of Power Electronics", 2014, Vol. 29, No. 10, pp. 5265-5277) and the literature "Eliminating Ground Current in a Transformerless Photovoltaic Application" Freijedo, Alejandro G. Yepes, Jano Malvar, et al . "IEEE Transacion-son Energy Conversion", 2010, 25(1), 140-147 ("Eliminating leakage current in non-isolated photovoltaic applications", "IEEE Transactions-Journal of Energy Conversion", 2010, Vol. 25, No. 1, 140 – Page 147) proposed a solution to suppress the leakage current by adding a passive filter in each H-bridge. Although this solution can effectively suppress the leakage current, with the increase of the cascaded number of H-bridges, the volume of the inverter And the cost also increases accordingly.

The document "A New Modulation Technique to Eliminate Leakage Current in Transformerless PV Inverter" proposes a method of injecting third harmonics to reduce the size of the common-mode voltage. However, this modulation strategy is only applicable to a single H-bridge module, and for multiple H-bridge modules In other words, the leakage current is not only related to the common-mode voltage of this module, but also related to the differential-mode voltage of other modules. Therefore, if this modulation strategy is to be applied to multiple H-bridge modules, further research is needed.

Literature "Hybrid Multicarrier Modulation to Reduce Leakage Current in a Transformerless Cascaded Multilevel Inverter for Photovoltaic Systems" Rajasekar Selvamuthukumaran, AbhishekGarg, and Rajesh Gupta. "IEEE Transactions on Power Electronics", 2015, 30(4):1779-1783 (for non-isolated A hybrid multi-carrier modulation strategy for cascaded multi-level inverter photovoltaic systems”, "IEEE Transactions-Journal of Power Electronics", 2015, Vol. Disposition) modulation strategy, using the principle that the common-mode voltage has the minimum amplitude change when the switch is switched to suppress the leakage current, but the common-mode voltage obtained by this modulation strategy still has high-frequency components, so it does not really effectively suppress the cascaded H bridge leakage current.

Contents of the invention

In order to solve the above-mentioned leakage current problem, the present invention will propose a new improved POD modulation strategy from the perspective of the third leakage current suppression method, which can keep the sum of parasitic capacitance voltage constant or low-frequency variable, and effectively suppress Leakage current of the cascaded H-bridge.

An embodiment of the present invention provides an improved POD modulation strategy for a cascaded H-bridge photovoltaic inverter, wherein the suppression method includes:

According to the switch state of the left and right bridge arms of each H bridge module, the 16 switch states included in the two H bridge modules are obtained;

When the DC input voltages of the two H-bridge modules are the same, calculate the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each switch state in the 16 switch states;

Selecting all switch states in which the sum of the total parasitic capacitance voltages of the two H-bridge modules remains unchanged, and forming two switch state combinations;

According to the combination of the two switching states, the modulation wave is compared with the carrier to generate a PWM driving signal, and control the switching tubes of the two H-bridge modules.

In one embodiment of the present invention, when generating the PWM drive signal, the carrier uses two carrier signals tri1, tri2, and when the time is between (0, T/2), tri1>tri2, 0.5<tri1< 1, 0<tri2<0.5; when the time is between (T/2,T), the carrier tri1 and the carrier tri2 are reversed, and tri1<tri2, 0<tri1<0.5, 0.5<tri2<1, the modulation wave The negative half cycle of v _ref is reversed and the modulation is 0.9.

In one embodiment of the present invention, the 16 switching states contained in the two H-bridge modules are obtained according to the switching states of the left and right bridge arms of each H-bridge module, including:

Use numbers 0 and 1 to represent the off and on states of the switch tubes on the left and right bridge arms of each H-bridge module, then the switching functions S _a1 /S _b1 /S _a2 /S _b2 of the two H-bridge modules are different The state combination produces 16 switch states as follows: 0101, 0100, 0111, 0110, 0001, 1101, 0000, 1111, 0011, 1100, 0010, 1110, 1001, 1000, 1011, 1010; where S _a1 represents the left bridge of module 1 The switching function of the upper tube of the arm, S _b1 represents the switching function of the upper tube of the right bridge arm of module 1, S _a2 represents the switching function of the upper tube of the left bridge arm of module 2, and S _b2 represents the switching function of the upper tube of the right bridge arm of module 2; The upper and lower switching tubes of each bridge arm work complementary.

In one embodiment of the present invention, if the DC input voltages of the two H-bridge modules are the same and are v _pv , each H-bridge outputs three levels of -v _pv , 0, and v _pv , and the two H-bridge modules share -2v _pv , -v _pv , 0, v _pv , 2v _pv five output levels; the 16 switching states finally form -2v _pv , -v _pv , 0, v _pv , 2v _pv of two H-bridge modules Five output levels.

In one embodiment of the present invention, calculating the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each of the 16 switch states includes:

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

Wherein, v _cpv1 and v _cpv2 are the parasitic capacitance voltage values of the two H-bridge modules respectively, and v _a1n1 , v _b1n1 , v _a2n2 and v _b2n2 are the output terminals a ₁ and b of the four bridge arms of the two H-bridge modules respectively. ₁ , a ₂ and b ₂ to the voltage of common points n ₁ and n ₂ ; v _g is the grid voltage.

In one embodiment of the present invention, two switch state combinations are formed, including:

Select all the switching states where the sum of the parasitic capacitor voltages is _vpv , and according to the principle that the number of switching tube actions is the least when the output levels of the two H-bridge modules are switched, the combination of the two switching states is as follows:

1010-1000-1100-0011-0001-0101 and 1010-1110-1100-0011-0111-0101.

In one embodiment of the present invention, according to the combination of the two switch states, the modulation wave is compared with the carrier to generate a PWM drive signal, and the switching tubes of the two H-bridge modules are controlled, including:

The PWM driving signal generation method of the first switch state combination 1010-1000-1100-0011-0001-0101 includes:

When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri2, if v _ref >tri2, S _b1 = 0, Otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri1, if v _ref >tri1, S _a2 =1, otherwise S _a2 =0;

When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri1, if v _ref <tri1, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri2, if v _ref <tri2, S _a2 =1, otherwise S _a2 =0;

The second PWM driving signal generation method of the switch state combination 1010-1110-1100-0011-0111-0101 includes:

When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri1, if v _ref >tri1, S _b1 = 0, Otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri2, if v _ref >tri2, S _a2 =1, otherwise S _a2 =0;

When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri2, if v _ref <tri2, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri1, if v _ref <tri1, S _a2 =1, otherwise S _a2 =0.

In one embodiment of the present invention, the carrier is a triangular carrier, and the directions of the carriers in adjacent half-period intervals are opposite.

Compared with prior art, the beneficial effect of the present invention is:

Without adding passive filter inductors and without changing the existing topology, through the new improved POD modulation strategy, the sum of the parasitic capacitor voltage can be kept constant or low-frequency sinusoidal, which significantly reduces the H-bridge photovoltaic Inverter leakage current.

Description of drawings

In order to clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. The accompanying drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other accompanying drawings according to these drawings without any creative effort.

FIG. 1 is a schematic flowchart of a leakage current suppression method provided by an embodiment of the present invention.

FIG. 2 is a schematic flowchart of another leakage current suppression method provided by an embodiment of the present invention.

Fig. 3 is a schematic diagram of a two-module cascaded H-bridge photovoltaic inverter provided by an embodiment of the present invention.

Fig. 4 is an equivalent model of a two-module cascaded H-bridge photovoltaic inverter provided by an embodiment of the present invention.

Fig. 5 is an implementation schematic diagram of the first switch state combination provided by the embodiment of the present invention.

Fig. 6 is an implementation schematic diagram of the second switch state combination provided by the embodiment of the present invention.

detailed description

In order for those skilled in the art to better understand the technical solution of the present invention, a leakage current suppression method applied to a cascaded H-bridge five-level inverter of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Examples represent possible variations only. Individual components and functions are optional unless explicitly required, and the order of operations may vary. Portions and features of some embodiments may be included in or substituted for those of other embodiments. The scope of embodiments of the present invention includes the full scope of the claims, and all available equivalents of the claims.

The present invention will be described in further detail below in conjunction with the accompanying drawings.

Embodiment one

Please refer to Fig. 1, Fig. 1 is an improved POD modulation strategy of a cascaded H-bridge photovoltaic inverter provided in Embodiment 1 of the present invention, wherein the suppression method includes:

According to the switch state of the left and right bridge arms of each H bridge module, the 16 switch states included in the two H bridge modules are obtained;

When the DC input voltages of the two H-bridge modules are the same, calculate the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each switch state in the 16 switch states;

Selecting all switch states in which the sum of the total parasitic capacitance voltages of the two H-bridge modules remains unchanged, and forming two switch state combinations;

According to the combination of the two switching states, the modulation wave is compared with the carrier to generate a PWM driving signal, and control the switching tubes of the two H-bridge modules.

Wherein, when generating the PWM driving signal, the carrier adopts two carrier signals tri1 and tri2, and when the time is between (0, T/2), tri1>tri2, 0.5<tri1<1, 0<tri2<0.5 ;When the time is between (T/2,T), the carrier tri1 and the carrier tri2 are reversed, and tri1<tri2, 0<tri1<0.5, 0.5<tri2<1, the negative half cycle of the modulation wave v _ref Reverse, and the degree of modulation is 0.9.

The 16 switch states contained in the two H-bridge modules are obtained according to the switch states of the left and right bridge arms of each H-bridge module, including:

Use numbers 0 and 1 to represent the off and on states of the switch tubes on the left and right bridge arms of each H-bridge module, then the switching functions S _a1 /S _b1 /S _a2 /S _b2 of the two H-bridge modules are different The state combination produces 16 switch states as follows: 0101, 0100, 0111, 0110, 0001, 1101, 0000, 1111, 0011, 1100, 0010, 1110, 1001, 1000, 1011, 1010; among them, S _a1 represents the left bridge of module 1 The switching function of the upper tube of the arm, S _b1 represents the switching function of the upper tube of the right bridge arm of module 1, S _a2 represents the switching function of the upper tube of the left bridge arm of module 2, and S _b2 represents the switching function of the upper tube of the right bridge arm of module 2; The upper and lower switching tubes of each bridge arm work complementary.

Among them, if the DC input voltage of the two H-bridge modules is the same and is v _pv , each H-bridge outputs three levels of -v _pv , 0, and v _pv , and the two H-bridge modules share -2v _pv and -v _pv , 0, v _pv , 2v _pv five output levels; the 16 switching states finally form five output levels of -2v _pv , -v _pv , 0, v _pv , 2v _pv of the two H-bridge modules.

Further, calculating the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each of the 16 switch states includes:

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

Wherein, v _cpv1 and v _cpv2 are the parasitic capacitance voltage values of the two H-bridge modules respectively, and v _a1n1 , v _b1n1 , v _a2n2 and v _b2n2 are the output terminals a ₁ and b of the four bridge arms of the two H-bridge modules respectively. ₁ , a ₂ and b ₂ to the voltage of common points n ₁ and n ₂ ; v _g is the grid voltage.

Further, select all switch states that make the sum of the parasitic capacitor voltages equal to _vpv , and form two switch state combinations according to the principle that when the output levels of the two H-bridge modules are switched, the number of switching tube actions is the least:

1010-1000-1100-0011-0001-0101 and 1010-1110-1100-0011-0111-0101.

According to the combination of the two switch states, the PWM drive signal is generated by comparing the modulated wave with the carrier, and the switching tubes of the two H-bridge modules are controlled, including:

The PWM driving signal generation method of the first switch state combination 1010-1000-1100-0011-0001-0101 includes:

When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri2, if v _ref >tri2, S _b1 = 0, Otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri1, if v _ref >tri1, S _a2 =1, otherwise S _a2 =0;

When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri1, if v _ref <tri1, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri2, if v _ref <tri2, S _a2 =1, otherwise S _a2 =0;

The second PWM driving signal generation method of the switch state combination 1010-1110-1100-0011-0111-0101 includes:

When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri1, if v _ref >tri1, S _b1 = 0, Otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri2, if v _ref >tri2, S _a2 =1, otherwise S _a2 =0;

When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri2, if v _ref <tri2, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri1, if v _ref <tri1, S _a2 =1, otherwise S _a2 =0.

Wherein, the carrier is a triangular carrier, and the directions of the carriers in adjacent half-period intervals are opposite.

In this embodiment, through the new improved POD modulation strategy, the sum of parasitic capacitor voltages is guaranteed to be constant or low-frequency variable, effectively suppressing the leakage current of the cascaded H-bridge, and solving the problem of cascaded H-bridge photovoltaic grid-connected inversion in the prior art. The problem that the inverter cannot effectively suppress the leakage current has achieved the effect of better suppressing the leakage current of the cascaded H-bridge photovoltaic grid-connected inverter.

Embodiment two

Please refer to Fig. 2, Fig. 2 is an improved POD modulation strategy of a cascaded H-bridge photovoltaic inverter provided in Embodiment 2 of the present invention, wherein the suppression method includes:

Step a, assuming that the DC input voltages of the two H-bridge modules are equal and v _pv , list all 16 switch states contained in the two modules;

Step b, calculating the sum of the parasitic capacitance voltage and the total parasitic capacitance voltage of each module corresponding to the 16 switch states; selecting all the switch states whose sum of the parasitic capacitance voltages is _vpv ;

Step c, according to the principle that when the output levels of the two H-bridge modules are switched, the number of switching tube actions is the least to form two switch state combinations;

In step d, according to the combination of the two switching states, the modulation wave is compared with the carrier to generate a PWM driving signal, and the switching tubes of the two H-bridge modules are controlled, so as to suppress the leakage current.

Fig. 3 is a schematic diagram of a two-module cascaded H-bridge photovoltaic inverter provided by an embodiment of the present invention. In the figure, C _pv1 and C _pv2 are the parasitic capacitances between the photovoltaic array and the ground, v _pv1 and v _pv2 are the DC input voltages of the two modules, C _in1 and C _in2 are the input capacitances of the DC side, and L ₁ and L ₂ are Grid side filter inductor, R ₁ and R ₂ are the parasitic resistance of the grid side filter inductor, v _g is the grid voltage.

Assuming that the DC input voltages of the two H-bridge modules are equal and v _pv , list all 16 switch states (S _a1 /S _b1 /S _a2 /S _b2 ) contained in the two modules, and calculate each switch state The sum of the corresponding parasitic capacitance voltage of each module and the total parasitic capacitance voltage.

Among them, S _a1 represents the switching function of the upper tube of the left bridge arm of module 1, S _b1 represents the switching function of the upper tube of the right bridge arm of module 1, S _a2 represents the switching function of the upper tube of the left bridge arm of module 2, and S _b2 represents the switching function of the upper tube of the right bridge arm of module 2. The switching function of the upper tube of the bridge arm. In addition, each switch function can take 0 or 1, 1 means the switch tube is turned on, 0 means the switch tube is turned off, and the upper and lower switch tubes of each bridge arm work complementary.

Figure 4 is the equivalent model of a cascaded H-bridge photovoltaic inverter with two modules. Wherein, v _a1n1 , v _b1n1 , v _a2n2 and v _b2n2 are the voltages of the output terminals a ₁ , b ₁ , a ₂ and b ₂ of each bridge arm to the common points n ₁ and n ₂ respectively. Taking the positive half cycle of the grid current as an example, assuming that the grid-side filter inductance L ₁ =L ₂ , since the leakage current is very small, the voltages generated on L ₁ and L ₂ are approximately equal and equal to v _L , and at the same time, the grid-side filter inductance The voltage of the parasitic resistance is v _R ;

According to Figure 4, the formula can be obtained from Kirchhoff's law:

$\left\{\begin{array}{c}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; R</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ <span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; R</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}\\ <span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right.$

It can be obtained from the above three formulas:

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

Since the power grid voltage v _g is mainly a power frequency component, it has little influence on the leakage current on the parasitic capacitance, so the subsequent analysis will not be considered, so the voltage v _cpv1 and v _cpv2 of the parasitic capacitance C _pv1 and C _pv2 can be expressed as:

${{\mathrm{<span\; class="notranslate">\; v</span>}}^{<span\; class="notranslate">\; \&prime;</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

${{\mathrm{<span\; class="notranslate">\; v</span>}}^{<span\; class="notranslate">\; \&prime;</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$

Table 1 shows the switching status and parasitic capacitor voltage of two H-bridge modules, where v _ab is the total output voltage, v _cpv1 is the parasitic capacitor voltage of H-bridge module 1, v _cpv2 is the parasitic capacitor voltage of H-bridge module 2, v _cpv1 +v _cpv2 is the sum of the parasitic capacitance voltages of the two H-bridge modules. It can be seen that the two H-bridge modules have five level outputs, namely: 2v _pv , v _pv , 0, -v _pv and -2v _pv . When different switching functions S _a1 /S _b1 /S _a2 /S _b2 control the switch tube, the sum of the parasitic capacitance voltage v' _cpv1 +v' _cpv2 of the two H-bridge modules changes at a high frequency between 0 and 2v _pv , resulting in a leakage current.

Table 1 Switching states and parasitic capacitor voltages of two H-bridge modules

According to the results calculated in Table 1, select all the switching states where the sum of the parasitic capacitor voltages is _vpv , and according to the principle that the number of switching tube actions is the least when the output levels of the two H-bridge modules are switched, the following two switching states are formed combination, respectively:

1010-1000-1100-0011-0001-0101 and 1010-1110-1100-0011-0111-0101.

According to the combination of the two selected switch states, a PWM drive signal is generated to control the switch tube, and the implementation method is to compare the modulated wave with two carrier waves to obtain a PWM signal.

Among them, the two carrier signals are tri1 and tri2, and when the time is between (0, T/2), tri1>tri2, 0.5<tri1<1, 0<tri2<0.5; when the time is between (T/2, Between T), the carrier tri1 and the carrier tri2 are both reversed, and tri1<tri2, 0<tri1<0.5, 0.5<tri2<1, the negative half cycle of the modulation wave v _ref is reversed, and the positive half cycle waveform Consistent, in the shape of steamed buns, and the modulation degree is 0.9.

As shown in Figure 5, the first switch state combination of the embodiment is realized, and the specific comparison method is as follows:

(1) When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri2, if v _ref > tri2, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri1, if v _ref >tri1, S _a2 =1, otherwise S _a2 =0;

(2) When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri1, if v _ref <tri1 , S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri2, if v _ref <tri2, S _a2 =1, otherwise S _a2 =0;

As shown in Figure 6, the second switch state combination of the embodiment is realized, and the specific comparison method is as follows:

(1) When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri1, if v _ref > tri1, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri2, if v _ref >tri2, S _a2 =1, otherwise S _a2 =0;

(2) When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri2, if v _ref <tri2 , S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri1, if v _ref <tri1, S _a2 =1, otherwise S _a2 =0;

Using this method, a new improved POD modulation strategy is adopted to ensure that the sum of the parasitic capacitor voltage is constant or low-frequency variable, and the leakage current of the cascaded H-bridge is effectively suppressed.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (8)

1. A kind of improved POD modulation strategy of cascaded H-bridge photovoltaic inverter, it is characterized in that, described suppression method comprises: According to the switch state of the left and right bridge arms of each H bridge module, the 16 switch states included in the two H bridge modules are obtained; When the DC input voltages of the two H-bridge modules are the same, calculate the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each switch state in the 16 switch states; Selecting all switch states in which the sum of the total parasitic capacitance voltages of the two H-bridge modules remains unchanged, and forming two switch state combinations; According to the combination of the two switching states, the modulation wave is compared with the carrier to generate a PWM driving signal, and control the switching tubes of the two H-bridge modules. 2. suppression method according to claim 1, is characterized in that, when generating PWM driving signal, described carrier adopts two carrier signals tri1, tri2, and when time is between (0, T/2), tri1 >tri2, 0.5<tri1<1, 0<tri2<0.5; when the time is between (T/2,T), both carrier tri1 and carrier tri2 are reversed, and tri1<tri2, 0<tri1<0.5, 0.5 <tri2<1, the negative half period of the modulation wave v _ref is reversed, and the modulation degree is 0.9. 3. suppression method according to claim 2, is characterized in that, obtains 16 switch states that described two H bridge modules comprise according to the switch state of each H bridge module left and right bridge arm, comprises: Use numbers 0 and 1 to represent the off and on states of the switch tubes on the left and right bridge arms of each H-bridge module, then the switching functions S _a1 /S _b1 /S _a2 /S _b2 of the two H-bridge modules are different The state combination produces 16 switch states as follows: 0101, 0100, 0111, 0110, 0001, 1101, 0000, 1111, 0011, 1100, 0010, 1110, 1001, 1000, 1011, 1010; among them, S _a1 represents the left bridge of module 1 The switching function of the upper tube of the arm, S _b1 represents the switching function of the upper tube of the right bridge arm of module 1, S _a2 represents the switching function of the upper tube of the left bridge arm of module 2, and S _b2 represents the switching function of the upper tube of the right bridge arm of module 2; The upper and lower switching tubes of each bridge arm work complementary. 4. suppression method according to claim 3, is characterized in that, if the DC input voltage of two H bridge modules is identical and is v _pv , then each H bridge outputs three kinds of levels of -v _pv , 0, v _pv , the two H-bridge modules have five output levels -2v _pv , -v _pv , 0, v _pv , 2v _pv ; the 16 switching states finally form the -2v _pv , -v _pv , 0, v _pv , 2v _pv five output levels. 5. The suppression method according to claim 4, wherein calculating the sum of the parasitic capacitance voltages of the two H-bridge modules corresponding to each switch state in the 16 switch states comprises: ${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$ ${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; v</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 1</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}$ Wherein, v _cpv1 and v _cpv2 are the parasitic capacitance voltage values of the two H-bridge modules respectively, and v _a1n1 , v _b1n1 , v _a2n2 and v _b2n2 are the output terminals a ₁ and b of the four bridge arms of the two H-bridge modules respectively. ₁ , a ₂ and b ₂ to the voltage of common points n ₁ and n ₂ ; v _g is the grid voltage. 6. The suppressing method according to claim 5, characterized in that two switch state combinations are formed, comprising: Select all the switching states where the sum of the parasitic capacitor voltages is v _pv , and according to the principle that when the output levels of the two H-bridge modules are switched, the switching tube has the least number of actions to form two switching state combinations: 1010-1000-1100- 0011-0001-0101 and 1010-1110-1100-0011-0111-0101. 7. The suppressing method according to claim 6, characterized in that, according to the combination of the two switching states, the modulation wave is compared with the carrier to generate a PWM drive signal, and the switching tubes of the two H-bridge modules control, including: The PWM driving signal generation method of the first switch state combination 1010-1000-1100-0011-0001-0101 includes: When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri2, if v _ref >tri2, S _b1 = 0, Otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri1, if v _ref >tri1, S _a2 =1, otherwise S _a2 =0; When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri1, if v _ref <tri1, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri2, if v _ref <tri2, S _a2 =1, otherwise S _a2 =0; The second PWM driving signal generation method of the switch state combination 1010-1110-1100-0011-0111-0101 includes: When the modulating wave v _ref is located in the (0,T/2) half-period interval, S _a1 = 1, S _b2 = 0; S _b1 is obtained by comparing the modulating wave with the carrier tri1, if v _ref >tri1, S _b1 = 0, Otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave with the carrier tri2, if v _ref >tri2, S _a2 =1, otherwise S _a2 =0; When the modulating wave v _ref is located in the (T/2, T) half-period interval, then S _a1 = 0, S _b2 = 1; S _b1 is obtained by comparing the modulating wave v _ref with the carrier tri2, if v _ref <tri2, S _b1 =0, otherwise S _b1 =1; S _a2 is obtained by comparing the modulation wave v _ref with the carrier tri1, if v _ref <tri1, S _a2 =1, otherwise S _a2 =0. 8 . The suppression method according to claim 1 , wherein the carrier is a triangular carrier, and the directions of the carriers in adjacent half-period intervals are opposite.