CN106298984A - Solaode - Google Patents

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Publication number
CN106298984A
CN106298984A CN201510254798.7A CN201510254798A CN106298984A CN 106298984 A CN106298984 A CN 106298984A CN 201510254798 A CN201510254798 A CN 201510254798A CN 106298984 A CN106298984 A CN 106298984A
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China
Prior art keywords
electrode
solaode
microns
spacing
back side
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严国艺
郑韦志
陈怀宗
黄俊瑞
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Motech Industries Inc
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Motech Industries Inc
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Priority to CN201510254798.7A priority Critical patent/CN106298984A/en
Publication of CN106298984A publication Critical patent/CN106298984A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Engineering & Computer Science (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

A kind of solaode, including silicon substrate, emitter layer, multiple first electrode, passivation layer and multiple second electrode.Silicon substrate has sensitive surface and the back side.Emitter layer is formed under sensitive surface.The plurality of first electrode is positioned on sensitive surface.Passivation layer is positioned on the back side, and has multiple wire perforate.The plurality of second electrode lays respectively in these wire perforates, and contacts the back side.The plurality of second electrode is arranged in multiple row along bearing of trend and is arranged in multirow along the orientation being perpendicular to bearing of trend.Each second electrode a length of A in the direction of extension.The first spacing B is maintained with between the wantonly two second adjacent electrodes of a line.200 microns of B 1400 microns, and 2 A/B 5.The second spacing P, wherein P 1000 microns are maintained between the second electrode that wantonly two row are adjacent.

Description

Solaode
Technical field
The invention relates to a kind of solaode, and in particular to a kind of emitter-base bandgap grading passivation and back of the body electricity Pole solaode (PERC).
Background technology
In the case of fossil energy shortage and demand for energy grow with each passing day, the renewable sources of energy (Renewable energy) is developed into one of the most very important problem.The renewable sources of energy are general Refer to forever continue and free of contamination natural energy source, such as solar energy, wind energy, water conservancy energy, tide energy or raw matter Can wait, wherein the exploitation of solar energy is the most important in the research of energy development the most in recent years and is subject to joyous The ring met.
Solaode is the photoelectric subassembly (photovoltaic device) of a kind of energy conversion, wherein penetrates Pole passivation and back electrode solaode receive much concern with its high conversion efficiency.Emitter-base bandgap grading passivation and back electrode Solaode is compared to the Main Differences of conventional solar cell: emitter-base bandgap grading passivation and the back electrode sun Can battery utilize passivating technique by the emitter-base bandgap grading in front and passivating back, to reduce surface defect.Front emitter-base bandgap grading It is usually selective oxidation silicon (SiO2) as passivation layer, and the back side is usually selective oxidation silicon or aluminium oxide (Al2O3) as passivation layer.
Specifically, the mode that the back electrode of emitter-base bandgap grading passivation and back electrode solaode is formed, it is common that First in modes such as laser to passivation layer perforate to form electrode contact locations, then at back side wire mark non-penetrative Aluminium glue or by physical vapour deposition (PVD) (PVD) plated aluminum, last and front wire mark elargol co-sintering Rear formation electrode, it prints with whole of aluminium paste overleaf with conventional solar cell and sinters, thus being formed Comprehensively back surface field (BSF) is different.Due to emitter-base bandgap grading passivation and the system of back electrode solaode Only to carry out partially perforation overleaf, the most finally can be formed local back electric field (Local BSF) and Retain large-area passivation layer.On the other hand, for conventional batteries, emitter-base bandgap grading passivation and back electrode Solaode adds the area of the passivation layer passivation at its back side, is therefore effectively reduced carrier overleaf Speed compound again.
Due to emitter-base bandgap grading passivation and the design that passivation layer is partially perforation at the back side of back electrode solaode, And back electrode is contacted with substrate back by the plurality of perforate, therefore can reach the purpose of conduction electric current. Although back electrode can make the passivation area of passivation layer increase, subtract with the design of the localized contact at the back side of substrate Being combined of few carrier, but derive the rear-face contact area minimizing of back electrode and substrate, Jin Erzao the most simultaneously Become the problem that resistance increases.Therefore, how to obtain preferably equilibrium point, effectively to promote opto-electronic conversion Efficiency, becomes as one of current problem demanding prompt solution.
Summary of the invention
The present invention provides a kind of solaode, and it can be effectively improved photoelectric transformation efficiency.
The present invention proposes a kind of solaode, it include silicon substrate, emitter layer, multiple first electrode, Passivation layer and multiple second electrode.Silicon substrate has sensitive surface and the back side relative to sensitive surface.Penetrate Pole layer is formed at sensitive surface.The plurality of first electrode is positioned on sensitive surface.Passivation layer is positioned on the back side, And there is multiple wire perforate.The plurality of second electrode lays respectively in the plurality of wire perforate, and The contact back side.Each second electrode has bearing of trend.The plurality of second electrode is arranged along bearing of trend Arrange into multiple row, and be arranged in multirow along the orientation being perpendicular to bearing of trend.Each second electrode exists A length of A on bearing of trend.With maintaining the between wantonly two adjacent the plurality of second electrodes of a line One spacing B, wherein 200 microns of B 1400 microns, and 2 A/B 5.The institute that wantonly two row are adjacent State and between multiple second electrode, maintain the second spacing P, wherein P 1000 microns.
In one embodiment of this invention, A:B=4:1, and 800 microns of B 1000 microns, P 800 Micron.
In one embodiment of this invention, adjacent the plurality of second electrode of above-mentioned wantonly two row is with described Multiple first spacing are interlocked in orientation each other.
In one embodiment of this invention, it is multiple that above-mentioned solaode also includes being formed at the back side Heavily doped region.One a pair respectively of the position of the plurality of heavily doped region and the plurality of second electrode Should.
In one embodiment of this invention, above-mentioned solaode also includes the company being formed on passivation layer Receiving electrode.Connect electrode and be electrically connected with the plurality of multiple second electrodes.
The present invention also proposes a kind of solaode, it include silicon substrate, emitter layer, multiple first electrode, Passivation layer and back electrode.Silicon substrate has sensitive surface and the back side relative to sensitive surface.Emitter layer shape Become at sensitive surface.The plurality of first electrode is positioned on sensitive surface.Passivation layer is positioned on the back side, and has There is multiple wire perforate.Each wire perforate has bearing of trend.The plurality of wire perforate is along extension Direction is arranged in multiple row, and is arranged in multirow along the orientation being perpendicular to bearing of trend.Each wire Perforate a length of A in the direction of extension.Between the wantonly two adjacent the plurality of wire perforates of a line Maintain the first spacing B, wherein 200 microns of B 1400 microns, and 2 A/B 5.Wantonly two row phases The second spacing P, wherein P 1000 microns are maintained between adjacent the plurality of wire perforate.Back electrode position On passivation layer, and extend in the plurality of wire perforate with described rear-face contact.
In one embodiment of this invention, the adjacent the plurality of wire perforate of above-mentioned wantonly two row is with described Multiple first spacing are interlocked in orientation each other.
In one embodiment of this invention, above-mentioned solaode also includes being formed at the multiple heavy of the back side Doped region.The position of the plurality of heavily doped region and the plurality of wire perforate one_to_one corresponding respectively.
Based on above-mentioned, the second electrode of the solaode of the present invention uses the configuration side of dotted line localizing electrode Formula, wherein the second electrode has bearing of trend.Second electrode is arranged in multiple row also along described bearing of trend Being arranged in multirow along the orientation being perpendicular to described bearing of trend, the most each second electrode is described A length of A on bearing of trend.The first spacing B is maintained with between the wantonly two second adjacent electrodes of a line, The second spacing P is maintained between the second electrode that wantonly two row are adjacent.
Specifically, 200 microns of B 1400 microns, and length A and the first spacing B meet relation Formula: 2 A/B 5.On the other hand, P 1000 microns, therefore it is adjusted by the big of the first spacing B The little numerical range determining length A, and determine long in the size being adjusted by the first spacing B While the numerical range of degree A, change the size of the second spacing P, use and obtain length A, between first Away from the preferred range of the parameter designing such as B and the second spacing P, just can effectively promote solaode Photoelectric transformation efficiency.
For the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate Institute's accompanying drawings is described in detail below.
Accompanying drawing explanation
Fig. 1 is the partial bottom view of the solaode of one embodiment of the invention;
Fig. 2 is the solaode generalized section along I-I hatching line of Fig. 1;
Fig. 3 is the partial cutaway schematic of the solaode of another embodiment of the present invention.
Description of reference numerals
100: solaode
130: the second electrodes
150: passivation layer
151: wire perforate
A: length
B: the first spacing
D1: bearing of trend
D2: orientation
P: the second spacing
Detailed description of the invention
Fig. 1 is the partial bottom view of the solaode of one embodiment of the invention.Fig. 2 is the sun of Fig. 1 Energy battery is along the generalized section of I-I hatching line.Refer to Fig. 1 and Fig. 2, in the present embodiment, solar energy Battery 100 e.g. emitter-base bandgap grading passivation and back electrode solaode, its can include photoelectric conversion layer 110, Multiple first electrodes 120 and multiple second electrode 130.Photoelectric conversion layer 110 can be by p-type half The semiconductor stack structure of the PN junction that conductor layer and N-type semiconductor layer stack are formed, or by p-type The semiconductor stack structure of the PIN junction that semiconductor layer, intrinsic layer, N-type semiconductor layer stack are formed.
Specifically, photoelectric conversion layer 110 can include silicon substrate 111 and emitter layer 112.Silicon substrate 111 have sensitive surface 111a and the back side 111b relative to sensitive surface 111a.First 120, electrode On sensitive surface 111a, and the second electrode 130 is positioned on the 111b of the back side.On the other hand, emitter layer 112 It is formed at sensitive surface 111a.Silicon substrate 111 is e.g. made up of P-type silicon crystalline substance, and in light Face 111a to silicon substrate 111 doped with phosphorus diffusing, doping layer using as emitter layer 112.In the present embodiment, Emitter layer 112 is positioned at silicon substrate 111, and at the place of sensitive surface 111a.This means, emitter layer 112 are positioned under the sensitive surface 111a of silicon substrate 111, but the present invention is not limited.For example, In other embodiments, the mode that emitter layer may be used without depositing is formed on silicon substrate.This means, penetrate Pole layer is positioned on the sensitive surface of silicon substrate.In another embodiment, silicon substrate can also be by N-type silicon Brilliant constituted, and on the sensitive surface of silicon substrate doped with boron diffusing, doping layer using as emitter layer.
In the present embodiment, solaode 100 also includes anti-reflecting layer 140.Anti-reflecting layer 140 In the top of sensitive surface 111a, and connect emitter layer 112.The material of anti-reflecting layer 140 can include nitridation The combination of silicon, silicon oxide, titanium dioxide, Afluon (Asta) or above-mentioned material, and sunk by such as physical vapor Long-pending, chemical gaseous phase deposition or other suitable processing procedures and be formed on emitter layer 112.
After anti-reflecting layer 140 is formed on emitter layer 112, can be by such as plating, wire mark or thing The modes such as physical vapor deposition form the first electrode 120.To use the modes such as plating or physical vapour deposition (PVD) As a example by making the first electrode 120, for making the first electrode 120 contact emitter layer 112, then in making first Before electrode 120, the first electricity need to be available for beforehand through modes such as such as lasers in anti-reflecting layer 140 formation The opening that pole 120 passes and accommodates.Also as a example by using wire mark mode to make the first electrode 120, then Being formed at the conductive paste on anti-reflecting layer 140 (may be used to form the material of the first electrode 120) can be at height Anti-reflecting layer 140 is burnt during temperature sintering.Finally, the first electrode 120 of curing molding just can be with emitter layer 112 contacts.It is said that in general, the material of the first electrode 120 can be silver, aluminum or silver aluminum mixture, and this First electrode 120 of embodiment is e.g. made up of conductive silver paste.
As in figure 2 it is shown, solaode 100 further includes passivation layer 150.Passivation layer 150 is positioned at the back side On 111b.This means, passivation layer 150 and anti-reflecting layer 140 are positioned at the opposite sides of photoelectric conversion layer 110. In the present embodiment, passivation layer 150 can be that the dielectric layer of more than amorphous silicon layer or at least one of which is formed. Being constituted as a example by passivation layer 150 by multilayer dielectric layer, the material selected by the plurality of dielectric layer can the most not phase Identical or identical with, part.Typically, the material of dielectric layer can be silicon dioxide, silicon nitride, The combination of aluminium oxide, titanium dioxide or above-mentioned material.The formation of passivation layer 150 can use e.g. physics Vapour deposition, chemical gaseous phase deposition or other suitable processing procedures and be formed at the back side 111b of silicon substrate 111 On.After passivation layer 150 is formed on silicon substrate 111, laser perforate or setting-out can be passed through at passivation layer Form multiple wire perforate 151 arranged in parallel on 150, and the plurality of wire perforate 151 can expose The back side 111b of part.Afterwards, e.g. online through modes such as plating, wire mark or physical vapour deposition (PVD)s The second electrode 130 is formed on the back side 111b that shape perforate 151 is exposed.For changing an angle, second Electrode 130 can be correspondingly arranged in wire perforate 151, and contacts the back side 111b of silicon substrate 111, its In the material of the second electrode 130 can be silver, aluminum or silver aluminum mixture.In the present embodiment, silicon substrate is worked as 111 e.g. by P-type silicon crystalline substance constituted time, in order to make the material e.g. aluminium paste of the second electrode 130. Therefore, after having carried out sintering process, the back of the body of the silicon substrate 111 of corresponding the plurality of wire perforate 151 Can synchronize to be formed with the heavily doped region 170 of the p-type of multiple alusil alloy at the 111b of face, by described many Produce potential difference between individual heavily doped region 170 and silicon substrate 111, thus multiple local back electricity can be formed The effect of field (LBSF).The position of wherein said multiple heavily doped region 170 and local back electric field is all One_to_one corresponding is distinguished, as shown in Figure 2 with the position of the plurality of second electrode 130.And implement at another In example, when silicon substrate 111 e.g. by N-type silicon wafer constituted time, can first with diffusing, doping technique also Use other relevant materials such as such as phosphorus to adulterate, form multiple at the back side 111b of silicon substrate 111 Every the heavily doped region of N-type of distribution, and the heavily doped region of the N-type of the plurality of phosphorus doping can be with Produce potential difference between silicon substrate, thus form the effect of multiple local back electric field, now the second electrode 130 Material can be silver, aluminum or silver aluminum mixture or other materials.Above-mentioned first electrode 120 or the second electrode 130 can use the deposition technique such as screen painting or CVD, PVD to complete.
As it is shown in figure 1, each second electrode 130 e.g. strip shaped electric poles, and there is bearing of trend D1. The plurality of second electrode 130 is arranged in multiple row along bearing of trend D1, and along being perpendicular to extension side It is arranged in multirow to the orientation D2 of D1.Each second electrode 130 length on bearing of trend D1 Degree is A.The first spacing B is maintained with between the wantonly two second adjacent electrodes 130 of a line.In this enforcement In example, 200 microns of B 1400 microns, and 2 A/B 5.On the other hand, wantonly two row are adjacent The second spacing P, wherein P 1000 microns are maintained between second electrode 130.
Specifically, the plurality of second electrode 130 and the plurality of first spacing B that wantonly two row are adjacent Interlock each other on orientation D2.That is, wherein second electrode 130 in a line with The position of adjacent first spacing B in another row is corresponding.Consequently, it is possible in adjacent different rows Two the first spacing B position will not direct corresponding next-door neighbour, use in avoiding causing silicon substrate 111 Carrier at the first spacing B to move to the hypertelorism of the second electrode 130 and derive electric current collection The problem having some setbacks, thus the lifting of beneficially generating efficiency.
In short, the second electrode 130 e.g. uses the configuration mode of dotted line localizing electrode.Due to length A and the first spacing B meet relational expression: 2 A/B 5, therefore can be adjusted by the big of the first spacing B The little numerical range determining length A.Additionally, the present embodiment also can be adjusted by the first spacing B Size determine length A numerical range while change the size of the second spacing P, use and grown The preferred range of the parameter designing such as degree A, the first spacing B and the second spacing P.Consequently, it is possible to just can Effectively promote the photoelectric transformation efficiency of solaode 100.
For more clearly illustrating the meaning of the present invention, parameter designing proposed by the invention can also be passed through The multiple wire perforates 151 being formed on passivation layer 150 define, and this is due to 130 points of the second electrode Not being filled in wire perforate 151, both shape the most aforementioned substantially matches with profile.
As it is shown in figure 1, each wire perforate 151 has bearing of trend D1.The plurality of wire perforate 151 are arranged in multiple row along bearing of trend D1, and along being perpendicular to the orientation of bearing of trend D1 D2 is arranged in multirow.Each wire perforate 151 a length of A on bearing of trend D1.With a line The first spacing B is maintained between wantonly two adjacent wire perforates 151.200 microns of B 1400 microns, And 2 A/B 5.The second spacing P, wherein P is maintained between the wire perforate 151 that wantonly two row are adjacent 1000 microns.
Specifically, the plurality of wire perforate 151 and the plurality of first spacing B that wantonly two row are adjacent Interlock each other on orientation D2.Wherein a wire perforate in a line 151 with The position of adjacent first spacing B in another row is corresponding, uses lifting and is filled in the plurality of line The effect of the electric current collection of the plurality of second electrode 130 in shape perforate 151.In aforementioned wire perforate Under the layout of 151, the position of two the first spacing B in adjacent different rows will not be directly corresponding tight Neighbour, uses and avoids causing in silicon substrate 111 carrier at the first spacing B to move to the second electrode The hypertelorism of 130 and problem that derivative electric current collection has some setbacks, thus the lifting of beneficially generating efficiency.
Several experimental example will be enumerated to verify effect of the present invention below.The comparison basis of following experiments data Be with the electrode of non-dashed form traditionally (the most in the direction of extension for purely straight line electrode or It is the electrode of the form of the wire perforate of single straight line on bearing of trend), and the second spacing P separately designs It is 1000 microns and 800 microns to carry out.
Experimental example one: in the second spacing P equal between 1000 microns, and length A and the first spacing B Ratio be respectively the parameter designing such as 2:1,4:1 and 5:1 under the conditions of, the photoelectricity of solaode 100 Conversion efficiency, its result is as shown in following table one.
Table one
Experimental example two: in the second spacing P equal between 800 microns, and length A and the first spacing B Ratio be respectively the parameter designing such as 2:1,4:1 and 5:1 under the conditions of, the photoelectricity of solaode 100 Conversion efficiency, its result is as shown in following table two.
Table two
Can be learnt with table two by table one, the ratio (i.e. A:B) between length A and the first spacing B When being increased to 4:1 by 2:1, the photoelectric transformation efficiency of solaode 100 can obtain and promote significantly. But, when the ratio (i.e. A:B) between length A and the first spacing B continues to increase to 5:1, too Sun can the photoelectric transformation efficiency of battery 100 is the most rough when being returned to A:B=2:1 level.Additionally, when the One spacing B in time increasing to 1600 microns for 200 microns, the light of the solaode 100 of experimental example one Photoelectric transformation efficiency can be in first spacing B interval more than or equal to 400 microns and less than or equal to 1200 microns In the range of approach peak value, and the photoelectric transformation efficiency of the solaode 100 of experimental example two can be between first Peak value is approached, the in B is more than or equal to 400 microns and less than or equal to the interval range of 1000 microns One spacing B more than after 1400 microns, the ratio between length A and the first spacing B be respectively 2:1, The photoelectric transformation efficiency of the solaode 100 of 4:1 and 5:1 is the most rough is returned to the first spacing B etc. Level in 200 microns time.Therefore, it is established as by by the parameter designing of the configuration of the second electrode 130 1000 microns, 200 microns B of P 1400 microns and 2 A/B 5, can promote too effectively The photoelectric transformation efficiency of sun energy battery 100.
Hereinafter will enumerate other embodiments using as explanation.Should be noted that at this, following embodiment edge With reference numerals and the partial content of previous embodiment, wherein use identical label to represent identical or near As assembly, and eliminate the explanation of constructed content.Before referring to about the explanation of clipped Stating embodiment, it is no longer repeated for following embodiment.
Fig. 3 is the partial cutaway schematic of the solaode of another embodiment of the present invention.Refer to Fig. 3, The solaode 100 of solaode 100A with Fig. 2 of Fig. 3 is substantially similar, both master aforementioned Difference is wanted to be: the solaode 100A of the present embodiment also includes the company being formed on passivation layer 150 Receiving electrode 160.Connect electrode 160 and be electrically connected with the plurality of second electrode 130, wherein connect electrode 160 may make up back electrode 180 with the plurality of second electrode 130.This Fig. 3 illustrates that and typically exists The back side of Fig. 2 is still to have and arranges connection electrode 160, thus constitutes and can the most outwards be transmitted by electric power Back electrode 180.
Due to connect electrode 160 be covered on passivation layer 150 the most comprehensively with each wire perforate The second electrode 130 in 151 contacts, and therefore the second electrode 130 in each wire perforate 151 can lead to Cross connection electrode 160 and be electrically connected to each other, use and in silicon substrate 111, the most outwards collect photoproduction carrier Transmission.It is said that in general, the material connecting electrode 160 can be silver, aluminum or silver aluminum mixture, and this enforcement The material connecting electrode 160 of example e.g. selects aluminium paste.
In another embodiment, connect electrode 160 and do not cover on passivation layer 150 comprehensively, Jin Erke Expose a part for passivation layer 150.In other words, as long as each second electrode 130 can be made the most electrical Connecting, connection electrode 160 may be used without the aspects such as banding, strip or dendroid and is formed at passivation layer 150 On, use to save making the material cost connecting electrode 160.In another embodiment, it is possible to silica-based The back side 111b of material 111 is formed with back of the body silver electrode (not shown), and the quantity of back of the body silver electrode regards reality Depending on demand.The configuration of back of the body silver electrode can use the complete suspension joint being only located on passivation layer 150 (floating) form.This means, back of the body silver electrode is not in contact with the back side 111b to silicon substrate 111, or Having the form of the back side 111b touching silicon substrate 111, wherein back of the body silver electrode welds mainly as welding Connect used.
In sum, the second electrode of the solaode of the present invention uses the configuration side of dotted line localizing electrode Formula, wherein the second electrode has bearing of trend.Second electrode is arranged in multiple row also along aforementioned bearing of trend Being arranged in multirow along the orientation being perpendicular to aforementioned bearing of trend, the most each second electrode is aforementioned A length of A on bearing of trend.The first spacing B is maintained with between the wantonly two second adjacent electrodes of a line, The second spacing P is maintained between the second electrode that wantonly two row are adjacent.
Specifically, 200 microns of B 1400 microns, and length A and the first spacing B meet relation Formula: 2 A/B 5.On the other hand, P 1000 microns.Therefore, the first spacing B it is adjusted by Size determines the numerical range of length A, and determines in the size being adjusted by the first spacing B Change the size of the second spacing P while the numerical range of length A, use and obtain length A, between first Away from the preferred range of the parameter designing such as B and the second spacing P, just can effectively promote solaode Photoelectric transformation efficiency.It is also preferred that the left as P 800 microns, it is the most excellent that it respectively organizes the result under parameter In P 1000.Additionally, work as A:B=4:1, and the first spacing B is respectively equal to 800 microns and 1000 During micron, have second highest 0.16% and the improved efficiency of the highest 0.2% the most respectively.Therefore, when meeting During the conditions such as A:B=4:1,800 microns of B 1000 microns and P 800 microns, solaode Can have good generating effect.
Although the present invention is disclosed by above-described embodiment, but it is not limited to the present invention, any Art has the technical staff of usual knowledge, without departing from the spirit and scope of the present invention In, when making a little change and amendment, so protection scope of the present invention is when regarding appended claims Defined in the range of standard.

Claims (9)

1. a solaode, this solaode includes:
Silicon substrate, has sensitive surface and the back side relative to described sensitive surface;
Emitter layer, is formed at described sensitive surface;
Multiple first electrodes, are positioned on described sensitive surface;
Passivation layer, is positioned on the described back side and has multiple wire perforate;And
Multiple second electrodes, lay respectively in the plurality of wire perforate and contact the described back side, Mei Gesuo Stating the second electrode and have bearing of trend, the plurality of second electrode is arranged in many along described bearing of trend Row, and it is arranged in multirow along the orientation being perpendicular to described bearing of trend, the most each described second The electrode a length of A on described bearing of trend,
With maintaining the first spacing B between wantonly two adjacent the plurality of second electrodes of a line, wherein 200 Micron B 1400 microns, and 2 A/B 5,
Maintaining the second spacing P between the plurality of second electrode that wantonly two row are adjacent, wherein P 1000 is micro- Rice.
Solaode the most according to claim 1, wherein A:B=4:1, and 800 microns B 1000 microns, P 800 microns.
3. according to the solaode described in claim any one of claim 1 and 2, Qi Zhongren Adjacent the plurality of second electrode of two row and the plurality of first spacing in described orientation each other Interlaced.
4. according to the solaode described in claim any one of claim 1 and 2, this sun Can also include by battery:
It is formed at multiple heavily doped regions at the described back side, the plurality of heavily doped region and the plurality of the The position of two electrodes one_to_one corresponding respectively.
5. according to the solaode described in claim any one of claim 1 and 2, this sun Can also include by battery:
The connection electrode being formed on described passivation layer, described connection electrode is electrically connected with the plurality of second Electrode.
6. a solaode, this solaode includes:
Silicon substrate, has sensitive surface and the back side relative to described sensitive surface;
Emitter layer, is formed at described sensitive surface;
Multiple first electrodes, are positioned on described sensitive surface;
Passivation layer, is positioned on the described back side and has multiple wire perforate, and each described wire perforate has Bearing of trend, the plurality of wire perforate is arranged in multiple row along described bearing of trend, and along being perpendicular to The orientation of described bearing of trend is arranged in multirow, and the most each described wire perforate is in described extension side A length of A upwards,
With maintaining the first spacing B between the wantonly two adjacent the plurality of wire perforates of a line, wherein 200 Micron B 1400 microns, and 2 A/B 5,
Maintaining the second spacing P between the plurality of wire perforate that wantonly two row are adjacent, wherein P 1000 is micro- Rice;And
Back electrode, is positioned on described passivation layer and extends to connect with the described back side in the plurality of wire perforate Touch.
Solaode the most according to claim 6, wherein A:B=4:1, and 800 microns B 1000 microns, P 800 microns.
8. according to the solaode described in claim any one of claim 6 and 7, Qi Zhongren The adjacent the plurality of wire perforate of two row and the plurality of first spacing in described orientation each other Interlaced.
9. according to the solaode described in claim any one of claim 6 and 7, this sun Can also include by battery:
It is formed at multiple heavily doped regions at the described back side, the plurality of heavily doped region and the plurality of line The position of shape perforate one_to_one corresponding respectively.
CN201510254798.7A 2015-05-19 2015-05-19 Solaode Pending CN106298984A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108538956A (en) * 2018-03-08 2018-09-14 苏州太阳井新能源有限公司 A method of preparing solar cell surface metal grid lines
CN110383500A (en) * 2017-02-28 2019-10-25 亚特比目有限会社 The manufacturing method of solar battery and solar battery

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203859122U (en) * 2013-07-12 2014-10-01 苏州润阳光伏科技有限公司 All-back contact solar cell electrode
CN104091843A (en) * 2014-07-17 2014-10-08 中利腾晖光伏科技有限公司 Back passivation solar cell and manufacturing method thereof
CN104091842A (en) * 2014-07-07 2014-10-08 常州天合光能有限公司 Distributed local boron-doped double-face photoreceptive crystalline silicon solar cell and preparation method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203859122U (en) * 2013-07-12 2014-10-01 苏州润阳光伏科技有限公司 All-back contact solar cell electrode
CN104091842A (en) * 2014-07-07 2014-10-08 常州天合光能有限公司 Distributed local boron-doped double-face photoreceptive crystalline silicon solar cell and preparation method thereof
CN104091843A (en) * 2014-07-17 2014-10-08 中利腾晖光伏科技有限公司 Back passivation solar cell and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110383500A (en) * 2017-02-28 2019-10-25 亚特比目有限会社 The manufacturing method of solar battery and solar battery
CN108538956A (en) * 2018-03-08 2018-09-14 苏州太阳井新能源有限公司 A method of preparing solar cell surface metal grid lines

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Application publication date: 20170104