CN106298825B - Imaging sensor and preparation method thereof - Google Patents
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- CN106298825B CN106298825B CN201610835403.7A CN201610835403A CN106298825B CN 106298825 B CN106298825 B CN 106298825B CN 201610835403 A CN201610835403 A CN 201610835403A CN 106298825 B CN106298825 B CN 106298825B
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- 238000003384 imaging method Methods 0.000 title claims abstract description 31
- 238000002360 preparation method Methods 0.000 title claims abstract description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 93
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 93
- 239000010703 silicon Substances 0.000 claims abstract description 93
- 239000000758 substrate Substances 0.000 claims abstract description 79
- 239000004065 semiconductor Substances 0.000 claims abstract description 62
- 238000000407 epitaxy Methods 0.000 claims abstract description 47
- 238000002955 isolation Methods 0.000 claims abstract description 44
- 229910052732 germanium Inorganic materials 0.000 claims description 24
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 22
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical group [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 15
- 230000007547 defect Effects 0.000 claims description 15
- 238000010438 heat treatment Methods 0.000 claims description 7
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 5
- 230000005622 photoelectricity Effects 0.000 claims description 5
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical group [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 7
- 150000002500 ions Chemical class 0.000 description 9
- 239000013078 crystal Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- -1 phosphonium ion Chemical class 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000000739 chaotic effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
- H01L27/14669—Infrared imagers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/1469—Assemblies, i.e. hybrid integration
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Abstract
Present invention discloses a kind of imaging sensors and preparation method thereof, comprising: provides the first wafer, first wafer includes the first silicon substrate, the first silicon epitaxy layer and interconnection layer stacked gradually；First wafer is carried out from the side of the silicon substrate to be thinned to first silicon epitaxy layer；The second wafer is provided, second wafer includes the second wafer substrate and the semiconductor layer positioned at second wafer substrate side；Second wafer is bonded with the first wafer after being thinned, the semiconductor layer is towards first silicon epitaxy layer；Second wafer substrate is removed from second wafer；The second isolation structure is prepared in the semiconductor layer exposed, and the second photodiode region is formed in the semiconductor layer.Wherein, the forbidden bandwidth of the semiconductor layer is less than the forbidden bandwidth of silicon, can preferably absorb near infrared light, can effectively improve cmos image sensor conversion quantum efficiency.
Description
Technical field
The present invention relates to image sensor technologies fields, more particularly to a kind of imaging sensor and preparation method thereof.
Background technique
Along with the rapid development of mobile Internet, demand of the people to intelligent terminal is more and more huge, and has intelligence
The imaging sensor of the title of terminal " eyes " has also welcome unprecedented development space.Traditional CCD (Charge-coupled
Device, charge coupled cell) imaging sensor due to its power consumption it is larger, market is confined in high performance digital camera；
Cmos image sensor (CMOS Image Sensor, abbreviation CIS) is not only low in energy consumption, and rate is fast, and is easy to and existing half
Semiconductor process is mutually compatible with, lower production costs, this makes cmos image sensor occupy the half river in imaging sensor market
Mountain.
The main problem that cmos image sensor encounters is quantum efficiency (QE, the quantum of near infrared light
Efficiency) lower.Quantum efficiency refers to that a photon is transformed into the probability of light induced electron in PD.In order to improve infrared light
Quantum efficiency, often will increase the integral thickness of silicon substrate in the prior art, however, obtain in this way CMOS figure
As the performance of sensor is bad.
Summary of the invention
The object of the present invention is to provide a kind of imaging sensors and preparation method thereof, and the amount of near infrared light can be improved
Sub- efficiency, while improving the performance of cmos image sensor.
In order to solve the above technical problems, the present invention provides a kind of preparation method of imaging sensor, comprising:
First wafer is provided, first wafer includes the first silicon substrate and the first silicon epitaxy layer of stacking, and described first
There is the first photodiode area and the first isolation junction for first photodiode area to be isolated in silicon epitaxy layer
Structure；
First wafer is carried out from the side of the silicon substrate to be thinned to first silicon epitaxy layer；
There is provided the second wafer, second wafer includes the second wafer substrate and positioned at second wafer substrate side
Semiconductor layer, the forbidden bandwidth of the semiconductor layer are less than the forbidden bandwidth of the silicon substrate；
Second wafer is bonded with the first wafer after being thinned, wherein the semiconductor layer is towards described the
One silicon epitaxy layer；
Second wafer substrate is removed from second wafer；And
The second isolation structure is prepared in the semiconductor layer exposed, and the second light is formed in the semiconductor layer
Photodiode region, second isolation structure are isolated second photodiode region, second isolation structure and described the
The position of one isolation structure is corresponding, and second photodiode region is corresponding with the position of first photodiode region
Further, the preparation method of described image sensor further include: carry out ion implanting and served as a contrast in second wafer
Bottom surface forms defect layer to the surface of the semiconductor layer side.
It further, will along the defect layer in the step of second wafer substrate being removed from second wafer
Second wafer substrate is removed from the side of the semiconductor layer.
Further, the defect layer is hydrogen ion doped layer.
Further, the semiconductor layer is germanium-silicon layer.
Further, the step of the second wafer of the offer includes:
Second wafer substrate is provided；
Ion implanting, which is carried out, in second wafer substrate forms the second wafer doped layer；
Germanium layer is formed in the side of second wafer substrate using epitaxy technique, and in second wafer substrate and germanium
The germanium-silicon layer is formed between layer, the germanium-silicon layer is the semiconductor layer；
The germanium in the germanium layer is advanced in second wafer substrate using circle heat treatment, while described
Silicon in two wafer substrates diffuses in the germanium layer, forms the thicker semiconductor layer；
Remove the germanium layer.
Further, the depth of the defect layer is greater than the depth of the second wafer doped layer.
Further, the circle heat treatment includes the process of multiple first temperature and second temperature circular treatment,
First temperature is 750 DEG C~950 DEG C, and the second temperature is 650 DEG C~850 DEG C.
Further, second wafer substrate includes the second silicon substrate and positioned at the second of second silicon substrate side
Silicon epitaxy layer, the second wafer doped layer are located in second silicon epitaxy layer, and the germanium-silicon layer is located at outside second silicon
Prolong the side that layer deviates from second silicon substrate, the second wafer doped layer is located in second silicon epitaxy layer.
Further, first photodiode area includes first kind doped region and Second Type doped region
Domain, the Second Type doped region are arranged towards first silicon substrate, the doping type of second photodiode region
For Second Type.
The present invention also provides a kind of imaging sensors, comprising:
First wafer, first wafer include the first silicon epitaxy layer, have the first photoelectricity in first silicon epitaxy layer
Diode area and the first isolation structure for first photodiode area to be isolated；
Second wafer, second wafer includes semiconductor layer, and the forbidden bandwidth of the semiconductor layer is less than monocrystalline silicon
Forbidden bandwidth, in the semiconductor layer with the second photodiode region and for second photodiode region to be isolated the
Two isolation structures；
Second wafer and the first wafer bonding are together, wherein the semiconductor layer is towards first silicon epitaxy
Layer setting, second isolation structure is corresponding with the position of first isolation structure, second photodiode region and
The position of first photodiode region is corresponding.
Compared with prior art, imaging sensor provided by the invention and preparation method thereof has the advantage that
In described image sensor and preparation method thereof, by the method for wafer bonding, the of first wafer
One silicon epitaxy layer (i.e. photodiode area) has been bonded semi-conductor layer, and the forbidden bandwidth of the semiconductor layer is less than the silicon
The forbidden bandwidth of substrate can preferably absorb near infrared light, can effectively improve cmos image sensor conversion quantum efficiency.
Further, it is compatible well technique to be made with present silicon single crystal in germanium and silicon epitaxial technique, thus is easier
It applies in current cmos image sensor technique.
Detailed description of the invention
Fig. 1 is the flow chart of the preparation method of imaging sensor in one embodiment of the invention；
Fig. 2 to Figure 11 is the schematic diagram of device architecture in the preparation method of the imaging sensor of one embodiment of the invention.
Specific embodiment
The quantum efficiency of near infrared light is improved by increasing the integral thickness of silicon substrate in existing imaging sensor, so
And the performance of the cmos image sensor obtained in this way is bad.Inventor studies existing imaging sensor and sends out
It is existing, the quantum efficiency of near infrared light is improved by increasing the integral thickness of silicon substrate in existing imaging sensor, from current
2um~3um increase to 5um~10um.Conversion quantum efficiency can be improved in the simple monocrystalline silicon thickness that increases, but following
Process challenge also constantly aggravate, for example need deeper ion implanting, and deeper ion implanting may require that thicker light
Photoresist, and thick photoresist can reduce the resolution ratio of minimum dimension, eventually affect the performance of cmos image sensor.Furthermore
Thick monocrystalline silicon can bring the technological problems of lithography alignment again, need to increase additional technique to realize Alignment Process.
Inventor further study show that, due to the inherent characteristic of band structure, there is near infrared light in silicon single crystal material
The problems such as absorption coefficient is low, absorption length is long.Enter sub-micron, deep-submicron model especially with feature sizes of semiconductor devices
It encloses, operating voltage is smaller and smaller, and transistor P-N junction is more and more shallow, and depletion region is increasingly closer from surface, thickness is more and more thinner, very
It is difficult effectively to absorb incident optical signal, and the photo-generated carrier generated in substrate depths is due to can not be quickly by electrical field draw
It is compound, photoelectric current is not contributed, causes the cmos image sensor quantum conversion made very low.
Inventor furthers investigate discovery, and the forbidden bandwidth of germanium silicon material is less than the forbidden bandwidth of silicon, if by germanium silicon material
It applies in CMOS image sensor product, can preferably absorb near infrared light, can effectively improve cmos image sensor
Conversion quantum efficiency.
According to the studies above, the present invention provides a kind of preparation method of imaging sensor, provides a kind of imaging sensor
Preparation method, as shown in Figure 1, including the following steps:
Step S11 provides the first wafer, and first wafer includes the first silicon substrate and the first silicon epitaxy layer of stacking,
In first silicon epitaxy layer with the first photodiode area and for first photodiode area to be isolated the
One isolation structure；
Step S12 carries out first wafer from the side of the silicon substrate to be thinned to first silicon epitaxy layer；
Step S13, provides the second wafer, and second wafer includes the second wafer substrate and serves as a contrast positioned at second wafer
The semiconductor layer of bottom side, the forbidden bandwidth of the semiconductor layer are less than the forbidden bandwidth of the silicon substrate；
Second wafer is bonded, wherein the semiconductor level by step S14 with the first wafer after being thinned
To first silicon epitaxy layer；And
Step S15 removes second wafer substrate from second wafer.
Step S16 prepares the second isolation structure, and the shape in the semiconductor layer in the semiconductor layer exposed
At the second photodiode region, second photodiode region, second isolation structure is isolated in second isolation structure
It is corresponding with the position of first isolation structure, the position of second photodiode region and first photodiode region
It sets corresponding.
By the method for wafer bonding, it is bonded in the first silicon epitaxy layer (i.e. photodiode area) of first wafer
Semi-conductor layer, the forbidden bandwidth of the semiconductor layer are less than the forbidden bandwidth of the silicon substrate, can preferably absorb close
Infrared light can effectively improve cmos image sensor conversion quantum efficiency.
Further, it is compatible well technique to be made with present silicon single crystal in germanium and silicon epitaxial technique, thus is easier
It applies in current cmos image sensor technique.
Imaging sensor and preparation method thereof of the invention is described in more detail below in conjunction with schematic diagram, wherein
Illustrating the preferred embodiment of the present invention, it should be appreciated that those skilled in the art can modify invention described herein, and still
So realize advantageous effects of the invention.Therefore, following description should be understood as the widely known of those skilled in the art,
And it is not intended as limitation of the present invention.
For clarity, not describing whole features of practical embodiments.In the following description, it is not described in detail well known function
And structure, because they can make the present invention chaotic due to unnecessary details.It will be understood that opening in any practical embodiments
In hair, it is necessary to make a large amount of implementation details to realize the specific objective of developer, such as according to related system or related business
Limitation, changes into another embodiment by one embodiment.Additionally, it should think that this development may be complicated and expend
Time, but to those skilled in the art it is only routine work.
The present invention is more specifically described by way of example referring to attached drawing in the following passage.It is wanted according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
Below in conjunction with Fig. 2 to Figure 11, the preparation method of imaging sensor of the invention is illustrated, Fig. 2 to Figure 11 is this
Invent the schematic diagram of device architecture in the preparation method of the imaging sensor of an embodiment.
Firstly, carrying out step S11, as shown in Fig. 2, providing the first wafer 100, first wafer 100 includes successively layer
Folded the first silicon substrate 110 and the first silicon epitaxy layer 120 has multiple first photoelectricity, two poles in first silicon epitaxy layer 120
Area under control domain 121 and the first isolation structure 122 for first photodiode area 121 to be isolated, wherein first light
Photodiode area 121 is used to prepare photodiode.
In addition, first wafer 100 can also include interconnection layer 130, the interconnection layer 130 is located at outside first silicon
Prolong the side that layer 120 deviates from first silicon substrate 110, the interconnection layer 130 includes pixel array, the knot of the pixel array
Structure may include the structures such as grid, connection pore structure, interconnection line.First silicon substrate 110, the first silicon epitaxy layer 120 and mutually
Even layer 130 preparation process can use standard semi-conductor processes, this be it will be appreciated by those skilled in the art that, herein not
It repeats.
In the present embodiment, first silicon substrate 110 and the first silicon epitaxy layer 120 are p-type doping, in other implementations
In example, first silicon substrate 110 and the first silicon epitaxy layer 120 can also be n-type doping.First silicon epitaxy layer 120
Doping concentration be lower than first silicon substrate 110 doping concentration, the resistance value of first silicon epitaxy layer 120 is about 1ohm/
The resistance value of cm~50ohm/cm, first silicon substrate 110 are about 0.01ohm/cm~0.1ohm/cm.
Preferably, first photodiode area 121 includes that first kind doped region 1211 and Second Type are mixed
Miscellaneous region 1212, the Second Type doped region 1212 are arranged towards first silicon substrate 110, wherein in the present embodiment
In, the first kind is p-type, and Second Type is N-type, in other embodiments, can be using the first kind as N-type, Second Type P
Type.In the present embodiment, first isolation structure 122 is ion implanting isolation structure, and first isolation structure 122 is mixed
Miscellany type be p-type, in other embodiments, first isolation structure 122 can also for dielectric isolation (such as shallow-trench isolation or
Deep trench isolation) etc. structures.
Then, step S12 is carried out, as shown in figure 3, carrying out from the side of the silicon substrate 110 to first wafer 100
It is thinned to first silicon epitaxy layer 120.Specifically, can be in the interconnection layer 130 away from first silicon epitaxy layer 120
Side and a bonded wafer 300 are bonded, and are then ground to the side of the silicon substrate 110 to first wafer 100
Mill.During thinned, can the first silicon epitaxy layer 120 described part be thinned to suitable thickness, thinned
The thickness of one silicon epitaxy layer can be 2 μm~10 μm.
Later, step S13 is carried out, as shown in figure 4, providing the second wafer 200, second wafer 200 includes second brilliant
Circle substrate and the semiconductor layer positioned at second wafer substrate side.In the present embodiment, the step S13 includes following son
Step S131~sub-step S135:
Sub-step S131, as shown in figure 4, providing second wafer substrate 210, in the present embodiment, described second is brilliant
Circle substrate 210 includes the second silicon substrate 211 and the second silicon epitaxy layer 212 positioned at 211 side of the second silicon substrate；
Sub-step S132 mixes as shown in figure 5, carrying out ion implanting the second wafer of formation in second wafer substrate 210
Diamicton 213, the second wafer doped layer 213 are located in second silicon epitaxy layer 212.In the present embodiment, described second
Wafer doped layer 213 is n-type doping, and in other embodiments, the second wafer doped layer 213 can also adulterate for p-type.Tool
Body, phosphonium ion can be injected on second silicon epitaxy layer 212, to be formed on 200 surface of the second wafer highly concentrated
Second wafer doped layer 213 described in the N-type of degree；
Sub-step S133, as shown in fig. 6, forming germanium layer in the side of second wafer substrate 210 using epitaxy technique
230, when forming the germanium layer 230, part germanium ion can enter in second silicon epitaxy layer 212, thus described second
The germanium-silicon layer 220 is formed between wafer substrate 210 and germanium layer 230, the germanium-silicon layer 220 is used as the semiconductor layer, described
The forbidden bandwidth of germanium-silicon layer 220 is less than the forbidden bandwidth of the silicon substrate, and in other embodiments, the semiconductor layer can be with
It is numerous to list herein for other materials；
The germanium-silicon layer 220 and the second wafer substrate 210 are removed in order to facilitate in the next steps, preferably,
In the present embodiment, further includes: as shown in fig. 7, carrying out ion implanting in second wafer substrate 210 towards the semiconductor
The surface of 220 side of layer forms defect layer 214, and the depth of the defect layer 214 is greater than the depth of the second wafer doped layer 213
Degree.Preferably, the defect layer 214 is hydrogen ion doped layer, i.e., in second wafer substrate 210 towards the semiconductor layer
H ion is injected on the surface of 220 sides, and the H ion can destroy the lattice of crystal in second wafer substrate 210, to be formed
The defect layer 214, is removed in which can be convenient.
Sub-step S134, as shown in figure 8, being advanced to the germanium in the germanium layer 230 using circle heat treatment described
In second wafer substrate 210, while the silicon in second wafer substrate 210 diffuses in the germanium layer 230, is formed thicker
The semiconductor layer (germanium-silicon layer 220).In the present embodiment, the remaining second wafer doped layer 213 and part institute
Germanium layer 230 is stated as the germanium-silicon layer 220.Further, the circle heat treatment includes multiple first temperature and second
The process of temperature cycles processing, first temperature are 750 DEG C~950 DEG C, and the second temperature is 650 DEG C~850 DEG C, each
Circulation about 1 minute~10 minutes, by 5~15 cycle heat treatment processes, it can form the suitably described SiGe of thickness
Layer 220；
Sub-step S135, as shown in figure 9, the germanium layer 230 is removed, specifically, grinding technics can be used the germanium
Layer 230 removes.
Later, carry out step S14, as shown in Figure 10, by second wafer 200 be thinned after the first wafer 100 into
Line unit closes, wherein the semiconductor layer 220 is bonded towards first silicon epitaxy layer 220.
Then, step S15 is carried out as shown in figure 11 to shell second wafer substrate 210 from second wafer 200
From exposing the semiconductor layer 220, in the present embodiment, due to being prepared for the defect layer 214, in the defect layer 214
There is defect in crystal, when heated, can along the defect layer 214 by second wafer substrate 210 from the semiconductor
The side removing of layer 220.
Then, step S16 is carried out, continues to refer to figure 11, the second isolation is prepared in the semiconductor layer 220 exposed
Structure 222, and multiple second photodiode regions 221 are formed in the semiconductor layer 220, second isolation structure 222
Second photodiode region is isolated, second isolation structure 222 is opposite with the position of first isolation structure 122
It answers, 221st area of the second photodiode is corresponding with the position of first photodiode region 121.In the present embodiment,
When forming second isolation structure 222, self-assembling formation be isolated by second isolation structure 222 multiple described second
Photodiode region 221.
Since the second wafer doped layer 213 is n-type doping, so the doping of first photodiode region 1211
Type is n-type doping, and in the present embodiment, second isolation structure 222 is deep groove isolation structure.
Further, it is also possible to a P-type layer is formed away from the side of first silicon epitaxy layer 120 in the semiconductor layer 220,
And the bonded wafer 300 that can go out.
In imaging sensor as shown in figure 11, described image sensor includes the first wafer 100 and the second wafer 200,
First wafer 100 includes the first silicon epitaxy layer 120, has the first photodiode region in first silicon epitaxy layer 120
Domain 121 and the first isolation structure 122 for first photodiode area 121 to be isolated；Second wafer 200 includes
Semiconductor layer 220, the forbidden bandwidth of the semiconductor layer 220 are less than the forbidden bandwidth of monocrystalline silicon, have in the semiconductor layer 220
There are the second photodiode region 221 and the second isolation structure 222 for second photodiode region 221 to be isolated；It is described
Second wafer 100 and the first wafer 200 are bonded together, wherein the semiconductor layer 220 is towards first silicon epitaxy layer
120 settings, second isolation structure 222 is corresponding with the position of first isolation structure 122, two pole of the second photoelectricity
Area under control 221 is corresponding with the position of first photodiode region 121.Second photodiode region 221 and described the
One photodiode region 121 forms photodiode 2, and second isolation structure 222 and first isolation structure 122 are common
The adjacent photodiode 2 is isolated.
In finally formed structure, photodiode, the semiconductor layer are used to form in the semiconductor layer 220
220 forbidden bandwidth is less than the forbidden bandwidth of silicon, can preferably absorb near infrared light, can effectively improve cmos image sensing
Device conversion quantum efficiency.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (9)
1. a kind of preparation method of imaging sensor characterized by comprising
There is provided the first wafer, first wafer includes the first silicon substrate and the first silicon epitaxy layer of stacking, outside first silicon
Prolonging has the first photodiode area and the first isolation structure for first photodiode area to be isolated in layer；
First wafer is carried out from the side of the silicon substrate to be thinned to first silicon epitaxy layer；
The second wafer is provided, second wafer includes the second wafer substrate and partly leading positioned at second wafer substrate side
Body layer, the forbidden bandwidth of the semiconductor layer are less than the forbidden bandwidth of the silicon substrate；
Second wafer is bonded with the first wafer after being thinned, wherein the semiconductor layer is towards first silicon
Epitaxial layer；
Second wafer substrate is removed from second wafer；And
The second isolation structure is prepared in the semiconductor layer exposed, and the second photoelectricity two is formed in the semiconductor layer
Pole pipe area, second isolation structure are isolated second photodiode region, second isolation structure with described first every
Corresponding from the position of structure, second photodiode region is corresponding with the position of first photodiode region.
2. the preparation method of imaging sensor as described in claim 1, which is characterized in that the preparation side of described image sensor
Method further include: carry out ion implanting in second wafer substrate and form defect layer towards the surface of the semiconductor layer side.
3. the preparation method of imaging sensor as claimed in claim 2, which is characterized in that by second wafer substrate from institute
In the step of stating the removing of the second wafer, second wafer substrate is shelled from the side of the semiconductor layer along the defect layer
From.
4. the preparation method of imaging sensor as claimed in claim 2, which is characterized in that the defect layer is hydrogen ion doped
Layer.
5. the preparation method of the imaging sensor as described in any one of claim 2-4, which is characterized in that the semiconductor
Layer is germanium-silicon layer.
6. the preparation method of imaging sensor as claimed in claim 5, which is characterized in that the step of the second wafer of the offer
Include:
Second wafer substrate is provided；
Ion implanting, which is carried out, in second wafer substrate forms the second wafer doped layer；
Form germanium layer in the side of second wafer substrate using epitaxy technique, and second wafer substrate and germanium layer it
Between form the germanium-silicon layer, the germanium-silicon layer is the semiconductor layer；
The germanium in the germanium layer is advanced in second wafer substrate using circle heat treatment, while described second is brilliant
Silicon in circle substrate diffuses in the germanium layer, forms the thicker semiconductor layer；
Remove the germanium layer.
7. the preparation method of imaging sensor as claimed in claim 6, which is characterized in that the circle heat treatment includes
The process of multiple first temperature and second temperature circular treatment, first temperature are 750 DEG C~950 DEG C, the second temperature
It is 650 DEG C~850 DEG C.
8. the preparation method of imaging sensor as described in claim 1, which is characterized in that first photodiode area
Including first kind doped region and Second Type doped region, the Second Type doped region is towards first silicon substrate
Setting, the doping type of second photodiode region are Second Type.
9. a kind of imaging sensor characterized by comprising
First wafer, first wafer include the first silicon epitaxy layer, have two pole of the first photoelectricity in first silicon epitaxy layer
Area under control domain and the first isolation structure for first photodiode area to be isolated；
Second wafer, second wafer includes semiconductor layer, and the forbidden bandwidth of the semiconductor layer is less than the forbidden band of monocrystalline silicon
Width, in the semiconductor layer with the second photodiode region and for second photodiode region to be isolated second every
From structure；
Second wafer and the first wafer bonding are together, wherein the semiconductor layer is set towards first silicon epitaxy layer
Set, second isolation structure is corresponding with the position of first isolation structure, second photodiode region with it is described
The position of first photodiode region is corresponding.
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