CN106297881A - The health control of non-volatility memorizer - Google Patents
The health control of non-volatility memorizer Download PDFInfo
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- CN106297881A CN106297881A CN201510277998.4A CN201510277998A CN106297881A CN 106297881 A CN106297881 A CN 106297881A CN 201510277998 A CN201510277998 A CN 201510277998A CN 106297881 A CN106297881 A CN 106297881A
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Abstract
The invention discloses a kind of device for controlling non-volatility memorizer programming.Non-volatility memorizer includes at least one block (block).Block is divided into several physical zone (physical section).Each physical zone includes several memory element (memory cell).Device includes a controller (controller), in order to access a form (table).Form includes the information corresponding to (corresponding to) each physical zone.Controller is according to this information of one first physical zone corresponding to these physical zone in form, identify that (identify) goes out one first programmed method (first programming method) of the first physical zone, and according to the information of one second physical zone corresponding to these physical zone in form, identify one second programmed method (second programming method) of the second physical zone.Controller programs (program) the first physical zone and the second physical zone according to the first programmed method and the second programmed method the most respectively.
Description
Technical field
The present invention relates to a kind of aging section (degraded sections) managing non-volatility memorizer
Method, and particularly to adjust aging section programming method.
Background technology
In one non-volatile (non-volatile, NV) memorizer, a memory element (memory cell)
A single charge-stroage transistor (a single charge storing transistor) can be included.With NAND
As a example by the non-volatility memorizer of type flash memories, multiple memory element are configured in an array,
This array includes the memory element that multiple row and column interconnects.These memory element are with a plurality of wordline (word
And multiple bit lines (bit line) is connected line).For example, each memory element on string is even
Connect a common word line, and each memory element in a line is at least connected with a shared bit line.Common word line
The grid of generally upper with the row each transistor of memory element is connected, and common word line generally stores list with on row
Source electrode or the drain electrode of each transistor of unit are connected.
In some non-volatility memorizer, such as NAND-type flash memory memorizer, memory element can
It is managed according to hierarchy (hierarchical structure) and controls.For example, storage
Device cell array is divided into (grouped) one or more block (block), and each block is divided into
(devide) one or more page (page), each page corresponds to a wordline.Physical page right and wrong
Programming unit basic in volatile storage, the memory element making composition physical page can be in programming journey
Sequence is programmed jointly, such as write operation (write operation).Constitute the storage of physical page
Unit number can be determined by the memory element number controlled by common word line.In some level
(hierarchies) in, the memory element of common word line (i.e. physical page) can be divided into one with
On physical location (physical unit).It addition, physical location can include by one or more
Multiple memory element that wordline controls.
The memory element of flash memories is typically via applying specific voltage to be programmed or to erase
The wordline of Destination Storage Unit and one or more bit line and be programmed or erase.Along with the time of use
Increasing, the operation repeatedly programming/erasing consumes the transistor constituting memory element, causes they change property
Can, cause the bit-errors of memory element, more likely affect adjoining memory cell.This transistor is tired
Or aging (degradation) can change usefulness and the reliability of memory element, more likely (wear)
Make memory element unavailable (unusable).The useful life (useful life) of non-volatility memorizer
Generally by memory element become unavailable before, tolerant programming/erase (program/erase,
P/E) number of times represents (represent).In some systems, once memory element is carried out
(experience) programming of pre-determined number/erase (program/erase, P/E) or be proved to performance
Aging, memory element is considered as unavailable and rollback (retire) from following use.
Generally in non-volatility memorizer, such as flash memory, the logical-physical address reflection of memory element
(logical-to-physical mapping) is designed in block level (block level).So, i.e.
Make not to be that in block, all memory element are the most aging or unavailable, when some storage of a block is single
Unit becomes unavailable, including the hierarchical block (hierarchical of aging or unavailable memory element
Block) it is rollback.And when the resource block size of nonvolatile memory device becomes more and more big, and this is normal
The block backing method (block retirement scheme) of rule significantly have lost the storage of storage arrangement
Deposit ability.Because constituting the fatigue of the memory element of (constituting) physical page or aging journey
Degree can change (such as due to the uneven programming/erase of physical page in single block considerably
Number of times).Conventional block backing method may unnecessarily (unnecessarily) rollback useful
Memory element, and cause memory capacity to be wasted.
Summary of the invention
According to the present invention it is proposed that a kind of device for controlling non-volatility memorizer programming.This is non-waves
The property sent out memorizer includes at least one block (block), and this block is divided into multiple physical zone
(physical section), each physical zone includes multiple memory element (memory cell).This dress
Putting and include a controller (controller), in order to access a form (table), this form includes correspondence
An information in (corresponding to) these physical zone.This controller is also according in this form
Corresponding to this information of one first physical zone of these physical zone, identify (identify) go out this
One first programmed method (first programming method) of one physical zone, and according to this form
In corresponding to this information of one second physical zone of these physical zone, identify this second physical areas
One second programmed method (second programming method) of section.This controller basis the most respectively
This first programmed method and this second programmed method program (program) this first physical zone and are somebody's turn to do
Second physical zone.
Also according to the present invention, proposing a kind of method for programming non-volatility memorizer, this is non-volatile
Property memorizer includes that multiple block (blocks), each block include multiple physical zone (physical
Section), each physical zone includes multiple memory element (memory cell).The method includes receiving
One control signal (control signal), to carry out a programming behaviour at one or more of these physical zone
Make (programming operation), and access one form (table), this form include corresponding to
An one or more of information of (corresponding to) these physical zone.The method further includes root
According in this form corresponding to an information of one first physical zone, identify (identify) this first physics
One first programmed method (first programming method) of section, and according to corresponding in this form
In another information of one second physical zone, identify one second programmed method of this second physical zone
(second programming method).The method also include respectively according to this first programmed method and
This second programmed method programming (program) this first physical zone and this second physical zone.
It addition, propose a kind of system for controlling memory program.This system includes that one is non-volatile
Storage arrangement (non-volatile memory device), nonvolatile memory device includes at least
One block (block), this block is divided into multiple physical zone (physical section), each thing
Reason section includes multiple memory element (memory cell).This system also includes a form (table),
This form includes the information corresponding to (corresponding to) each physical zone, and includes one
Controller, this controller is in order to control this nonvolatile memory device (non-volatile memory
Device) programming.This controller is in order to receive a control signal (control signal), with at this
One or more of a little physical zone is programmed operating (programming operation), and access should
Form (table), corresponds to one or more of (corresponding to) these physical zone with identification
Information.This controller is also according to an information of one first physical zone, in order to identify (identify)
One first programmed method (first programming method) of this first physical zone, and according to one
Another information of second physical zone, identifies one second programmed method (second of this second physical zone
programming method).This controller is the most respectively according to this first programmed method and this second programming
Method is in order to program (program) this first physical zone and this second physical zone.
Feature and advantage consistent with the present invention will partly illustrate, and part
Will be apparent from the description, or the practice of the permeable present invention is understood.Such feature and advantage
The feature that will transmit through the present invention particularly pointed out in claims claims will partly be explained with advantage
It is set forth in the following part that is embodied as, and part will be it is clear that maybe can pass through from describe
The practice of the present invention and learn.These feature and advantage will transmit through and particularly point out in appended claims
Key element and combination realize and obtain.
It should be appreciated that general description and the following detailed description above are exemplary reconciliation
The property released rather than in order to limit the content that the present invention is asked.
It is merged in description and constitutes some realities of a part of accompanying drawing explanation present invention of this specification
Execute example, and with description together for explaining the principle of the present invention.
Accompanying drawing explanation
Fig. 1 is to schematically show one in order to control the programming of a memorizer according to an exemplary embodiment
Device；
Fig. 2 is to show an exemplary healthy form according to an exemplary embodiment, and this health form is used
Multiple physical zone in a memorizer；
One classification knot of the exemplary block memory element that Fig. 3 is schematically shown in a memorizer
Structure；
Fig. 4 A and Fig. 4 B illustrates to program an exemplary coded method of a memory element
(encoding scheme)；
Fig. 5 is the flow chart showing a program according to an exemplary embodiment, according in healthy form
The physical zone of programming information memorizer.
[symbol description]
100: device
110: main frame
120: controller
130: storage arrangement
135: management storage arrangement
200: healthy form
202,204,206: row
300: memory array
500: method
510～570: step
Detailed description of the invention
Embodiment consistent with the present invention includes the system managing and controlling non-volatility memorizer
With method, based on a determination that the health status of physical zone, through dynamically adjusting or to adjust memorizer each
The programming of physical zone and/or error correcting method.Memorizer can include identifying in multiple physical zone old
The form of physical zone in change, so that controller determines that intended programming or error correcting method are to realize
In each physical zone.The healthy form of system and method for the present invention can include each thing of multiple physical zone
The health data of reason section, these physical zone are included in a block of a memory array.According to
The health status of the physical zone that healthy form is pointed out, when physical zone is aging and/or becomes unavailable,
The present embodiment is dynamically adjusted programmed method and/or the rollback of each physical zone of a memory block
Each physical zone.Therefore, consistent with the embodiment of the present invention, according to the programmed method adjusted or each physics
The rollback of section, the storage volume of memory element can be adjusted in time.Therefore, it can receding portion
Aging or disabled memory array array storage unit, without the intact block of rollback memory array.
It addition, in other embodiments, an error correcting method can be adjusted over time, with to one
The a large amount of mistakes causing physical zone aging in the memory array of block carry out detecting (detect) and
Correction (correct).Therefore, in a memory array, the useful life of each physical zone can be extended
(extend), need not this physical zone of rollback or an intact block of this memory array prematurely.
Hereinafter, multiple embodiments combine accompanying drawing and are described.As much as possible, identical accompanying drawing mark
Note symbol the most all refers to same or similar parts.
Fig. 1 schematically illustrates an exemplary device 100, in order to manage and to control a memory device
Put the programming (and other operations) of 130, consistent with embodiments of the invention.Device 100 includes one
Main frame (host) 110, one or more Memory Controller 120 and one or more storage arrangement 130.
In one embodiment, one or more Memory Controller 120 is provided and one or more storage arrangement
130 together as a part for a management storage arrangement 135.In another embodiment, one or many
Individual Memory Controller 120 is independent controller, is provided the part as main frame 110.Separately
Outward, in certain embodiments, one or more Memory Controller 120, one or more storage arrangement
130 and one manage storage arrangement 135 is included as a part for main frame 110.
The main frame 110 of disclosed embodiment can include any host computer system (host system) or calculate
Device (computing device), such as desktop computer, notebook computer, panel computer, movement
Phone, memory card reader, robot device or any other deposit in order to access (such as reading or writing)
The calculating device of reservoir device 130 data.Main frame 110 can include accessing storage arrangement 130
Any amount of known other elements (components) and circuit (circuitry), including one or
Multiple Memory Controllers 120.
One or more controller 120 described is in order to perform with the present invention management and control storage arrangement
The method that 130 embodiments programmed are consistent.One or more Memory Controller described can include element and
Any quantity of circuit and combination are with the method performing disclosed embodiment, and other operations, such as
Error correction, reading and writing known to one skilled in the art and operation of erasing, reflection (mapping)
And again video (remapping).For example, controller 120 can include one or more state machine
(state machines), register file (register files) and other logic circuits (logic
circuitry).This logic circuit can be special circuit (circuitry) or programmable gate array circuit
(programmable gate array circuit), maybe can be carried out (implement) is place able to programme
Manage device (programmable processor) or have the microprocessor of associated software instruction.Described one
Or multiple controller 120 can include any combination of these or other well known elements, and can be provided that work
For such as a single device of microprocessor, multiple self-contained unit maybe can be implemented to.Here can adopt
With the one or more memorizeies that can perform the inventive method known to one skilled in the art
Any structure of controller 120.
According to exemplary embodiment, one or more controller 120 described can include any applicable defeated
Enter output interface (I/O interface) to couple controller 120 to main frame 110 He with having ability to communicate
/ or storage arrangement 130.Controller 120 is coupled to storage arrangement 130 with can having ability to communicate,
Through input/output bus (I/O bus) and/or in order to link up control bus and/or the use of control signal
To address (addressing) or to perform the instruction of following illustrative methods.
One or more storage arrangement 130 described can include any kind of storage arrangement, including but
It is not limited to non-volatile NAND or NOR-type flash memory, Ovonics unified memory (phase-change
Memory, PCM), resistor type random access access memorizer (resistive random-access-memory,
Or other kinds of non-volatility memorizer any currently known or leaved for development RRAM).Especially,
Any kind of memorizer can benefit from the System and method for of the present invention, respectively depositing of these storage arrangements
These any kind of memorizeies in storage unit or physical zone can suffer from (uniformly or non-uniformly)
Fatigued level (levels of wear).
It addition, one or more storage arrangement 130 described can be according to the programming of any known method or management.
For example, in certain embodiments, one or more storage arrangement 130 described can include multiple three
Rank storage element (triple-level cells, TLC), the i.e. memory element of codified three bit data.?
In one TLC storage arrangement, each memory element can be programmed to retain a specific charge, and citing comes
Say, eight different states can be obtained corresponding to codified three bit data.In other embodiments, institute
State one or more storage arrangement 130 can include multiple multistage storage element (multi-level cells,
MLC), the memory element of four programming states i.e. can be represented corresponding to two coded data.At other
In embodiment, the one or more storage arrangement 130 can include multiple single-order storage element
(single-level cells, SLC), single-order storage element can represent two corresponding to a coded data
Individual programming phases.Along with the evolution of memory technology, storage arrangement 130 can also each storage list
Unit stores four or above position.Embodiments of the invention are not limited to the memory device of an ad hoc structure
Put 130.
In one exemplary embodiment, each memory element of a storage arrangement 130 can be according to each
The coded method of TLC, MLC, SLC type, represents the different programming states storing data.Citing comes
Say, in these embodiments, one or more controller 120 described can according to corresponding to three bit data,
Two bit data or the programmed method of single bit data or coded method, in order to programming memory devices 130
Each memory element.In one exemplary embodiment, one or more controller described is deposited according to by multiple
Storage unit programming or the bit quantity read, adjustable programmed method and read method.For example, exist
In some embodiment, according to the method for expection coding three bit data, some includes storage arrangement 130
The memory element of memory array can be programmed, otherwise, other memory element can be programmed to coding
Two or a data.As described in figure 2 below, one or more controller described can pass through enforcement one and is good for
Health form 200 includes multiple memory element of a memory array, this health table store in order to manage
The payload (payload) of the memory element of information identification write memorizer physical zone or data bit
Quantity.
In other embodiments, one or more controller 120 described and storage arrangement 130 may be used to
Implement different error correcting methods.In certain embodiments, controller 120 or storage arrangement 130
Can include that error recovery logic is to perform any error correcting method known in the art, such as Hamming code
(Hamming code), multi-dimension parity checking code (multi-dimensional parity-check code),
Reed solomon code (Reed-Solomon codes), BCH (Bose-Chaudhuri-Hocquenghem,
BCH) code, Turbo code (Turbo code), low density parity check code (low-density
Parity-check code, LDPC) and other adaptive error correcting methods (adaptive error
correction schemes).In one exemplary embodiment, one or more controller 120 described can be used
To implement the different error correcting methods for physical zone different in a memory array.For example,
In one embodiment, controller 120 may be used to perform one first physical zone of a memory array
BCH error correcting method, and the second physical zone of this memory array is performed LDPC mistake
Bearing calibration.Controller 120 can pass through the healthy form 200 of access in order to a memory array management
Error correction, healthy form 200 stores identification and is implemented on multiple physical zone of a memory array
Error correcting method information.
One or more storage arrangement 130 described can according to intended structure in order to store personal data or
Other useful effective load datas.It addition, except effective load data, one or more storage described
Device device 130 may be used to store metadata (metadata) or overhead data (overhead data),
Such as logical physical address reflection form or other addressing data, and error-correcting code.According to some
Embodiment, one or more storage arrangement 130 described may be used to store excessive data in healthy form
In the form of 200, as shown in Figure 2.The section of memory array can include healthy form 200
And personal data, effective load data or metadata.According in other embodiments of the invention, healthy
Form 200 can be stored from storage arrangement 130 respectively and be deposited via one or more Memory Controller
Take.
According to published embodiment and as it is discussed in further detail below, healthy form 200 includes
Multiple health and fitness informations, it is indicated that corresponding to the specific physical zone of the memory array of storage arrangement 130
Health status or other relevant informations.Healthy form 200 can be by one or more controller 120 described
Access, and can be used for determining suitable programming or a read method, described programming or read method are
Specific physical zone for storage arrangement 130 performs.According to published embodiment, health watch
Lattice 200 can also be accessed to perform error-correcting routine, fatigue by one or more controller 120 described
Level procedure (wear-leveling process) or other programs.
According to an exemplary embodiment and Fig. 2, healthy form 200 can include multiple row, such as
Row 202 include the specific physical zone of recognition memory device 130 or unit (PU-' 0 ' ...,
PU-' Y ') information, row 204 include the healthy letter that identifies the specific physical zone corresponding to row 202
Cease or the information of other relevant informations, and row 206 include identifying the spy corresponding to storage arrangement 130
Determine the information of the address of physical zone.According to exemplary embodiment, healthy form 200 can include additionally
Information, described extraneous information includes other expected address or map informations.
As in figure 2 it is shown, healthy form 200 can include the physical sector number corresponding to a memory array
Amount or the multirow of element number.Healthy form can include a line of each physical zone of a memory array,
Or the subclass of physical zone, or only those are identified as the most just in aging physical zone.
Healthy form 200 in Fig. 2 is only example.Healthy form 200 can also provide storage arrangement 130
The data of other hierarchies, such as block or wordline or other physically or logically structures.At some
In embodiment, the health data corresponding to the specific physical zone of a memory array can be not arranged to
One tableau format, it is possible to implement the known method of its hetero-organization data.
Fig. 3 illustrates the exemplary hierarchical structure of the memory element block of a memory array 300.Such as figure
Shown in 3, include according to described exemplary hierarchical structure according to the memory array 300 of an embodiment
The number of partitions.For example, in one embodiment, memory array 300 includes N+1 block, district
Block 0 to block N.In a disclosed embodiment, a block represents the memory array 300 of segmentation
The highest level (level) of hierarchy.In one exemplary embodiment, one or more block,
Such as block 0, including the memory element of multiple wordline, such as wordline 0 ..., wordline X.These
Wordline corresponds respectively to multiple physical page.In one exemplary embodiment, one or more wordline or thing
The memory element of the reason page is more divided into one or more physical zone or physical location, PU-' 0 ' ...,
PU-' Y ' respectively includes multiple memory element.In the embodiment disclosed, a physical zone is depositing of segmentation
The minimum level of the hierarchy of memory array 300.Storage arrangement 130 can be in intended level
Be managed, such as in block level, wordline level or physical zone level, or other are according to specific knot
The most expected level of structure.In one embodiment, storage arrangement 130 is managed in physical zone,
The most healthy form 200 includes the healthy letter of the physical zone of the memory array of storage arrangement 130
Breath.
The structural formula stratum of the memory array 300 shown in Fig. 3 is merely illustrative.Any hierarchy can
It is carried out in embodiments of the present invention.For example, in one embodiment, a memory array is by group
Knit and include single block or less than intended N number of block.And, each block can include being more than or few
In organizational hierarchy as shown in Figure 3.(do not illustrate) in other embodiments, a physical page or one
Wordline can only include single one physical block.For example, in one embodiment, a wordline is (or a plurality of
Wordline) can be the minimum level of this hierarchy.(not illustrating) in another embodiment, one is single
Physical zone may correspond to one or more physical page in one or more other memory arrays.Described
One or more physical page can have the same physics address in one or more memory array described.Again
Person, memory array 300 can include other classification sections, be included in the division that this area is used
Or sector (sector) (division).
It addition, one or more hierarchical level can include logical page (LPAGE) or logic block/unit, therefore make to deposit
Reservoir device is also managed at logical hierarchy.For example, the number of every memory element bits of coded is depended on
Amount, each physical page can include one or more logical page (LPAGE).Therefore, include one encoding three
The page of memory element (i.e. TLC memory element), described physical page can be divided into three logics
The page, respectively highest significant position (most significant bit, MSB) logical page (LPAGE), centre have
Effect position (center significant bit, CSB) logical page (LPAGE) and least significant bit (least significant
Bit, LSB) logical page (LPAGE).As shown in the example in figure 3, physical page or each physics list of wordline
Unit (such as PU-' 0 ') can also include that one or more logical block, described logical block are provided as
High significance bit (most significant bit, MSB) logical block, middle significance bit (center
Significant bit, CSB) logical block and least significant bit (least significant bit, LSB)
Logical block.Therefore, each for three positions of code storage at wordline or the Physical Page of every memory element
Face can include three logical page (LPAGE)s, and each logical page (LPAGE) includes multiple patrolling corresponding to physical location quantity
Collect unit.The System and method for of the present invention can according to the physics of any intended storage arrangement 130 or
Logical hierarchy is carried out.
Returning to Fig. 2, in one exemplary embodiment, healthy form 200 is in order to include a memory array
Row each physical zone or physical location (PU-' 0 ' ..., PU-' Y ') health and fitness information.According to institute
State exemplary embodiment, the physical zone of described memory array or the size of physical location or length can
Depend on the expected structure of storage arrangement 130 or operation and change.For example, in an embodiment
In, a physical zone includes corresponding to a flash memories conversion layer (flash memory translation
Layer, FTL) size of granularity (granularity) level or a logical-physical layer video/address letter
Number (logical-to-physical level mapping/addressing function).In other embodiments,
A physical zone corresponding to intended error correction block (chunk) size, for example, one is wrong
Correction function is performed by mistake.The size of error correction block can determine, including implementing according to many factors
The intensity of error correcting method and any data-oriented block in be corrected the desired amt of position.At other
In embodiment, a physical zone can include multiple error correction block.In some embodiment, a mistake school
The size of positive block may correspond to the size of a physical page, and therefore the size of a physical zone also corresponds to
The size of one physical page or length.In certain embodiments, as it is shown on figure 3, at a physical page
In can include more than one physical zone.
In certain embodiments, each physical zone can include multiple logical block.For example, exist
In one embodiment, memory element can be more than the data encoding of, and multiple positions are opened corresponding to one point can
The logical page (LPAGE) of addressing.For example, in one embodiment, memory array 300 can be a TLC
Storage arrangement, each of which memory element encodes three bit data.Described three bit data are corresponding to the highest
Significance bit (MSB), middle significance bit (CSB) and least significant bit (LSB).Even if described three
One of individual position is encoded in a single memory cell, and described three positions independently can corresponding to three differences
The logical page (LPAGE) of addressing, this logical page (LPAGE) is included as a part for the single one physical page.Additionally, one
The MSB position of the memory element of the first physical location may correspond to the MSB logic of this first physical location
Unit, CSB position may correspond to CSB logical block, and LSB bit may correspond to LSB logical block.
Therefore, as it is shown on figure 3, the multiple MSB positions being included in multiple memory element of a physical zone can
Form a MSB logical block.Similarly, the multiple memory element being included in a physical zone are many
Individual CSB position and LSB bit can form a CSB logical block and a LSB logical block respectively.Institute
With, in one embodiment, the programming of aiming (target) physical zone or write operation are as in advance
The carrying out of phase is to be separately written the corresponding highest significant position of described physical zone, middle significance bit and
Low order.
As in figure 2 it is shown, according to exemplary embodiment, the enforcement of healthy form 200 will be discussed now.
In one embodiment, example A as shown in Figure 2, healthy form 200 stores corresponding to a storage
One of the physical zone of device array or each memory element of physical location (i.e. write) able to programme or coding
Data bits information.For example, the health data in row 204 includes the data of two, and these are two years old
Bit data represents four kinds of possible health of each physical zone or physical location in healthy form 200
One of state.In example A, described four kinds of health status include that one first health status is (with position 00
Represent), this first health status points out that three data bit are written into or encode to containing a physical zone
Memory element.In the second health status (representing with position 10), two data bit are written into including one
The memory element of physical zone.In the 3rd health status (representing with position 10), a data bit is written into
To the memory element including a physical zone.In the 4th health status (representing with position 11), described
Physical zone is (retired) of rollback, does not therefore have data to be written into depositing to corresponding physical zone
Storage unit.
As shown in the healthy form 200 of Fig. 2, for single memory array, each physical zone or
Unit can be designated according to indicated health status, program according to different programmed methods.Lift
For example, one first physical zone (PU-' 0 ') is designated programming with three positions of every cell stores.
Otherwise, one second physical zone (PU-' 1 ') is designated and programs with two positions of every cell stores,
And one the 3rd physical zone (PU-' Y ') be designated programming with one position of every cell stores.The
Four physical zone (PU-' 2 ') are designated as rollback, therefore do not have position to be written into the storage list of correspondence
Unit.
In another embodiment, example B as shown in Figure 2, healthy form 200 stores corresponding to specific
The information of error correcting method, this information is implemented in corresponding one deposits according to the health of determining of physical zone
The physical zone of memory array or unit.For example, the row 204 of healthy form include two information,
To represent one of corresponding four kinds of health status of error correcting method being implemented on physical blocks.As schemed
Showing, in one first health status (representing with position 00), the health data of row 204 points out that one is carried out
BCH error correcting method in corresponding physical blocks.In one second health status (representing with position 01),
The health data of row 204 points out a LDPC error correcting method being implemented in corresponding physical blocks.
In one the 3rd health status (representing with position 10), the health data of row 204 is pointed out to correct other
Odd and even data (parity data) or the redundant data (redundant data) of physical zone mistake are write
Enter the physical zone of correspondence.Similar in appearance to example A, in one the 4th health status (representing with position 11),
The health data of row 204 points out the physical zone of correspondence rollback in using further.
The embodiment of example A and example B is only example.In order to point out in the row 204 of healthy form 200
The bit quantity of health data can be according to desired operation change.For example, in one embodiment, strong
Health data can use 3 positions of the data corresponding to eight different health status to provide.Such
In embodiment, described eight different health status can include certain of the state in above-mentioned example A and example B
A little combinations, or may correspond to other states expected from the present invention.In certain embodiments, healthy number
According to even using single data bit.For example, in one embodiment, one preset programmed method can
It is designated, such as every memory element two data bit of write.In this embodiment, the one of health data
" 0 " place value points out that described physical zone is that every memory element writes a data bit.Otherwise, healthy number
According to one " 1 " place value point out that described physical zone is rollback.When do not have data be written into
In the healthy form 200 corresponding to physical zone, described default programmed method can be carried out.It is included in
The health data of any other the multiple potential change in one exemplary healthy form 200 can also be as
Realizing desired by the present invention.
As it has been described above, healthy form 200 can include health data, this health data is according to a special knot
Structure is pointed out in the corresponding physical zone of a memory array any amount of potential " health status ".Again
According in exemplary embodiment, for example, healthy form 200 can be carried out to promote storage arrangement
The usefulness of 130 or increase its life-span.For example, for some storage arrangement 130, one deposits
The usefulness of some memory element of memory array starts aging after substantial amounts of read/write/operation of erasing.?
Other shortcomings of memory array manufacture, other environmental effects or operating effect can also cause
(contribute) the various property abnormalities of some memory element.Reality such as present system Yu method
Executing, healthy form 200 can provide information, includes the most aging the depositing of inoperable or usefulness in order to identify
Some physical zone in the memory array of storage unit.
In the exemplary embodiment, the health data being included in healthy form 200 is deposited by controller 120
Take, for example, point out that controller 120 is adjusted a certain programmed and/or coded method and (and corresponded to
The read method of this programmed method) or for the error correcting method of specific physical zone.By health watch
In lattice 200, " health status " represented by the health data of row 204 can be good for according to any known detection
The degree of the aging usefulness of the corresponding physical zone of health or memory array determines.This aging usefulness journey
Degree is according to predetermined critical or other diagnostic methods.
About discussed above and in example A shown in Fig. 2, healthy form 200 is based on corresponding row 204
Health data, it is indicated that the most aging physical zone or an aging memory element of a physical zone.Lift
For example, the health data of row 204 may indicate that the figure place of the memory element that can be programmed that physical zone
Amount.Then, for example, have the physical zone of the most healthy or relatively low degree of aging to have the relatively multidigit can
It is programmed.
In the present embodiment, storage arrangement 130 is in order to make multiple memory element can be with every memory element
The mode of one, two or three is encoded.And the optimum operation conditions at storage arrangement 130
In, for example, each memory element (or the quantity at least above marginal value) of a physical zone
The data of the every cell stores three of energy.So, initially, healthy form 200 stores health data,
Health data can present three bits per memory cell data according to pointing out the memory element of each physical zone
A coded method be programmed.For example, each physical zone health data on row 204 by
Controller 120 writes, for example, bit of storage 00.Before write operation, controller 120 can be deposited
Take healthy form 200 to determine " health status " of the target physical section of write, and determine right
The health data of Ying Yuwei 00.Controller 120 can encode three bit data according to applicable every memory element
Programming or coded method program the expection physical zone of a memory array.In the present embodiment, control
Device 120 processed " can write " data of three with adjusting in order to perform write operation with every memory element.
In one embodiment, as understood by one skilled in the art, controller 120 passes through
Apply a specific voltage to a common word line of the memory element of target physical section and/or one or more
Bit line is to perform programming one memory element.For example, as shown in fig. 4 a and fig. 4b, one is illustrated
In order to program the exemplary encoding method of a memory element.Controller 120 applies a specific voltage to one
Destination Storage Unit, this specific voltage is corresponding to a programming state of memory element.For example, as
Shown in Fig. 4 A and Fig. 4 B, for a TLC memory element, corresponding to eight different programming states
Eight different voltage levels can be applied to a memory element.Then, according to intended coded method,
Eight different programming states are respectively corresponding to a specific bit value.It is illustrated in Fig. 4 A and the coding staff of Fig. 4 B
Method is to may be implemented in the possible coded method of an exemplary embodiment.
As shown in fig. 4 a and fig. 4b, corresponding to one first programming state (state 0) of minimum voltage value
With place value 111 associated.One second programming state (state 1) corresponds to place value 011, the 3rd
Programming state (state 2) corresponds to place value 001, and the like.In other words, state 0
The magnitude of voltage stepped up to 7 correspondences.So that it takes up a position, for example, for programming one Destination Storage Unit with
Store a place value 010, controller 120 according to implement coded method in order to apply corresponding to state 4
Magnitude of voltage to memory element.Corresponding to elapsing desired state over time and applied voltage,
The reliable ability storing electric charge of memory element depends on many factors, including memory element age and
Put on the program of memory element and/or number of times of erasing, and other environment and operation factors and effect.
In an exemplary embodiment, according to the magnitude of voltage of desired state, the health of a memory element is right
Ying Yuqi stores the ability of electric charge.Over time, a memory element the most reliably presents eight differences
Voltage level.Then, exemplary embodiment adjusts the programming and/or error correcting method being suitable for prolong
The use of the memory element during long health is the most aging.
In operation, healthy form 200 can be updated to identify healthy just in aging memory array
Some physical zone.Such as: those are the most reliably with the thing of three bits per memory cell data encoding
Reason section.For example, identification bit error rate based on each physical zone may recognize that health is the oldest
The physical zone changed.In the exemplary embodiment, healthy form 200 is updated to point out corresponding physical areas
The aging health of section or state, include the memory array of aging physical zone replacing rollback
Block (or physical blocks itself).
For example, about example A, for being recognized as the physical blocks of aging usefulness, more
New healthy form 200 is to point out that physical zone continues to be written into every memory element two or.Lift
For example, the health data of a specific physical zone in healthy form 200 with position 01 as expected
Or 10 be updated.Therefore, according to still reaching the expection programmed method of reliability or coded method,
One aging in physical zone still can be used in memory arrays.Even if the storage of a physical zone
Unit is the most aging, makes controller 120 cannot be reliably read or write the data of three to physical zone
Memory element, memory element still can perform to store two or a data satisfactorily.Controller
120 adaptives ground in order to adjust the programmed method for a physical zone, healthy form according to it
Health data in 200 is with programming (such as write) two or a data.Then, memory array
The storage capacity of row gradually reduces over time, makes storage arrangement 130 extend the life-span.
Then, if some physical zone is determined being no longer able to reliably store any data, these are
The physical zone of identification is rollback, for example, by updating corresponding being good in healthy form 200
Health data are position 11.Because the physical zone of exemplary embodiment can be the hierarchy of memory array
Physical zone, be smaller than the block of memory array, the rollback of physical zone instead of block return
Move back, be effectively increased the useful life of storage arrangement 130 including these sections.Therefore, only those are not
The physical zone rollback that can effectively use again, therefore, makes storage arrangement 130 store data in one
In other useful physical zone of block memory.
As it has been described above, in one embodiment, the health data of row 204 in the healthy form 200 of access
One or more controller 120, in order to adjust a programming or coded method, is so less than the data quilt of three
Coding is to Destination Storage Unit.As representative of the present invention, can be realized by various ways.In one embodiment,
Controller 120 corresponds to the logical block of a most aging physical zone in order to rollback.For example,
Controller 120 in order to the most aging physical zone of rollback MSB, CSB or LSB logical block it
One.In one embodiment, controller 120 is in order to rollback logical block, and its programming can be confirmed as drawing
Enter greater amount of bit-errors in memory element or consecutive storage unit.In another embodiment, rollback
Logical block be selected as the specific coding scheme that realized by controller 120 of regulation.For example,
When memory element is aging, the voltage level differentiating adjacent states is difficult.Therefore, controller 120
May be used to rollback logical block, as specified (dictate) through coded method, remaining state can be by relatively
Big magnitude of voltage is separately.
In one embodiment, for example, may determine that the volume of the CSB logical block of physical zone
Journey introduces compared with the greater amount of bit-errors of the programming of MSB logical block or LSB logical block.So
Determination can enter according to the characteristic of error-correcting routine or other diagnostic method or memory array
OK.For example, controller 120 is in order to insert 1 in CSB logical block with rollback physical areas
The CSB logical block of section.In an exemplary coded method, as shown in Figure 4 A and 4 B shown in FIG.,
For MSB and LSB logical block change CSB position value be 1 cause remaining programmable state 0,
1,4 and 5.Remaining four kinds of state of four state representation, it can utilize the data of only two to compile
Code (such as: ' 11 ', ' 01 ', ' 00 ' and ' 10 ').In this embodiment, according to the coded method implemented,
It is favourable for inserting 1 in CSB position, because so doing eliminates state 6 and 7.These states need
Will bigger voltage level to program Destination Storage Unit, and the most more likely make in adjoining memory cell
Become (introduce) sequencing/reading interference.Another advantage include the MSB to physical zone and
LSB logical block maintains the ability of the controller 120 of identical coded method.In other words, identical
Magnitude of voltage may correspond to the same programming state of MSB position and LSB bit, no matter storage arrangement
It is programmed to store three bits per memory cell data or every memory element two bit data.
In another embodiment, the logical block of arbitrary MSB logical block or LSB is similarly with fall
The ability rollback of low memory element, from three bits per memory cell to every memory element two.Disclose at this
Method not by any rollback logical block or reduce memory element capacity ad hoc approach limit.
Other programmed methods that can adjust can also be carried out according to the present invention.For example, controller
120 can be used to adjust the coded method of the memory element reduced corresponding to capacity.For example, from
The difference of embodiment discussed above, according to the modulated suitable voltage level corresponding to programming state, control
Device 120 processed may be used to program a MSB position and a LSB bit.For example, when memory element is aging,
" distance " that increase between the magnitude of voltage of adjacent programming state is useful.In this fashion,
Identify that correct programming state is easy.For example, in above-mentioned example, programming shape is increased
Distance between state 0 and 1 and 4 and 5 is useful.Therefore, controller 120 may be used to adjust right
Answer the program voltage of state, so the memory element in aging more easily distinguishes the electricity of correspondence
Laminate layer level.
The advantage of the logical block of a rollback individually addressable physical zone as above is to simplify
Reflection and the addressing method implemented by storage arrangement.For example.Rollback MSB, LSB or
CSB logical block, according to any of above or the method for other conceptions, the physical zone of other non-rollbacks
Reflection with addressing the most do not change.But, in certain embodiments, at MSB, MSB and
In LSB bit, physical zone may not include individually addressable logical block.In these embodiments,
Can be carried out to reduce the capacity of memory element similar in appearance to those methods discussed above, often store list
In unit, from three to two or from two to one.Then, controller 120 may be used to adjust reflection
Or addressing method is to produce the capacity of the reduction of (account for) each physical zone.
In another embodiment, about discussed above and in example B shown in Fig. 2, healthy form 200
Based on the error correcting method that physical zone is implemented, it is intended that the most aging physical areas of memory array
Section.In this embodiment, physical zone is programmed to store any number of position of every memory element.?
The operation of initial pattern, for example, the data being stored in physical zone are implemented one by controller 120
First error correcting method.In this embodiment, initial error bearing calibration is not likely to be the most sane
(robust) or in order to identify and minimal number of mistake in correcting physics section.For example, one
First relatively easy error correcting method (first relatively light error correction scheme)
Can include using BCH error correcting method.The physical zone healthy number in healthy form 200
Position 00 indicates according to this, for example, as in figure 2 it is shown, to indicate the correction of spendable initial error
Method.
Initially, it is contemplated that the memory element of storage arrangement 130 is having the level of minimum mistake
Perform.So that it takes up a position, for example, a relatively easy error correcting method can be enough to correct minimum number
Anticipation error, such as BCH method.But, through use after a while or former because of other
Cause, some physical zone in physical zone starts aging, therefore has greater number of mistake.Citing
For, in one embodiment, controller 120 can determine that the bit error rate of some physical zone is more than
One certain threshold.Such determine under, the health data in renewable healthy form 200 is to refer to
Go out a more sane error correcting method and be used in the physical areas of identification of higher bit error rate
Section.
For example, example B as shown in Figure 2, corresponding to there being the physical zone increasing bit error rate,
Health data in healthy form 200 is updated with position 01, it is indicated that for the one of those physical zone
More sane error correcting method, such as LDPC.In this method, one can correct more mistake
The most sane error correcting method can be used to extend memory array aging in physics
The use of section.The enforcement of BCH and LDPC error correcting method is only example.Can by the present invention
Any other error correcting method can be implemented with expection.
Then, a single error correcting method can be used in exemplary embodiment.For example,
Replacing implementing different schemes, controller 120 may be used to perform same or analogous error correction, but
Greater number of mistake can be corrected.In one embodiment, an error correcting method can be modified
(modifiy) to produce longer error-correcting code, so the more substantial mistake of recoverable.By this
Bright it is contemplated that some physical zone working as memorizer is aging in usefulness, any other potential repairing
Just or strengthen can detect and correct larger amount of bit-errors.
In one embodiment, can data based on the target physical block being written into memory array (mistake
By mistake correcting block) size or length computation error-correcting code.Therefore, in one embodiment, based on the phase
The size of the error correction block hoped or length select size or the length of each physical zone of memory array
Degree.In other embodiments, error correction block corresponds to size or the length of physical zone.Then,
The needs of the anticipated number according to correction detectable error, error-correcting code can be calculated as having expectation
Size or length.The error-correcting code calculated is stored in the district that the one of storage arrangement 130 is specified
Section, or other accessible positions of controller 120.
In one embodiment, controller 120 is in order to determine that whether the number of errors of detection is more than an expection
Predetermined critical.In certain embodiments, the quantity of detectable (and correctable) mistake takes
Certainly in particular error bearing calibration and the length of mistake in computation correcting code and other factors.In an embodiment
In, according to the error correcting method implemented, it is contemplated that marginal value is based on detectable or correctable position
The quantity of mistake is chosen.For example, the marginal value of error rate is based on detectable and/or correction
Bit error rate and determine.In one embodiment, the marginal value of mistake may correspond to detectable mistake
Quantity 50% or 75%.Therefore, to detecting 48 in the given error correction block of data
The error correcting method of bit-errors, for example, controller 120 selects equivalent 24 mistakes or can
The half of detection number of errors is marginal value.If exceeding the marginal value of mistake, controller 120 is according to upper
State the healthy form 200 of any embodiment renewal and point out that the physical zone of correspondence is just aging.
As it is shown in figure 5, according to above example in order to perform an illustrative methods 500 of write operation.
In disclosing embodiment, controller 120 can receive the control signal of instruction write operation, and this writes behaviour
It is executed at the target zone of storage arrangement 130.Controller 120 identification is in order to write operation
Physical zone (step 510).According to any known method, controller 120 identifies suitable physical areas
Section and the address corresponding to physical zone.In one embodiment, physical zone or unit are for videoing to looking into
Looking for the particular address of table (look-up table), this look-up table can be included in healthy form 200, as
Shown in the row 206 of Fig. 2.Once the position of physical location or physical location is determined, controller 120
Search the health data (step 520) of identified physical zone.In one embodiment, controller
The 120 healthy forms 200 of access are to search corresponding health data.As it has been described above, health data can wrap
Include corresponding to every memory element bit quantity or the finger of the health status of error correcting method or both combinations
Show.
Controller 120 adjusts write operation according to the health data accessed by healthy form 200.Control
Device 120 performs read/write operation (step 540) according to corresponding health data.Can be according to any of above side
Method adjusts read/write operation, or the additive method that be it is expected to by the present invention.For example, in step
In the operation of 540, controller 120 can adjust wiring method to write the appointment number of every memory element position
The position of amount, as indicated by corresponding health data.As a part for the operation of step 530, phase
For programmed method, controller 120 can determine that the healthy form corresponding to particular error bearing calibration
The health data of 200.In one embodiment, controller 120 can be according to the programmed method being pre-configured with
For performing write operation.
Then, after a write operation, controller 120 produces error-correcting code to hold in the data write
Row error correction operations (step 550).In one embodiment, error-correcting code is according to being pre-configured with
Method produces.Such as the usual practice in this area, error-correcting code can be stored in any of memory array
Specify section.In another embodiment, the health data corresponding to physical zone is specified in order to implement
Particular error bearing calibration.Accordingly, as the part of the operation of step 550, controller 120 basis
Health data corresponding to write physical zone performs error correction coding.As discussed above, control
Device 120 can be with error recovery logic or other perform the circuit of error correction operations and element is together joined
Put.Step 540, the operation of 550 all can perform according to corresponding health data via controller 120
Each write operation.Or, in certain embodiments, according to corresponding health data, only one
Individual or other operations can be performed.In those embodiments, health data only indicates single for write storage
The bit quantity (example A as shown in Figure 2) of unit, controller 120 still can perform an error correction coding
Operation, but according to the health of a specific physical zone, healthy error correcting method may will not change.
In embodiment discussed above, healthy form 200 can be managed by controller 120 and update.
In certain embodiments, controller 120 is in order to when programming (such as write) operation or programming operation
The healthy form 200 of rear renewal.After a program operation, the operation of such as step 540, for one or more
Target physical section performs, and controller 120 based on physical zone can have determined that bit error rate is in order to more
New healthy form 200.For example, after the operation of write step 540, controller 120 determines
The bit error rate (step 560) of write physical zone.This bit error rate can according to any known method certainly
Fixed, and include the use of the produced error-correcting code of operation of step 550.Thing determined by based on
The bit error rate of reason section, controller 120 decides whether that physical zone should be regarded as healthy form 200
In the most aging section.Whether can exceed predetermined critical based on bit error rate to make this and determine.If control
Device 120 processed determines that physical zone is with aging, and controller 120 correspondingly updates in healthy form 200
Corresponding health data (step 570).
In one embodiment, the health data of healthy form 200 can be according to intended initial operation by advance
First fill.Therefore, initial error bearing calibration operates by advance according to the expection of storage arrangement 130
Determine.Then, the programming operation of an initial expected can also be determined in advance (such as every memory element
Have one, two, three or more multidigit).These initial configurations can be by the most true in healthy form 200
Fixed or controller 120 can be initialised to perform according to expection operation.Therefore, in one embodiment,
Controller 120 is in order to update healthy form 200 after the first write operation, or controller 120 exists
After each initial operation of physical zone, fill in (populate) healthy form 200.
In one embodiment, after the physical zone the most programmed performs read operation (or simultaneously),
Controller 120 is used for updating healthy form 200.In one embodiment, controller 120 is used for accessing
Healthy form 200 is to determine applicable read operation based on health data.For example, based on often depositing
The bit quantity that storage unit stores, controller 120 can be used for adjusting read operation.Then, based on storage
Error-correcting code and the ad hoc approach specified of the health data of healthy form 200, controller 120 can
For adjusting error correcting method with correcting read error.Based on the mistake in computation corresponding to reading data
Correcting code, controller 120 can decide whether to be detected in any mistake reading in data.At this
In embodiment, error detection performs according to any known method, and according to the particular error correction implemented
Method is prescribed.If controller 120 determines that the amount of error detected is come higher than predetermined critical, citing
Saying, controller 120 updates the health data corresponding to physical zone to specify section for the most aging section.
In one embodiment, before the physical zone of aging healthy form 200 (or afterwards), control
Device processed 120 for reorientate be stored in aging in the data of physical zone to another district of memorizer
Section.District is reorientated based on what the health data being stored in healthy form 200 selected this memory array
Section.In this method, healthy form 200 is used as the one of tired average (wear-leveling) method
Part.Therefore, once identify aging in physical zone, controller 120 performs tired averaging method,
With reorientate be stored in aging in the data of physical zone have preferable health status to another
Physical zone.For example, controller 120 can access healthy form 200, and with identification, other are being good for
In health form 200 the most aging or have the physical zone of preferable health status.Once reorientate
The data stored are to the physical blocks of " strongr " of identification, and controller 120 is according to any of the above described
Embodiment updates healthy form 200 to point out the most aging physical zone.For example, physical zone
Can be aging, so at next programming operation, corresponding health data points out that every memory element is less
Position can be written into the memory element to corresponding physical zone.
In another embodiment, controller 120 is in order to perform examining independent of read or write operation
Disconnected program, with discrimination efficiency just in aging physical zone.For example, in one embodiment, control
Device 120 processed is in order to perform a diagnostic operation, to identify that number of bit errors exceedes some of expection marginal value
Physical zone.This diagnostic operation is performed according to any known method.In one embodiment, as diagnosis
A part for operation, controller 120 is in order to deposit according to single expecting state write all of physical zone
Storage unit, such as state 6 (as shown in Figure 4 A and 4 B shown in FIG.).After the write operation of diagnosis, control
Device 120 processed in order to from respectively written into memory element read the electric charge stored, identified number of errors.
In this embodiment, because introducing the probability of the state of charge of the acceleration of aging middle memory element, right
Should be a favourable diagnosis voltage level in the voltage level of state 6, one has moved into state 7, no
The mistake of adjoining memory cell can be caused possibly.Therefore, in this embodiment, state of charge is represented
The quantity of the memory element of 7 is identified, and controller 120 determines whether that this quantity is more than an error rate
Marginal value.If error number is not less than predetermined critical, according to any of the above described embodiments, controller 120
In order to update healthy form 200 to point out the health status of aging physical blocks.
Particular embodiments described above, is carried out the purpose of the present invention, technical scheme and beneficial effect
Further describe it should be understood that the foregoing is only the specific embodiment of the present invention,
Be not limited to the present invention, all within the spirit and principles in the present invention, any amendment of being made,
Equivalent, improvement etc., should be included within the scope of the present invention.
Claims (10)
1. for controlling a device for non-volatility memorizer programming, this non-volatility memorizer bag
Including a block, this block is divided into multiple physical zone, and each physical zone includes multiple memory element,
This device includes:
One controller, in order to:
Accessing a form, this form includes the information corresponding to each physical zone；
According to the information of one first physical zone corresponding to these physical zone in this form, identify
First programmed method of this first physical zone, and according to this form corresponds to these physical zone
The information of one second physical zone, identifies the second programmed method of this second physical zone；And
Respectively according to this first programmed method and this second programmed method program this first physical zone and
This second physical zone.
2. device as claimed in claim 1, wherein this first programmed method is for programming this first thing
One coded method of the first data of each memory element of reason section, and this second programmed method is for programming
Another coded method of second data of each memory element of this second physical zone, these the second data
Bit quantity is less than the bit quantity of these the first data,
Wherein this form includes the writable figure place of each memory element of these physical zone.
3. device as claimed in claim 1, wherein this controller is also in order in an individual physical district
After section programming, determine the bit error rate for this individual physical section, when this bit error rate is higher than one
Predetermined critical, this controller is based on this form, also in order to identify in this non-volatility memorizer these
Physical zone has another physical zone of a preferable state, and update this information in this form with
One state of this correspondence physical zone aging, this information corresponds to this individual physical section.
4. device as claimed in claim 1, wherein, as a part for this first programmed method,
This controller uses one first error correcting method to produce an error-correcting code, and as this second programming
A part for method, this controller uses one second error correcting method to produce another error-correcting code,
This second error correcting method is different from this first error correcting method.
5. device as claimed in claim 1, the most each physical zone includes multiple logical page (LPAGE),
And wherein this first programmed method programs each logical page (LPAGE) of this physical zone, and this second programmed method
Program these logical page (LPAGE)s small number of in this physical zone,
Wherein this controller is in order to program one or more of these physical zone, to include this form and should
Information.
6., for the method programming non-volatility memorizer, this non-volatility memorizer includes many
Individual block, each block includes that multiple physical zone, each physical zone include multiple memory element, the party
Method includes:
Receive a control signal, to carry out a programming operation at one or more of these physical zone；
Accessing a form, this form includes the one or more of information corresponding to these physical zone；
According in this form corresponding to an information of one first physical zone, identify this first physical zone
One first programmed method, and according in this form corresponding to another information of one second physical zone,
Identify one second programmed method of this second physical zone；And
Respectively according to this first programmed method and this second programmed method program this first physical zone and
This second physical zone.
7. method as claimed in claim 6, wherein this first programmed method is corresponding to being somebody's turn to do for programming
One coded method of one first long numeric data of each memory element of the first physical zone, and this second volume
Cheng Fangfa is corresponding to one second long numeric data being each memory element programming this second physical zone
Another coded method, the bit quantity of this second long numeric data is less than the bit quantity of this first long numeric data,
Also including providing this form, this form includes the writeable of each memory element of these physical zone
Enter figure place.
8. method as claimed in claim 6, after being additionally included in an individual physical section programming, really
Surely for a bit error rate of this individual physical section, when this bit error rate is higher than a predetermined critical,
Based on these physical zone in this non-volatility memorizer of this Table recognition have a preferable state
Another physical zone, and reorientate this programming information to having this physical zone of a preferable state,
And updating the state with this correspondence physical zone aging of this information in this form, this information corresponds to
This individual physical section.
9. method as claimed in claim 6, also includes, as one of this first programmed method
Point, use one first error correcting method to produce an error-correcting code, and as this second programmed method
A part, use one second error correcting method produce another error-correcting code, this second mistake school
Correction method is different from this first error correcting method.
10. method as claimed in claim 6, the most each physical zone includes multiple logical page (LPAGE),
And wherein this first programmed method includes respectively this logical page (LPAGE) programming this physical zone, and this second volume
Cheng Fangfa includes programming these logical page (LPAGE)s small number of in this physical zone,
Also include programming one or more of these physical zone, to include this form and this information.
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| CN111599398A (en) * | 2019-02-21 | 2020-08-28 | 旺宏电子股份有限公司 | Memory device and programming method thereof |
| US11221945B2 (en) | 2019-03-27 | 2022-01-11 | Winbond Electronics Corp. | Semiconductor memory device |
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| CN111599398B (en) * | 2019-02-21 | 2022-07-19 | 旺宏电子股份有限公司 | Memory device and programming method thereof |
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