CN103165188A - Programming method for multi-bit nonvolatile memory cell and multi-bit nonvolatile memory unit array - Google Patents
Programming method for multi-bit nonvolatile memory cell and multi-bit nonvolatile memory unit array Download PDFInfo
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- CN103165188A CN103165188A CN201110410001XA CN201110410001A CN103165188A CN 103165188 A CN103165188 A CN 103165188A CN 201110410001X A CN201110410001X A CN 201110410001XA CN 201110410001 A CN201110410001 A CN 201110410001A CN 103165188 A CN103165188 A CN 103165188A
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- nonvolatile memory
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Abstract
The invention provides a programming method for a multi-bit nonvolatile memory cell. The programming method comprises the steps of applying identical positive bias voltages on a substrate and a source terminal of a p-channel non-volatile memory cell, with a drain terminal grounded, applying a programming pulse voltage on a grid electrode; and programming the multi-bit nonvolatile memory cell in a setting state after a plurality of programming cycles comprising an electronic FN tunneling process and a channel hot electron injection process. Accordingly, the invention provides a programming method for a multi-bit nonvolatile memory unit array. A process for forming a memory cell threshold voltage steady state of the programming method provided by the invention is a self-convergence process and a repeated inspection process of a conventional programming method is omitted, so that programming speed of the multi-bit nonvolatile memory is effectively increased. By setting pulse parameters for the FN tunneling process and the channel hot electron injection process, the memory cell can be directly programmed to a designated state, so that programming accuracy of the multi-bit non-volatile memory cell is increased, and programming speed and accuracy can be taken into account at the same time.
Description
Technical field
The present invention relates to the semiconductor memory technologies field, particularly a kind of method that p-type raceway groove multidigit nonvolatile memory cell and array are programmed.
Background technology
The at present development of memory technology has become the important impetus that integrated circuit (IC) design, manufacture level are advanced, at microelectronic, occupies very important status.And when memory device structures when developing to nanometer feature sizes, be faced with stern challenge at aspects such as storage speed and density, the non-volatile memory technology of multidigit can produce multistage store status, has effectively improved the storage density of storer.
The nonvolatile memory cell structure is referring to Fig. 1, comprise the heavily doped source region S of p-type and drain region D on N-shaped silicon substrate 1, silicon substrate, cover the tunneling medium layer on carrier channels 2 between source-drain area, charge storage layer 3 and restraining barrier 4 and the control gate dielectric layer 5 covered successively on restraining barrier.When p-type raceway groove nonvolatile memory is programmed, the general directly tunnelling of FN (Fowler-Nordheim) that adopts, source region current potential Vs, drain region current potential Vd and substrate electric potential Vb all ground connection, under strong grid potential Vg, electronics is expelled out of to substrate from the direct tunnelling of accumulation layer.The required programming pulse voltage of the direct tunneling program mode of FN grid, referring to Fig. 2, is programmed into a state through pulse voltage Vg, burst length T1 by p-type raceway groove nonvolatile memory cell.All to carry out a proof procedure after each programming, guarantee the accurate of programmed state.By controlling the size of p-type raceway groove nonvolatile memory threshold voltage vt h, can realize 4 different store statuss, be respectively " 11 ", " 10 ", " 01 " and " 00 " state, wherein " 11 " are erase state.
For the storage array that comprises a plurality of p-type raceway groove storehouse grid nonvolatile memory cells, Fig. 3 is storage unit threshold voltage distribution schematic diagram after existing programmed method programming operation, at first the threshold voltage of all storage unit is reset to 11 states, as shown in Figure 3 a, then all needs are programmed to 10, 01, the threshold voltage of the storage unit of 00 state is programmed to 10 states successively, as shown in Fig. 3 b, then all needs are programmed to 01, the threshold voltage of the storage unit of 00 state is programmed to 01 state successively, as shown in Figure 3 c, the threshold voltage that finally all needs is programmed to the storage unit of 00 state is programmed to 00 state successively, as shown in Figure 3 d.In programming process, all to carry out a proof procedure repeatedly after each programming, if be not programmed into the state needed, need to increase the programming number of times, until be programmed into the state needed.After each programming, the threshold voltage of storage unit all can increase, the threshold voltage of the rear all storage unit of programming is distributed in a narrower scope, the pulse height applied while programming should be lower, after making each programming, the threshold voltage recruitment of storage unit is less, but the number of times in the time of significantly increasing so single storage unit programming, thereby greatly increase the storage unit programming time; If accelerate the storage unit program speed, reduce programming time, need to apply pulse by a relatively large margin while programming, after making each programming, the threshold voltage recruitment of storage unit is larger, but the rear storage unit threshold voltage distribution range that will cause thus programming is larger, and the precision that makes to programme is not high.Can not take into account program speed and precision when therefore, traditional programmed method is programmed to p-type raceway groove multidigit nonvolatile memory cell simultaneously.
Summary of the invention
Fundamental purpose of the present invention is when solving traditional programmed method is programmed to p-type raceway groove multidigit nonvolatile memory cell to take into account the problem of program speed and programming precision.
For achieving the above object, the invention provides a kind of programmed method of multidigit nonvolatile memory cell, substrate and source at p-type raceway groove multidigit nonvolatile memory cell apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after a plurality of programming cycle, the multidigit nonvolatile memory cell is programmed for set condition, wherein, described programming cycle comprises Fowler-Nordheim tunnelling process and channel hot electron injection process, and in described Fowler-Nordheim tunnelling process, grid applies negative programming pulse voltage Vg
fN, in described channel hot electron injection process, grid applies positive programming pulse voltage Vg
cHEI, and | Vg
fN|>| Vg
cHEI|.
Preferably, in described programming cycle, the negative positive programming pulse voltage duration of programming pulse voltage Duration Ratio is long.
Preferably, in described programming cycle, first carry out the Fowler-Nordheim tunnelling process, then carry out the channel hot electron injection process.
Preferably, in described programming cycle, first carry out the channel hot electron injection process, then carry out the Fowler-Nordheim tunnelling process.
Preferably, described set condition is 10 states, 01 state or 00 state.
Preferably, after 5-10 programming cycle, the multidigit nonvolatile memory is programmed for designated state.
Preferably, the substrate that also is included in p-type raceway groove multidigit nonvolatile memory cell applies described positive bias, and source is floating empty, drain terminal ground connection, and grid applies program voltage, and the multidigit nonvolatile memory cell is programmed for 11 states.
Preferably, the accumulation layer of described multidigit nonvolatile memory cell is nanocrystalline material.
Correspondingly, the present invention also provides a kind of programmed method of multidigit nonvolatile memory cell array, comprise a plurality of multidigit nonvolatile memory cells claimed in claim 1, substrate and source at all multidigit nonvolatile memory cells that are pre-programmed into same set condition apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after at least one programming cycle, the all multidigit nonvolatile memory cells that are pre-programmed into same set condition all are programmed for described set condition, wherein, described programming cycle comprises Fowler-Nordheim tunnelling process and channel hot electron injection process, in described Fowler-Nordheim tunnelling process, grid applies negative programming pulse voltage Vg
fN, in described channel hot electron injection process, grid applies positive programming pulse voltage Vg
cHEI, and | Vg
fN|>| Vg
cHEI|.
Preferably, in described programming cycle, the negative positive programming pulse voltage duration of programming pulse voltage Duration Ratio is long.
Compared with prior art, programmed method of the present invention has following advantages:
Multidigit nonvolatile memory cell programmed method provided by the invention, substrate and source at p-type raceway groove multidigit nonvolatile memory cell apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after a plurality of programming cycle that comprise electronics FN tunnelling process and channel hot electron injection process, is programmed for set condition.Due to the threshold voltage of FN tunnelling process reduction storage unit, the channel hot electron injection process increases threshold voltage, and after several programming cycle, the storage unit threshold voltage be programmed finally remains on certain stable state, i.e. one of " 00 " " 01 " " 10 " state.The process that forms stable state is from convergence process, has saved the verification process repeatedly of conventional programming method, has effectively improved the program speed of multidigit nonvolatile memory, can take into account program speed and precision simultaneously.
In addition, multidigit nonvolatile memory cell provided by the invention carries out programmed method, can be by the impulsive condition setting to FN tunnelling process and channel hot electron injection process, comprise pulse height, burst length and programming cycle number, make storage unit directly be programmed into designated state, greatly improved the programming precision of multidigit nonvolatile memory cell.
The accompanying drawing explanation
Fig. 1 and Fig. 2 are that the multidigit Nonvolatile Memory Device adopts traditional F N programmed method schematic diagram;
To be traditional F N programmed method carry out threshold voltage distribution schematic diagram after programming operation to multi-bit memory to Fig. 3;
Fig. 4 to Fig. 6 is that the present invention carries out the programmed method schematic diagram to the multidigit nonvolatile memory;
Fig. 7 is the threshold voltage variation schematic diagram after each programming pulse in programming process.
Embodiment
When the tradition programmed method is programmed to p-type raceway groove multidigit nonvolatile memory cell, after each programming, all will be verified, if be not programmed into the state needed, need to increase the programming number of times, checking is until be programmed into the state needed repeatedly.After each programming, the threshold voltage of storage unit all can increase, the threshold voltage of the rear all storage unit of programming is distributed in a narrower scope, the pulse height applied while programming should be lower, after making each programming, the threshold voltage recruitment of storage unit is less, but the number of times in the time of significantly increasing like this individual unit programming, thereby greatly increase the storage unit programming time; If accelerate the storage unit program speed, reduce programming time, need to apply pulse by a relatively large margin while programming, after making each programming, the threshold voltage recruitment of storage unit is larger, but the rear storage unit threshold voltage distribution range that will cause thus programming is larger, and the precision that makes to programme is not high.Can not take into account program speed and precision when therefore, traditional programmed method is programmed to p-type raceway groove multidigit nonvolatile memory cell simultaneously.
The invention provides a kind of method to the programming of p-type raceway groove multidigit nonvolatile memory cell, substrate and source in storage unit apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after a plurality of programming cycle, the multidigit nonvolatile memory cell is programmed for set condition, wherein, described programming cycle comprises FN (Fowler-Nordheim) tunnelling process and CHEI (Channal Hot Electron Injection, channel hot electron injects) process, grid voltage is at FN tunnelling voltage Vg
fNwith channel hot electron injecting voltage Vg
cHEIbetween the conversion.Programmed method of the present invention by a plurality of programming cycle after, the threshold voltage of p-type raceway groove multidigit nonvolatile memory cell is from converging to certain state, i.e. " 10 ", " 01 " or " 00 " state do not need repeatedly the process of the state of storage unit after verification of programming.Below in conjunction with accompanying drawing, programmed method of the present invention is described in detail.
A lot of details have been set forth in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here and implement, those skilled in the art can be in the situation that do similar popularization without prejudice to intension of the present invention, so the present invention is not subject to the restriction of following public specific embodiment.
P-type raceway groove multidigit nonvolatile memory cell comprises the N-shaped silicon substrate, the heavily doped source region of p-type and drain region on silicon substrate, the tunneling medium layer covered on carrier channels between source region and drain region, the charge storage layer covered on tunneling medium layer, the restraining barrier covered on electric charge capture layer, and the control gate dielectric layer covered on restraining barrier, the wherein preferred nanocrystalline material accumulation layer of accumulation layer.When p-type raceway groove multidigit nonvolatile memory cell is programmed, after described storage unit is reset to erase state 11, referring to Fig. 4-Fig. 6, the substrate of described storage unit and source apply identical positive bias, and Vs=Vb>0 is arranged; Drain terminal ground connection, have Vd=0V; Grid termination programming pulse voltage Vg, Vg is at FN tunnelling pulse voltage Vg
fNwith channel hot electron injected pulse voltage Vg
cHEIbetween the conversion, wherein, Vg
fN<0, burst length T
fN, Vg
cHEI>0, burst length T
cHEI, and | Vg
fN|>| Vg
cHEI|, preferred T
fN>T
cHEI.In the FN tunnelling process, referring to Fig. 5, no current between the source S of described storage unit and drain terminal D, meet pulse tunnelling voltage Vg at gate terminal Vg
fN, under high electric field action, the electronics in accumulation layer 30 is expelled out of substrate 10 by restraining barrier 20, has reduced the threshold voltage vt h of storage unit
fN.Carry out subsequently the CHEI injection process, referring to Fig. 6, no current between the source S of described storage unit and drain terminal D, meet pulse tunnelling voltage Vg at gate terminal Vg
cHEI, under electric field action, the electronics in substrate 10 is injected into accumulation layer 30 by restraining barrier 20, the threshold voltage vt h of the storage unit that raise
cHEI.After a plurality of programming cycle that comprise FN tunnelling process and CHEI injection process, the threshold voltage of the storage unit be programmed remains on stable value, and the threshold voltage of described storage unit is final from converging to 2 stable threshold voltage values, is designated as Vth
fN-CHEI.In a plurality of programming cycle processes, the threshold voltage variation of storage unit is referring to Fig. 7, figure hollow core circle means the threshold voltage after the FN tunnelling process, solid circles means the threshold voltage after the CHEI injection process, after a plurality of programming cycle, threshold voltage after the FN tunnelling process is stabilized in a fixed value, and the threshold voltage after the CHEI injection process is stabilized in another fixed value.
In the programmed method of p-type raceway groove multidigit nonvolatile memory cell of the present invention, also can first carry out the FN tunnelling process in programming cycle, and then carry out the CHEI injection process.
The programmed method of p-type raceway groove multidigit nonvolatile memory cell of the present invention, FN tunnelling pulse voltage Vg in programming cycle
fNburst length T with the channel hot electron injected pulse
fNand T
cHEI, can select the very short time, the time that each programming cycle needs like this is T
fNwith T
cHEIsum, table 1 is the program parameters in a right specific embodiment of programmed method of the present invention, underlayer voltage Vb applies 6V voltage, drain terminal voltage Vd ground connection, grid meets program voltage Vg, when the floating sky of source voltage terminal, the erasing voltage Vg of 0.01 second is 12 volts, and storage unit is programmed for erase state " 11 ".The source Vs of storage unit and substrate are applied to 6V voltage, and connect-10V of grid program voltage pulse voltage is carried out the FN tunnelling process, burst length T
fN=900 milliseconds, then connect 3 deep-sited pulses and rush voltage and carry out the CHEI injection process, burst length T
cHEI=100 milliseconds, then repeat FN tunnelling process and CHEI injection process, through 5-20 programming cycle, the threshold voltage of storage unit is stabilized in programmed state " 10 ".Equally, select the grid impulse voltage of FN tunnelling process to be-12V, CHEI injection process pulse voltage is 1.5V, and through 5-20 programming cycle of process, the threshold voltage of storage unit is stabilized in programmed state " 01 "; Select the grid impulse voltage of FN tunnelling process to be-14V, CHEI injection process pulse voltage is 0V, and through 5-20 programming cycle of process, the threshold voltage of storage unit is stabilized in programmed state " 00 ".
Program parameters in specific embodiment of table 1
The programmed method of p-type raceway groove multidigit nonvolatile memory cell of the present invention, through a plurality of programming cycle, finally remains on certain stable state by the threshold voltage of storage unit, is designated as Vth
fN-CHEI,, i.e. one of " 00 " " 01 " " 10 " state.The process that p-type raceway groove multidigit nonvolatile memory cell forms the threshold voltage stable state is from convergence process, has saved the conventional operating process of verification repeatedly, has effectively improved the program speed of multidigit nonvolatile memory.Simultaneously, it in programming process, not the storage unit threshold voltage stack of traditional programmed method, by FN tunnelling process in programming cycle and CHEI injection process team storage unit grid being applied to the setting of pulse parameter, comprise the setting of pulse height, burst length and programming cycle number, make described storage unit directly be programmed into set condition, improved the programming precision of P type raceway groove multidigit nonvolatile memory cell.
Programmed method of the present invention also can be applied in the storage array that comprises a plurality of P type raceway groove multidigit nonvolatile memory cells, substrate and source at all multidigit nonvolatile memory cells that are pre-programmed into same set condition apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after a plurality of programming cycle, the all multidigit nonvolatile memory cells that are pre-programmed into same set condition all are programmed for described set condition, wherein, described programming cycle comprises Fowler-Nordheim tunnelling process and channel hot electron injection process, in described Fowler-Nordheim tunnelling process, grid applies negative programming pulse voltage Vg
fN, in described channel hot electron injection process, grid applies positive programming pulse voltage Vg
cHEI, and | Vg
fN|>| Vg
cHEI|.
The above, be only preferred embodiment of the present invention, not the present invention done to any pro forma restriction.Any those of ordinary skill in the art, do not breaking away from technical solution of the present invention scope situation, all can utilize method and the technology contents of above-mentioned announcement to make many possible changes and modification to technical solution of the present invention, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention,, all still belong in the scope of technical solution of the present invention protection any simple modification made for any of the above embodiments, equivalent variations and modification according to technical spirit of the present invention.
Claims (10)
1. the programmed method of a multidigit nonvolatile memory cell, it is characterized in that, substrate and source at p-type raceway groove multidigit nonvolatile memory cell apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after a plurality of programming cycle, the multidigit nonvolatile memory cell is programmed for set condition, wherein, described programming cycle comprises Fowler-Nordheim tunnelling process and channel hot electron injection process, and in described Fowler-Nordheim tunnelling process, grid applies negative programming pulse voltage Vg
fN, in described channel hot electron injection process, grid applies positive programming pulse voltage Vg
cHEI, and | Vg
fN|>| Vg
cHEI|.
2. the programmed method of multidigit nonvolatile memory cell according to claim 1, is characterized in that, in described programming cycle, the negative positive programming pulse voltage duration of programming pulse voltage Duration Ratio is long.
3. the programmed method of multidigit nonvolatile memory cell according to claim 1 and 2, is characterized in that, in described programming cycle, first carries out the Fowler-Nordheim tunnelling process, then carry out the channel hot electron injection process.
4. the programmed method of multidigit nonvolatile memory cell according to claim 1 and 2, is characterized in that, in described programming cycle, first carries out the channel hot electron injection process, then carry out the Fowler-Nordheim tunnelling process.
5. the programmed method of multidigit nonvolatile memory cell according to claim 1 and 2, is characterized in that, described set condition is 10 states, 01 state or 00 state.
6. the programmed method of multidigit nonvolatile memory cell according to claim 1 and 2, is characterized in that, after 5-10 programming cycle, the multidigit nonvolatile memory is programmed for designated state.
7. according to the programmed method of claim 1,2 or 3 described multidigit nonvolatile memory cells, it is characterized in that, also comprise,
Substrate at p-type raceway groove multidigit nonvolatile memory cell applies described positive bias, and source is floating empty, drain terminal ground connection, and grid applies program voltage, and the multidigit nonvolatile memory cell is programmed for 11 states.
8. according to the programmed method of claim 1,2 or 3 described multidigit nonvolatile memory cells, it is characterized in that, the accumulation layer of described multidigit nonvolatile memory cell is nanocrystalline material.
9. the programmed method of a multidigit nonvolatile memory cell array, it is characterized in that, comprise a plurality of multidigit nonvolatile memory cells claimed in claim 1, substrate and source at all multidigit nonvolatile memory cells that are pre-programmed into same set condition apply identical positive bias, drain terminal ground connection, grid applies programming pulse voltage, after at least one programming cycle, the all multidigit nonvolatile memory cells that are pre-programmed into same set condition all are programmed for described set condition, wherein, described programming cycle comprises Fowler-Nordheim tunnelling process and channel hot electron injection process, in described Fowler-Nordheim tunnelling process, grid applies negative programming pulse voltage Vg
fN, in described channel hot electron injection process, grid applies positive programming pulse voltage Vg
cHEI, and | Vg
fN|>| Vg
cHEI|.
10. the programmed method of multidigit nonvolatile memory cell array according to claim 9, is characterized in that, also comprises, in described programming cycle, the negative positive programming pulse voltage duration of programming pulse voltage Duration Ratio is long.
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