CN106293846B - The upgrade method and device of analog processor - Google Patents

The upgrade method and device of analog processor Download PDF

Info

Publication number
CN106293846B
CN106293846B CN201610676573.5A CN201610676573A CN106293846B CN 106293846 B CN106293846 B CN 106293846B CN 201610676573 A CN201610676573 A CN 201610676573A CN 106293846 B CN106293846 B CN 106293846B
Authority
CN
China
Prior art keywords
analog processor
memory
legacy version
version analog
new version
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610676573.5A
Other languages
Chinese (zh)
Other versions
CN106293846A (en
Inventor
陈立东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tencent Technology Shenzhen Co Ltd
Tencent Cloud Computing Beijing Co Ltd
Original Assignee
Tencent Technology Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tencent Technology Shenzhen Co Ltd filed Critical Tencent Technology Shenzhen Co Ltd
Priority to CN201610676573.5A priority Critical patent/CN106293846B/en
Publication of CN106293846A publication Critical patent/CN106293846A/en
Application granted granted Critical
Publication of CN106293846B publication Critical patent/CN106293846B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45583Memory management, e.g. access or allocation

Abstract

The invention discloses a kind of upgrade method of analog processor and device, the upgrade method includes: to create the process of new version analog processor, while legacy version analog processor being kept to be in operation;Obtain the memory features information of the legacy version analog processor;By the memory features information transfer to the new version analog processor;After the completion of migration, the network connection of the legacy version analog processor is disconnected, and by the new version analog processor and be connected to the network.The present invention has the beneficial effect for the time for shortening the service disconnection when upgrading analog processor.

Description

The upgrade method and device of analog processor
Technical field
The invention belongs to the upgrade methods and device of field of communication technology more particularly to a kind of analog processor.
Background technique
Analog processor Qemu is to draw that is write to distribute with general GPL (public ticket for authorization) by Fabris shellfish The analog processor of source code, using extensive on the platforms such as Linux.For example, on cloud computing platform, virtual machine platform, mould Quasi- processor Qemu is as existing for core component.If analog processor Qemu existing defects itself need repair or It when needing to carry out function upgrading, generally requires to restart the server for being equipped with analog processor, but restarting server can make The business that server is presently processing generates interruption, and the time of this service disconnection longer operator to server causes No small loss, and the customer for providing business service to server generates bad user experience.
In order to solve in analog processor Qemu escalation process, this longer technical problem of business interruption time, existing skill Hot patch substantially is carried out by the way of the code segment for updating Qemu in art, so that analog processor Qemu has hot liter Grade ability.But analog processor Qemu is needed to have hot patch ability in advance by the way of hot patch, and existing old version Analog processor Qemu does not often have hot patch ability.Also, even if the ability of the part analog processor Qemu hot patch, It carries out needing to be fabricated separately hot patch when heat upgrading using hot patch, and the manufacturing process of hot patch is sufficiently complex, Wu Faman The continually quick upgrade requirement of sufficient analog processor Qemu.
Therefore, business interruption time of the analog processor Qemu of legacy version in escalation process how is reduced, is current The technical problem for needing urgently to be resolved.
Summary of the invention
The embodiment of the present invention provides the upgrade method and device of a kind of analog processor, to solve itself not having hot upgrading The longer technical problem of business interruption time of the analog processor of ability in escalation process.
The embodiment of the present invention provides a kind of upgrade method of analog processor, comprising the following steps:
The process of new version analog processor is created, while legacy version analog processor being kept to be in operation;
Obtain the memory features information of legacy version analog processor;
By the memory features information transfer to the new version analog processor;
After the completion of migration, the network connection of the legacy version analog processor is disconnected, and will be at the new version simulation Manage device and network connection.
The embodiment of the present invention provides a kind of update device of analog processor, comprising:
Creation module for creating the process of new version analog processor, while keeping legacy version analog processor to be in In operation;
Module is obtained, for obtaining the memory features information of the legacy version analog processor;
Transferring module is used for after the completion of migration, by the memory features information transfer to the new version simulation process Device;
Network connecting module, for after the completion of migration, disconnecting the network connection of the legacy version analog processor, and will The new version analog processor and network connection.
The process that the embodiment of the present invention passes through creation new version analog processor;Obtain the memory of legacy version analog processor Characteristic information;By the memory features information transfer to the new version analog processor;Disconnect the legacy version simulation process The network connection of device, and by the new version analog processor and network connection, so that updating the analog processor In the process, it is only necessary in the network connection and opening new version simulation process for disconnecting legacy version analog processor for analog processor Business service very short time is disconnected in the gap of the network connection of device, almost be can be ignored, is substantially reduced service disconnection Time.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those skilled in the art, without creative efforts, it can also be obtained according to these attached drawings other attached Figure.
Fig. 1 is the flow chart of the upgrade method for the analog processor that first preferred embodiment of the invention provides;
Fig. 2 is the flow chart of the upgrade method for the analog processor that second preferred embodiment of the invention provides;
Fig. 3 is the flow chart of the upgrade method for the analog processor that third preferred embodiment of the invention provides;
Fig. 4 is the structural schematic diagram of the update device of analog processor provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, those skilled in the art's every other implementation obtained without creative efforts Example, shall fall within the protection scope of the present invention.
The present invention provides the upgrade method and device of a kind of analog processor.
Wherein, the update device of the analog processor can integrate in physical machine, which can be terminal, operation Quotient's server etc..Physical machine setting has libvirt module, and libvirt module is a set of free, open source support Linux The function library of lower mainstream virtualization tool is mainly used for the starting, stoppings, temporary to the analog processor in the physical machine Stop, save, restoring, migrating, being connected to the network and the operations such as port setting are managed or provide support.
Embodiment one,
In the present embodiment, a kind of upgrade method of analog processor is provided, comprising the following steps: creation new version simulation The process of processor, while legacy version analog processor being kept to be in operation;The memory for obtaining legacy version analog processor is special Reference breath;By the memory features information transfer to the new version analog processor;After the completion of migration, the old edition is disconnected The network connection of this analog processor, and by the new version analog processor and be connected to the network.
As shown in Figure 1, the detailed process of the upgrade method can be such that
Step S101, the process of new version analog processor is created, while legacy version analog processor being kept to be in operation In;
In the specific implementation process, physical machine passes through network first or external movable storage device obtains new version simulation The installation kit of processor.It installs in physical machine and is provided using the libvirt module after the new version analog processor Function library creates the process of the new version analog processor by calling the respective function in the function library, so that the new edition This analog processor can operate normally.
Step S102, the memory features information of the legacy version analog processor is obtained;
Wherein, which can be the content of the virutal machine memory of legacy version analog processor, be stored in The correspondence physical memory area of physical machine.The memory features information can also be that the virutal machine memory of legacy version analog processor reflects Information is penetrated, the virutal machine memory map information of the legacy version analog processor includes the virtual machine physics of legacy version analog processor The physical machine physical memory addresses mapping relations of memory address and the legacy version analog processor.In specific implementation process, newly Version analog processor can use shared drive mechanism and deposit information to inquire and obtain the memory features.Wherein, the legacy version Analog processor is the analog processor that physical machine is being currently used.
Step S103, by the memory features information transfer to the new version analog processor;
In the specific implementation process, memory features information transfer will be inquired to the new version simulation process in process The correspondence storage region of device.
Step S104, after the completion of migration, the network connection of the legacy version analog processor is disconnected, and by the new edition This analog processor and network connection;
In the specific implementation process, this network switching process only needs Millisecond other time, therefore, the physical machine Be server business interruption time also only have millisecond rank, almost can be ignored.
From the foregoing, it will be observed that process of the present invention by creation new version analog processor;Obtain legacy version analog processor Memory features information;By the memory features information transfer to the new version analog processor;Disconnect the legacy version simulation The network connection of processor, and the new version analog processor is networked;To complete the heat upgrading to analog processor, and So that it is only necessary in the network company for disconnecting legacy version analog processor for analog processor during upgrading analog processor It connects and disconnects service very short time in the gap for the network connection for opening new version analog processor, almost can be ignored, Substantially reduce the time of service disconnection.
Embodiment two,
The upgrade method for the analog processor that the embodiment provides does not need legacy version simulator in the embodiment and has in advance Standby hot upgrading ability, but need the memory headroom of the reserved new version simulator of physical machine.
The upgrade method is the following steps are included: create the process of new version analog processor, while legacy version being kept to simulate Processor is in operation;Obtain the virutal machine memory content of the legacy version analog processor;At the legacy version simulation The virutal machine memory content migration of device is managed to the new version analog processor;After the completion of migration, the legacy version mould is disconnected The network connection of quasi- processor, and by the new version analog processor and be connected to the network;By the new version analog processor Identification information replaces the identification information of the legacy version analog processor.
As shown in Fig. 2, in the present embodiment, the detailed process of the upgrade method is as follows:
Step S201, the process of new version analog processor is created, while legacy version analog processor being kept to be in operation In;
In the specific implementation process, physical machine passes through network first or external movable storage device obtains new version simulation The installation kit of processor.It installs in physical machine and is provided using the libvirt module after the new version analog processor Function library creates the process of the new version analog processor by calling the respective function in the function library, so that the new edition This analog processor can operate normally.
Step S202, the virutal machine memory content of the legacy version analog processor is obtained;
In specific implementation process, the virutal machine memory content of legacy version analog processor is stored in the legacy version simulation process First storage region of device, is specially stored in the physical memory area of the physical machine.Wherein, the legacy version analog processor Analog processor currently in use when business currently processed for physical machine.The virutal machine memory content of the legacy version analog processor Including the legacy version analog processor be currently running operating system and application program status information and various cache informations Deng.
Step S203, by the virutal machine memory content migration of the legacy version analog processor at the new version simulation Manage device;
In the specific implementation process, legacy version simulator will be inquired virutal machine memory content and moved by interprocess communication The correspondence storage region in running new version analog processor is moved on to, the correspondence physics of the server is specially moved to In region of memory.
Step S204, after the completion of migration, the network connection of the legacy version analog processor is disconnected, and by the new edition This analog processor and network connection;
In the specific implementation process, the bridge of the port TAP of the legacy version analog processor and physical machine is disconnected, and will The port TAP of the new version analog processor is connect with the bridge.This network switching process only needs Millisecond other time, Therefore, which that is to say that the business interruption time of server also only has millisecond rank, almost can be ignored.
Step S205, the identification information of the new version analog processor is replaced to the mark of the legacy version analog processor Know information.
Wherein, the identification information include: network port identification (TAP port numbers), Universally Unique Identifier (UUID, Universally Unique Identifie) and one of analog processor instance name NAME or a variety of.Due to Libvirt module is when managing each analog processor, Universally Unique Identifier UUID and analog processor instance name NAME cannot be repeated, therefore before the process for creating the new version analog processor, will be first by the new version analog processor Universally Unique Identifier UUID and analog processor instance name NAME be revised as be different from the legacy version analog processor, It just will not influence the normal operation of the legacy version analog processor in this way.But after executing the step S204, physical machine is true The analog processor just run has been switched to the new version analog processor, and therefore, it is necessary to by the new version simulation process The identification information of device replaces the identification information of the legacy version analog processor.
From the foregoing, it will be observed that process of the present invention by creation new version analog processor;Obtain legacy version analog processor Virutal machine memory content;By the virutal machine memory content migration to the new version analog processor;After the completion of migration, break The network connection of the legacy version analog processor is opened, and the new version analog processor is networked;To complete to the mould The heat upgrading of quasi- processor, and make during updating the analog processor, it is only necessary to old in disconnection for analog processor It is very short that service is disconnected in the gap of network connection with the network connection for opening new version analog processor of version analog processor Time almost can be ignored, and substantially reduce the time of service disconnection.
Embodiment three,
The upgrade method for the analog processor that the embodiment provides, the implementation do not need physical machine and reserve new version simulator Memory headroom, and further shorten business interruption time.
Method includes the following steps: the process of creation new version analog processor, while keeping legacy version simulation process Device is in operation;Obtain the virutal machine memory map information of the legacy version analog processor, wherein the virutal machine memory Map information includes the virtual machine physical memory addresses of the legacy version analog processor and reflecting for physical machine physical memory addresses Penetrate relationship;The physical machine physical memory addresses of legacy version analog processor are mapped to new version analog processor, it is old to establish The virtual machine physical memory addresses of the physical machine physical memory addresses and new version analog processor of version analog processor are reflected Penetrate relationship;The network connection of the legacy version analog processor is disconnected, and by the new version analog processor and is connected to the network; The identification information of the new version analog processor is replaced to the identification information of the legacy version analog processor.
As shown in figure 3, in the present embodiment, the detailed process of the upgrade method is as follows:
Step S301, the process of new version analog processor is created, while legacy version analog processor being kept to be in operation In;
In the specific implementation process, physical machine passes through network first or external movable storage device obtains new version simulation The installation kit of processor.It installs in physical machine and is provided using the libvirt module after the new version analog processor Function library creates the process of the new version analog processor by calling the respective function in the function library, so that the new edition This analog processor can operate normally.
Step S302, the virutal machine memory map information of the legacy version analog processor is obtained, wherein the virtual machine Memory mapping information includes the virtual machine physical memory addresses and physical machine physical memory addresses of the legacy version analog processor Mapping relations.
In the specific implementation process, it can use shared drive mechanism to inquire and obtain legacy version analog processor Virutal machine memory map information.The virutal machine memory map information of the legacy version analog processor can be EPT page table (EPT, Extended Page Tables), save legacy version analog processor virtual machine physical memory addresses and the old edition The mapping relations of the physical machine physical memory addresses of this analog processor.Wherein, which works as physical machine Preceding analog processor currently in use.
The virutal machine memory content of the legacy version analog processor of the legacy version analog processor includes the legacy version mould Quasi- processor is currently running the status information and various cache informations etc. of operating system and application program.
Step S303, the physical machine physical memory addresses of legacy version analog processor are mapped to new version simulation process Device establishes the physical machine physical memory addresses of legacy version analog processor and the virtual machine physical memory of new version analog processor The mapping relations of address.
It in the specific implementation process, will by the physical machine physical memory of legacy version analog processor using the mapping function Location is mapped to the linear address space of the process of the new version analog processor one by one, to set up the new version simulation process The EPT page table of device that is to say the physical machine physical memory addresses of legacy version analog processor and the void of new version analog processor The mapping relations of quasi- machine physical memory addresses.When new version analog processor is after re-establishing EPT page table, which is simulated The virtual machine physical address of processor will be associated with the virutal machine memory content of the legacy version analog processor according to EPT page table Storage region, to achieve the purpose that the virutal machine memory content for accessing the legacy version analog processor.
Step S304, after the completion of migration, the network connection of the legacy version analog processor is disconnected, and by the new edition This analog processor and network connection;
In the specific implementation process, the bridge of the port TAP of the legacy version analog processor and physical machine is disconnected, and will The port TAP of the new version analog processor is connect with the bridge.This network switching process only needs Millisecond other time, Therefore, which that is to say that the business interruption time of server also only has millisecond rank, almost can be ignored.
Step S305, the identification information of the new version analog processor is replaced to the mark of the legacy version analog processor Know information.
Wherein, which includes: network port identification (TAP port numbers), Universally Unique Identifier UUID and mould Quasi- processor instance name NAME.Since libvirt module is when managing each analog processor, Universally Unique Identifier UUID And analog processor instance name NAME cannot be repeated, therefore before the process for creating the new version analog processor, it will First the Universally Unique Identifier UUID of the new version analog processor and analog processor instance name NAME are revised as not It is same as the legacy version analog processor, just will not influence the normal operation of the legacy version analog processor in this way.But it is executing After complete step S204, the physical machine analog processor really to be run has been switched to the new version analog processor, therefore, The identification information by the new version analog processor is needed to replace the identification information of the legacy version analog processor.
From the foregoing, it will be observed that process of the present embodiment using creation new version analog processor;Obtain legacy version analog processor Processor information linear address, the linear address corresponds to each other with the processor information physical address is stored;It will be described Linear address space of the linear address of cache of processor information to the new version analog processor;After the completion of migration, disconnect The network connection of the legacy version analog processor, and by the new version analog processor and be connected to the network;By the new version The identification information of analog processor replaces with the identification information of the legacy version analog processor, so that updating at the simulation During managing device, it is only necessary in the network connection and opening new version mould for disconnecting legacy version analog processor for analog processor Service very short time is disconnected in the gap of the network connection of quasi- processor, almost can be ignored, substantially reduce in business The disconnected time;And due to carrying out shared processor information using the mode of mapping processor information linear address, without The processor information for replicating legacy version analog processor, the analog processor for solving physical machine in the prior art upgrade in heat When the problem of needing reserved memory.
Example IV,
In order to better implement above method, the embodiment of the present invention also provides a kind of update device of analog processor, such as Shown in Fig. 4, the update device of the analog processor includes: creation module 401, obtains module 402, transferring module 403, network company Connection module 404 and modified module 405.
Wherein, which is used to create the process of new version analog processor, while keeping the legacy version mould Quasi- processor is in operation;The function library that the creation module 401 is provided using the libvirt module, by calling the function Respective function in library creates the process of the new version analog processor, which is normally transported Row.
The acquisition module 402 is used to obtain the memory features information of legacy version analog processor.The acquisition module 402 passes through The memory features information of the legacy version analog processor is inquired and obtained to the query function that the libvirt module provides.
Wherein, which can be the content of the virutal machine memory of old edition present processor, at this point, the acquisition mould Block 402 is used to obtain the content of the virutal machine memory of legacy version analog processor.
The memory features information can also be virutal machine memory map information, in the virtual machine of the legacy version analog processor Depositing map information includes the virtual machine physical memory addresses of legacy version analog processor and the object of the legacy version analog processor Reason machine physical memory addresses mapping relations, at this point, the acquisition module 402 is used to obtain in the virtual machine of legacy version analog processor Deposit map information.
Transferring module 403 is used for the memory features information transfer to the new version analog processor.Wherein, when this When memory features information is the content of virutal machine memory, transferring module 403 is used for the virtual of the legacy version analog processor The content migration of machine memory is to the new version analog processor.
When the memory features information is virutal machine memory map information, transferring module 403 is by legacy version analog processor Physical machine physical memory addresses are mapped to new version analog processor, to establish in the physical machine physics of legacy version analog processor Deposit the mapping relations of the virtual machine physical memory addresses of address and new version analog processor.
Network connecting module 404 is used for after the completion of migration, disconnects the network connection of the legacy version analog processor, and By the new version analog processor and network connection.It passes through the network interface function for calling the libvirt module to provide Function disconnects the bridge of the port TAP of the legacy version analog processor and physical machine to realize, and will be at the new version simulation The port TAP of reason device is connect with the bridge.This network switching process only needs Millisecond other time, therefore, the physical machine It that is to say that the business interruption time of server also only has millisecond rank, almost can be ignored.
Modified module 405 is used to the identification information of the new version analog processor replacing the legacy version simulation process The identification information of device.Identification information includes in network port identification, Universally Unique Identifier and analog processor instance name It is at least one.
From the foregoing, it will be observed that the present invention creates the process of new version analog processor by creation module;First acquisition module obtains Take the memory features information of legacy version analog processor;Transferring module is by the memory features information transfer to the new version mould Quasi- processor;After the completion of migration, network connecting module disconnects the network connection of the legacy version analog processor, and will be described New version analog processor and network connection to complete to upgrade the heat of analog processor, and make in upgrading simulation process During device, it is only necessary in the network connection and opening new version simulation for disconnecting legacy version analog processor for analog processor Service very short time is disconnected in the gap of the network connection of processor, almost be can be ignored, is substantially reduced service disconnection Time.
It should be noted that this field common test personnel can for the upgrade method of the analog processor of the invention It is that can pass through computer to understand all or part of the process for the upgrade method for realizing the analog processor of the embodiment of the present invention Program is completed to control relevant hardware, which can be stored in a computer-readable storage medium, such as deposit Storage executes in the memory of terminal, and by least one processor in the terminal, in the process of implementation may include such as the mould The process of the embodiment of the upgrade method of quasi- processor.Wherein, the storage medium being somebody's turn to do can be magnetic disk, CD, read-only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory) etc..
For the update device of the analog processor of the embodiment of the present invention, each functional module be can integrate at one It handles in chip, is also possible to modules and physically exists alone, a mould can also be integrated in two or more modules In block.Above-mentioned integrated module both can take the form of hardware realization, can also be realized in the form of software function module. If the integrated module is realized and when sold or used as an independent product in the form of software function module, can also deposit In a computer readable storage medium, which is for example read-only memory, disk or CD etc. for storage.
The upgrade method and device for being provided for the embodiments of the invention a kind of analog processor above have carried out in detail It introduces, used herein a specific example illustrates the principle and implementation of the invention, the explanation of above embodiments It is merely used to help understand method and its core concept of the invention;Meanwhile for those skilled in the art, according to the present invention Thought, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be understood For limitation of the present invention.

Claims (12)

1. a kind of upgrade method of analog processor, which comprises the following steps:
The process of new version analog processor is created, while legacy version analog processor being kept to be in operation;
Obtain the memory features information of the legacy version analog processor, the memory features information of the legacy version analog processor Including characteristic information relevant to the virutal machine memory content of the legacy version analog processor;
By the memory features information transfer of the legacy version analog processor to the new version analog processor;
After the completion of migration, the network connection of the legacy version analog processor is disconnected, and by the new version analog processor With network connection.
2. the upgrade method of analog processor according to claim 1, which is characterized in that the memory features information includes Virutal machine memory map information, and the step of memory features information for obtaining the legacy version analog processor includes:
Obtain the virutal machine memory map information of the legacy version analog processor, wherein the virutal machine memory map information The mapping relations of virtual machine physical memory addresses comprising the legacy version analog processor and physical machine physical memory addresses.
3. the upgrade method of analog processor according to claim 2, which is characterized in that described to believe the memory features Ceasing the step of moving to the new version analog processor includes:
The physical machine physical memory addresses of legacy version analog processor are mapped to new version analog processor, to establish legacy version The mapping of the virtual machine physical memory addresses of the physical machine physical memory addresses and new version analog processor of analog processor is closed System.
4. the upgrade method of analog processor according to claim 1, which is characterized in that the memory features information includes Virutal machine memory content, and the step of memory features information for obtaining the legacy version analog processor includes:
Obtain the virutal machine memory content of the legacy version analog processor.
5. the upgrade method of analog processor according to claim 1, which is characterized in that disconnect the legacy version described The network connection of analog processor, and after the step of new version analog processor is networked, further includes:
The identification information of the new version analog processor is replaced to the identification information of the legacy version analog processor.
6. the upgrade method of analog processor according to claim 5, which is characterized in that the identification information includes network At least one of port-mark, Universally Unique Identifier and analog processor instance name.
7. a kind of update device of analog processor characterized by comprising
Creation module for creating the process of new version analog processor, while keeping legacy version analog processor to be in operation In;
Module is obtained, for obtaining the memory features information of the legacy version analog processor, the legacy version analog processor Memory features information include characteristic information relevant to the virutal machine memory content of the legacy version analog processor;
Transferring module is used for the memory features information transfer to the new version analog processor;
Network connecting module, for after the completion of migration, disconnecting the network connection of the legacy version analog processor, and will be described New version analog processor and network connection.
8. the update device of analog processor according to claim 7, which is characterized in that the memory features information includes Virutal machine memory map information, and the virutal machine memory mapping letter for obtaining module and being used to obtain legacy version analog processor Breath, wherein the virutal machine memory map information include the legacy version analog processor virtual machine physical memory addresses with The mapping relations of physical machine physical memory addresses.
9. the update device of analog processor according to claim 8, which is characterized in that the transferring module is used for will be old The physical machine physical memory addresses of version analog processor are mapped to new version analog processor, to establish legacy version simulation process The mapping relations of the virtual machine physical memory addresses of the physical machine physical memory addresses and new version analog processor of device.
10. the update device of analog processor according to claim 7, which is characterized in that the memory features packet Virutal machine memory content is included, and the module that obtains is for obtaining the virutal machine memory content of legacy version analog processor.
11. the update device of analog processor according to claim 7, which is characterized in that further include:
Modified module, for the identification information of the new version analog processor to be replaced to the mark of the legacy version analog processor Know information.
12. the update device of analog processor according to claim 11, which is characterized in that the identification information includes net At least one of network port-mark, Universally Unique Identifier and analog processor instance name.
CN201610676573.5A 2016-08-16 2016-08-16 The upgrade method and device of analog processor Active CN106293846B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610676573.5A CN106293846B (en) 2016-08-16 2016-08-16 The upgrade method and device of analog processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610676573.5A CN106293846B (en) 2016-08-16 2016-08-16 The upgrade method and device of analog processor

Publications (2)

Publication Number Publication Date
CN106293846A CN106293846A (en) 2017-01-04
CN106293846B true CN106293846B (en) 2019-08-13

Family

ID=57679259

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610676573.5A Active CN106293846B (en) 2016-08-16 2016-08-16 The upgrade method and device of analog processor

Country Status (1)

Country Link
CN (1) CN106293846B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107168769B (en) * 2017-03-30 2020-12-18 联想(北京)有限公司 Information processing method and electronic equipment
CN109861839B (en) * 2017-11-30 2022-04-05 华为技术有限公司 Method for upgrading virtual switch without service interruption and related equipment
CN109308196B (en) * 2018-08-22 2020-04-14 腾讯科技(深圳)有限公司 Multi-model equipment multiplexing method and device and storage medium
CN110968392B (en) * 2018-09-30 2024-04-12 华为技术有限公司 Method and device for upgrading virtualized simulator
CN113468136A (en) * 2020-03-30 2021-10-01 北京金山云网络技术有限公司 Upgrading method and device of cloud platform and server
CN116319310A (en) * 2021-12-07 2023-06-23 中兴通讯股份有限公司 Virtual switch upgrading method, equipment, electronic equipment and storage medium

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1946226A (en) * 2006-10-20 2007-04-11 华为技术有限公司 Method, device for upgrading telecommunication equipment and upgrading engine unit
CN105681060A (en) * 2014-11-17 2016-06-15 中兴通讯股份有限公司 Virtualization network function management upgrading method and apparatus and virtualization network function management server

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10296320B2 (en) * 2014-09-10 2019-05-21 International Business Machines Corporation Patching systems and applications in a virtualized environment
US9886297B2 (en) * 2014-12-11 2018-02-06 Amazon Technologies, Inc. Systems and methods for loading a virtual machine monitor during a boot process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1946226A (en) * 2006-10-20 2007-04-11 华为技术有限公司 Method, device for upgrading telecommunication equipment and upgrading engine unit
CN105681060A (en) * 2014-11-17 2016-06-15 中兴通讯股份有限公司 Virtualization network function management upgrading method and apparatus and virtualization network function management server

Also Published As

Publication number Publication date
CN106293846A (en) 2017-01-04

Similar Documents

Publication Publication Date Title
CN106293846B (en) The upgrade method and device of analog processor
CN110088733A (en) The layout based on accumulation layer of virtual machine (vm) migration
US20150169313A1 (en) Integrated system and firmware update method
CN107632937B (en) Method and device for testing virtual machine cluster and readable storage medium
US9122716B1 (en) Database upgrade management
US9317380B2 (en) Preserving management services with self-contained metadata through the disaster recovery life cycle
CN110673941B (en) Migration method of micro-services in multiple computer rooms, electronic equipment and storage medium
JP2010527056A (en) Virtual machine migration
CN104639361A (en) Network service template management method and device
WO2021169129A1 (en) Virtual machine online migration method and apparatus, device, and computer readable storage medium
WO2020093976A1 (en) Resource change method and device, apparatus, and storage medium
CN108089913A (en) A kind of virtual machine deployment method of super emerging system
WO2018191849A1 (en) Cloud management platform, virtual machine management method and system thereof
CN106469103A (en) The maintaining method of hard disk and device
CN105635311A (en) Method for synchronizing resource pool information in cloud management platform
US20220004411A1 (en) Hot Growing A Cloud Hosted Block Device
CN108319492B (en) Method, device and system for resetting physical machine
CN104407890A (en) Method for starting Android system from OTG (On-The-Go) equipment
CN104298761A (en) Implementation method for master data matching between heterogeneous software systems
CN104516744A (en) Software updating method and system
CN105068899A (en) Automatic reboot stability test method for Vmware system
CN104780068B (en) A kind of method for switching network, the apparatus and system of computer room migration
CN105988898A (en) System backup device and backup method
CN113946854A (en) File access control method and device and computer readable storage medium
CN103019847A (en) Method and system for migrating data of virtual machine

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20230630

Address after: 518057 Tencent Building, No. 1 High-tech Zone, Nanshan District, Shenzhen City, Guangdong Province, 35 floors

Patentee after: TENCENT TECHNOLOGY (SHENZHEN) Co.,Ltd.

Patentee after: TENCENT CLOUD COMPUTING (BEIJING) Co.,Ltd.

Address before: 2, 518000, East 403 room, SEG science and Technology Park, Zhenxing Road, Shenzhen, Guangdong, Futian District

Patentee before: TENCENT TECHNOLOGY (SHENZHEN) Co.,Ltd.

TR01 Transfer of patent right