CN106292445A - A kind of error correction device based on FPGA and method - Google Patents
A kind of error correction device based on FPGA and method Download PDFInfo
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- CN106292445A CN106292445A CN201610772618.9A CN201610772618A CN106292445A CN 106292445 A CN106292445 A CN 106292445A CN 201610772618 A CN201610772618 A CN 201610772618A CN 106292445 A CN106292445 A CN 106292445A
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- fpga
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0428—Safety, monitoring
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2604—Test of external equipment
Abstract
The invention discloses a kind of error correction device based on FPGA, including the unit to be corrected containing fpga chip, signal processing unit, input source, output receiving terminal and standard measuring equipment；Being provided with control module and correction module in described fpga chip, described control module connects memory element；This device obtains actual value by standard measuring equipment, make comparisons with the theoretical value in processing unit, drawing its correction value, and correction value be stored in the configuration chip subregion of FPGA, when powering on, FPGA can automatically call correction value and carries out the correction of I/O channel；This method can improve the sampling of unit and output accuracy, and realizes the localization of correction parameter in the case of not changing existing hardware, it is to avoid the trouble being managed unit corrected values multiple in system, effectively raises efficiency and reliability.
Description
Technical field
The invention belongs to electric and electronic technical field, be specifically related to a kind of error correction device based on FPGA and method.
Background technology
Along with the development of high power electronic equipment, the huge function of its system is complicated, and control accuracy is high, therefore to relevant
The quantitative requirement of input and output analog quantity increase, precision also requires that more and more higher.
Along with decline and the maturation of development technique of FPGA price, FPGA is used to carry out interface in the application of present stage
Extension has been a kind of universal application and means with control.Due to the non-linear spy of electronic devices and components in actual application circuit
Property, can make unavoidably to control to produce between output and sample input value and actual value error.
It is typically all under the conditions of prior art and in main algorithm, it is modified.This itself can bring about the pressure of computing
Power, especially when these value quantity are the biggest, will have a strong impact on control performance.
On the other hand, typically having multiple unit needing and correcting in complicated system, the increase and decrease of unit or replacing are all
Needing to modify mastery routine, on the one hand this add the difficulty of exploitation, the probability made mistakes on the other hand also increased.
Summary of the invention
In order to overcome the shortcoming and defect of prior art, an object of the present invention is to provide a kind of error based on FPGA
Correcting unit, is mainly used in the accuracy correction function using FPGA to carry out sampling input, output etc., is particularly suited for by mistake
Difference there are certain requirements and the equipment higher to required precision.
The technical solution adopted for the present invention to solve the technical problems is: a kind of error correction device based on FPGA, bag
Include the unit to be corrected containing fpga chip, signal processing unit, input source, output receiving terminal and standard measuring equipment；Described
Fpga chip in be provided with control module and correction module, described control module connects a memory element, control module with
Signal processing unit communicates, and the data transmitted carry out verifying and storing in corresponding memory space；Described school
Inputoutput data is corrected by holotype tuber according to control information；Described signal processing unit completes the generation of checking list,
It is converted into the data form that fpga chip is capable of identify that and is delivered to memory element；Described standard measuring equipment is for defeated to input
Output measures, and its measured value is i.e. considered actual physical values.
Described a kind of based on FPGA error correction device, its fpga chip includes FPGA module and HPS module, described
Control module and correction module be positioned at HPS module.
Described a kind of based on FPGA error correction device, its memory element is the EPCS core for configuring fpga chip
Sheet or other storage chips.
Described a kind of based on FPGA error correction device, its memory element is the FLASH for configuring fpga chip
Chip.
The two of the purpose of the present invention are to provide a kind of realization on the basis of not changing original hardware sampling input, output
Deng error correction, and realize correction calculation and correction parameter storage localization, improve unit the degree of modularity, alleviate upper strata
The computing pressure of software, the error calibration method of the difficulty that simplified system is safeguarded.
The technical solution adopted for the present invention to solve the technical problems is: a kind of error calibration method based on FPGA, step
Rapid as follows:
S01: determine sampling point value according to input/output bound and required precision；
S02: generate one according to sampled value or the output valve of unit to be corrected, the measured value of standard measuring equipment and sampling point value
Individual checking list；
S03: checking list is carried out form conversion and is downloaded in memory element；
Automatically each passage is corrected according to checking list when S04:FPGA core powers on, completes error correcting function.
For inputting timing, it is necessary first to set sample range and sampling step length, thus determine sampling trigger point,
Then input stimulus, is simultaneously entered correction computing unit by the measured value of the sampling point value before correction with standard measuring equipment, when
When canonical measure value=sampling triggers point value, the most automatically trigger correction calculation, and combine sampling point value generation checking list before correction,
After completing the correction of whole set point sampled point, checking list is carried out data conversion, changes into and can be identified by FPGA side and deposit
The data form of storage.
When output calibration, it is first determined sampling trigger point, input setting value, then according to the conversion corresponding to device
Relation draws the motivation value of device, driving element, measures output, and is made comparisons with setting value by measured value, according to comparative result
Revise motivation value, until error meets requirement, then setting value generated checking list with motivation value, enter next check point,
Until completing the correction of set point, finally checking list being carried out data conversion, changing into and can be identified by FPGA side and store
Data form.
The invention has the beneficial effects as follows:
This device obtains actual value by standard measuring equipment, makes comparisons with the theoretical value in processing unit, draws its correction value,
And correction value is stored in the configuration chip subregion of FPGA, when powering on, FPGA can automatically call correction value and carries out input and output
The correction of passage.
The inventive method in the case of not changing existing hardware, can improve sampling and the output accuracy of unit, and
Realize the localization of correction parameter, it is to avoid trouble that unit corrected values multiple in system are managed, effectively raise
Efficiency and reliability；Achieve on the basis of not changing original hardware, by software to sampling input, the error of controlled output
Correction；When normally working, correction work has been automatically configured by FPGA after the power-up, and multichannel correction can complete parallel, computing speed
Degree height, correction data achieves localization storage and management, it is to avoid in system, increase and decrease or the replacing of unit are required for upper strata
The trouble that program is modified, reduces the maintenance difficulties of system, improves reliability.
Accompanying drawing explanation
Fig. 1 is functional unit annexation figure during correction data of the present invention generation；
Fig. 2 is the process schematic that the present invention inputs correction；
Fig. 3 is the process schematic of output calibration of the present invention.
Detailed description of the invention
In order to more clearly illustrate the present invention program, with example, summary of the invention is carried out further below in conjunction with the accompanying drawings
Explanation.Should be appreciated that specifically embodiment described herein is only used for explaining the present invention, protection domain is not limited to described
Example.
With reference to shown in Fig. 1, the invention discloses a kind of error correction device based on FPGA, including containing fpga chip
Unit to be corrected, signal processing unit, input source, output receiving terminal and standard measuring equipment.
Control module and correction module it is provided with in described fpga chip.
Described unit to be corrected can automatically configure FPGA according to correction data and complete the correction work of data, and realizes
Correction parameter storage and management function localizes, including the control module being arranged in fpga chip and correction module, described
Fpga chip includes FPGA module and HPS module, and described control module and correction module are positioned at the control that HPS module is described
Connecting in module and have memory element, control module and signal processing unit communication, the data transmitted carry out verifying also
Store in corresponding memory space, control module be responsible for opening up in memory space one piece of available space for parameter storage with
Management, and automatically configure correction module upon power-up of the system；Described correction module according to control information to inputoutput data
Being corrected, it has parallel characteristics and can be corrected multichannel data amount rapidly, i.e. stores data in and FPGA phase
Memory element even realizes the parallel processing of multichannel data, to improve data processing speed；
Described signal processing unit completes Data correction and data form translation function, according to the required precision set, theory
Value and actual value result of the comparison, be automatically performed the generation of checking list according to algorithm, and be translated into fpga chip and can know
Other data form, data are delivered to the memory element of FPGA side the most at last.
Our department is divided into the arithmetic element of correction parameter, and it can be the upper bit position of band correction unit place system, it is possible to
To be other independent device, its major function is to be corrected ginseng by the difference between contrast theoretical value and actual sample value
The calculating of number, because the memory space needed for correction data and the quantity linear correlation of sampled point, so should be according to sampling precision
Require reasonably to select the sampling interval.
Described standard measuring equipment is for measuring input and output amount, and its measured value is i.e. considered actual physics
Value, so the selection of standard measuring equipment should be able to meet the required precision needed for correction.
Described external input sources, output receiving terminal, standard measuring equipment, belong to auxiliary device, can be according to concrete right
As selecting voluntarily with required precision.
External input sources and the auxiliary device that output receiving terminal is this correction system, need to enter according to concrete amount to be corrected
Row is selected, if as A/D convertor circuit then external input sources can be selected for meeting the variable voltage source of requirement；If DA change-over circuit
Then exporting the resistance of the optional satisfied requirement of receiving terminal, i.e. both presence or absence will according to concrete calibration object voluntarily with selection
Determine.
If measurement apparatus has delivery outlet to dock with signal processing unit, then its delivery outlet can be directly accessed signal processing unit
It is corrected computing, if measurement apparatus is without the delivery outlet docked with signal processing unit, mode can be manually entered to use.
Memory element is the configuration chip of FPGA, because correction data is smaller, and the free time of FPGA configuration chip
Part can meet its requirement.This scheme can simplify design complexities, also will not increase cost, and for controlling cost, storage is single
Unit is EPCS chip or the idle component of FLASH chip for configuring fpga chip, if there being specific demand also to can be selected for
The memory element of other form, but still it is considered as this patent protection domain.
Signal processing unit is to operate in certainly to write software in PC in this example, and PC is by Ethernet and list to be corrected
The system at unit place connects, thus obtains the data of unit to be corrected.
A kind of error calibration method based on FPGA, relates to including unit to be corrected, signal processing unit, input source, defeated
Going out the error correction device of receiving terminal and standard measuring equipment, step is as follows:
S01: determine sampling point value according to input/output bound and required precision；
S02: generate one according to sampled value or the output valve of unit to be corrected, the measured value of standard measuring equipment and sampling point value
Individual checking list；
S03: checking list is carried out form conversion and is downloaded in memory element；
Automatically each passage is corrected according to checking list when S04:FPGA core powers on, completes error correcting function.
Calibration substance can be divided into input correction and output calibration two aspect content, and it is as follows that it realizes process:
As in figure 2 it is shown, in input correction example, it is necessary first to set sample range and sampling step length, thus determine and adopt
Sample trigger point, then input stimulus, be simultaneously entered correction fortune by the measured value of the sampling point value before correction with standard measuring equipment
Calculate unit, when canonical measure value=sampling triggers point value, the most automatically trigger correction calculation, and combine sampling point value life before correction
Becoming checking list, after completing the correction of whole set point sampled point, checking list is carried out data conversion, changing into can be by FPGA side
The data form identified and store.
As it is shown on figure 3, in output calibration example, it is first determined sampling trigger point, input setting value, then according to device
Corresponding conversion relation draws the motivation value of device, driving element, measures output, and is made comparisons with setting value by measured value,
According to comparative result correction motivation value, until error meets requirement, then setting value is generated checking list with motivation value, under entrance
One check point, until completing the correction of set point, finally carries out data conversion to checking list, changes into and can be known by FPGA side
Data form that is other and that store.
The principle of above-described embodiment only illustrative present invention and effect thereof, and the embodiment that part is used, for
For those of ordinary skill in the art, without departing from the concept of the premise of the invention, it is also possible to make some deformation and
Improving, these broadly fall into protection scope of the present invention.
Claims (8)
1. an error correction device based on FPGA, it is characterised in that: include the unit to be corrected containing fpga chip, signal
Processing unit, input source, output receiving terminal and standard measuring equipment；
Being provided with control module and correction module in described fpga chip, described control module connects memory element, control
Molding block and signal processing unit communication, the data transmitted carry out verifying and storing in corresponding memory space；
Inputoutput data is corrected by described correction module according to control information；
Described signal processing unit completes the generation of checking list, is converted into the data form that fpga chip is capable of identify that and is delivered to
Memory element；
Described standard measuring equipment is for measuring input and output amount, and its measured value is i.e. considered actual physical values.
A kind of error correction device based on FPGA the most according to claim 1, it is characterised in that described fpga chip
Including FPGA module and HPS module, described control module and correction module are positioned at HPS module.
A kind of error correction device based on FPGA the most according to claim 1, it is characterised in that described memory element
For the EPCS chip for configuring fpga chip.
A kind of error correction device based on FPGA the most according to claim 1, it is characterised in that described memory element
For the FLASH chip for configuring fpga chip.
5. an error calibration method based on FPGA, relates to including unit to be corrected, signal processing described in claim 1
Unit, input source, output receiving terminal and the error correction device of standard measuring equipment, it is characterised in that step is as follows:
S01: determine sampling point value according to input/output bound and required precision；
S02: generate one according to sampled value or the output valve of unit to be corrected, the measured value of standard measuring equipment and sampling point value
Individual checking list；
S03: checking list is carried out form conversion and is downloaded in memory element；
Automatically each passage is corrected according to checking list when S04:FPGA core powers on, completes error correcting function.
A kind of error calibration method based on FPGA the most according to claim 5, it is characterised in that be used for inputting correction
Time, it is first determined sampling trigger point, input stimulus, by the most defeated with the measured value of standard measuring equipment for the sampling point value before correction
Enter correction computing unit, when canonical measure value=sampling triggers point value, the most automatically trigger correction calculation, and adopt before combining correction
Sample value generates checking list, after completing the correction of whole set point sampled point, checking list is carried out data conversion, and changing into can
The data form identified by FPGA side and store.
A kind of error calibration method based on FPGA the most according to claim 5, it is characterised in that for output calibration
Time, when output calibration, it is first determined sampling trigger point, input setting value, then according to the conversion relation corresponding to device
Draw the motivation value of device, driving element, measure output, and measured value is made comparisons with setting value, according to comparative result correction
Motivation value, until error meets requirement, then generates checking list by setting value with motivation value, enters next check point, until
Complete the correction of set point, finally checking list is carried out data conversion, change into the data that can be identified by FPGA side and store
Form.
8. according to a kind of based on FPGA the error calibration method described in claim 7 or 6, it is characterised in that described sampling
Trigger point determines by setting sample range and sampling step length.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610772618.9A CN106292445A (en) | 2016-08-31 | 2016-08-31 | A kind of error correction device based on FPGA and method |
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|---|---|---|---|
| CN201610772618.9A CN106292445A (en) | 2016-08-31 | 2016-08-31 | A kind of error correction device based on FPGA and method |
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| CN201610772618.9A Pending CN106292445A (en) | 2016-08-31 | 2016-08-31 | A kind of error correction device based on FPGA and method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113434318A (en) * | 2021-06-23 | 2021-09-24 | 山东浪潮科学研究院有限公司 | FPGA-based sampling data correction method and system |
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| CN103346793A (en) * | 2013-07-19 | 2013-10-09 | 深圳创维－Rgb电子有限公司 | Method and device for ADC automatic correction |
| CN103487776A (en) * | 2013-09-14 | 2014-01-01 | 西安奇维科技股份有限公司 | Error correcting method based on FPGA |
| CN103490781A (en) * | 2013-09-14 | 2014-01-01 | 西安奇维科技股份有限公司 | High-accuracy analog signal acquisition circuit with temperature self-correcting function |
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| CN1869615A (en) * | 2005-05-24 | 2006-11-29 | 富晶半导体股份有限公司 | Temp. compensation device of electronic signal |
| CN102025364A (en) * | 2010-12-28 | 2011-04-20 | 福州大学 | Analog quantity input circuit using digital isolation and conditioning technology |
| CN103346793A (en) * | 2013-07-19 | 2013-10-09 | 深圳创维－Rgb电子有限公司 | Method and device for ADC automatic correction |
| CN103487776A (en) * | 2013-09-14 | 2014-01-01 | 西安奇维科技股份有限公司 | Error correcting method based on FPGA |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113434318A (en) * | 2021-06-23 | 2021-09-24 | 山东浪潮科学研究院有限公司 | FPGA-based sampling data correction method and system |
| CN113434318B (en) * | 2021-06-23 | 2022-08-23 | 山东浪潮科学研究院有限公司 | FPGA-based sampled data correction method and system |
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