CN106252221A - Lithographic method - Google Patents

Lithographic method Download PDF

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Publication number
CN106252221A
CN106252221A CN201510325500.7A CN201510325500A CN106252221A CN 106252221 A CN106252221 A CN 106252221A CN 201510325500 A CN201510325500 A CN 201510325500A CN 106252221 A CN106252221 A CN 106252221A
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CN
China
Prior art keywords
solution
etching
semiconductor substrate
lithographic method
acid
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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CN201510325500.7A
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Chinese (zh)
Inventor
单少杰
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201510325500.7A priority Critical patent/CN106252221A/en
Publication of CN106252221A publication Critical patent/CN106252221A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching

Abstract

The present invention provides a kind of lithographic method, comprises the steps: to provide Semiconductor substrate;Using the first solution that described Semiconductor substrate carries out first step etching, the first solution includes acid and hydrogen peroxide;Then using the second solution that described Semiconductor substrate carries out second step etching, the second solution includes phosphoric acid and potassium permanganate.Through the Semiconductor substrate of the lithographic method of the present invention, both can ensure that the groove that etching is formed had the most vertical width ratio, it is also possible to improve the uniformity on the surface formed after etching.

Description

Lithographic method
Technical field
The present invention relates to semiconductor device processing technology field, particularly relate to a kind of lithographic method.
Background technology
Etching is an important process in semiconductor photoelectronic device preparation process, its objective is by physics or The method of chemistry optionally removes material to form required table top or figure from wafers of semiconductor material surface. Etching technics is divided into dry etching and wet etching two kinds.The pattern precision of dry etching and degree of anisotropy are all Higher, and the controllability of parameters is preferable, but easily cause the etching injury of material, and dry etching equipment Expensive;Wet etching has good repeatability, have simple to operate, etch rate is fast, nontoxic or low The advantages such as malicious, good repeatability, but the performance such as controllability and pattern precision need to be by selecting suitable component It is adjusted with the corrosive liquid of proportioning.
The wet etching liquid used the most both at home and abroad typically has phosphoric acid system, sulphuric acid system, Fluohydric acid. system etc., and Etching liquid all be use hydrogen peroxide as oxidant, but, present inventor find, the chemistry of hydrogen peroxide Character is unstable, it is easy to decompose, and can produce bubble at semiconductor surface thus affect etching in etching process Uniformity, the flatness on the surface after reduction etching.
Summary of the invention
It is an object of the invention to, it is provided that a kind of lithographic method, it is ensured that the vertical wide ratio of groove after etching, change Surface smoothness after kind Semiconductor substrate etching.
For solving above-mentioned technical problem, the present invention provides a kind of lithographic method, including:
Semiconductor substrate is provided;
Using the first solution that described Semiconductor substrate carries out first step etching, described first solution includes acid And hydrogen peroxide;And
Using the second solution that described Semiconductor substrate carries out second step etching, described second solution includes phosphorus Acid and potassium permanganate.
Optionally, described acid is phosphoric acid, sulphuric acid or Fluohydric acid..
Optionally, in described first solution, the volume shared by acid is 1/20~1/2, peroxidating in described first solution Volume shared by hydrogen is 1/20~2/5.
Optionally, the etch period of described first step etching is 500s-1500s.
Optionally, described second solution is formulated with phosphoric acid solution by potassium permanganate solution, and potassium permanganate is molten The volume of liquid is 5~10 times of the volume of phosphoric acid solution.
Optionally, the concentration of described potassium permanganate solution is 0.1g/ml-2g/ml.
Optionally, the etch period of described second step etching is 10s-60s.
Optionally, before carrying out first step etching, form the photoetching of patterning at described semiconductor substrate surface Glue.
Optionally, first step etching, the table of described Semiconductor substrate are carried out with the non-mask of photoresist of patterning Face forms groove after the first step etches.
Optionally, after carrying out second step etching, use acetone, ethanol and the mixed solution of deionized water Remove the photoresist of described patterning.
Optionally, described Semiconductor substrate is silicon substrate.
Optionally, when described first step etching and second step etch, the temperature of etching solution maintains 0 DEG C-30 DEG C Between.
The lithographic method of the present invention, after described Semiconductor substrate is carried out first step etching, Semiconductor substrate The flatness on surface increase, then use the mixed solution row second step etching of potassium permanganate and phosphoric acid, can To be effectively improved the rough structure formed after first step etching, thus improve semiconductor substrate surface Flatness.
Accompanying drawing explanation
Fig. 1 is the flow chart of lithographic method of the present invention;
Fig. 2-Fig. 4 is the profile of the semiconductor structure that each step is corresponding in lithographic method one embodiment of the present invention;
Fig. 5 is the surface height map of the groove formed in one embodiment of the invention;
Fig. 6 be another embodiment of the present invention performs etching during semiconductor substrate surface roughness curve.
Detailed description of the invention
Below in conjunction with schematic diagram, the lithographic method of the present invention is described in more detail, which show this The preferred embodiment of invention, it should be appreciated that those skilled in the art can revise invention described herein, and Still the advantageous effects of the present invention is realized.Therefore, description below is appreciated that for people in the art Member's is widely known, and is not intended as limitation of the present invention.
The core concept of the present invention is, first Semiconductor substrate carries out first step etching, and the first step etches The groove formed afterwards can obtain the most vertical wide ratio, owing in first step etching process, hydrogen peroxide easily divides Solve so that the surface irregularity of etching.Then phosphoric acid and potassium permanganate and mixed solution is used to carry out second step Etching, owing to phosphoric acid etching has good anisotropy, potassium permanganate has stronger oxidisability, and Phosphoric acid does not reacts with potassium permanganate, so that after second step etching, the uniformity on the surface of etching obtains Good improvement, keep the preferably vertical width ratio of groove simultaneously.
Shown in flow chart reference Fig. 1 of the lithographic method of the present invention, and below in conjunction with-6 pairs of lithographic methods of Fig. 2 Each step be specifically described.
With reference to shown in Fig. 2, perform step S1, it is provided that Semiconductor substrate 10, in described Semiconductor substrate 10 Upper spin coating photoresist, and through overexposure, develop, the step such as drying, form the photoresist 20 of patterning.Institute Stating Semiconductor substrate 10 is silicon substrate, and, described Semiconductor substrate 10 can include that shallow trench is isolated The structures such as structure (STI), source electrode, drain electrode, are not shown specifically in figure, and this is that those skilled in the art may be used With understand, do not repeat at this.
With reference to shown in Fig. 3, perform step S2, with acid solution, hydrogenperoxide steam generator, deionized water by certain Volume ratio mixed preparing the first solution, in described first solution, the shared volume of acid is 1/20~1/2, described first In solution, volume shared by hydrogen peroxide is 1/20~2/5.Wherein, acid solution can use phosphoric acid solution, sulphuric acid molten The acid solution such as liquid, hydrofluoric acid solution.The present embodiment illustrates as a example by phosphoric acid solution, phosphoric acid solution, Hydrogenperoxide steam generator, the volume ratio of deionized water can be 1: 1.5: 10.In preferred version, by the first of preparation Solution stands five to ten days under light protected environment, there may be the impurity such as complex due to bottom solution, therefore, The middle level solution taking the first solution carries out first step etching to described Semiconductor substrate 10, with the photoetching of patterning The non-mask of glue carries out first step etching, and the time carrying out the first etching is 500s-1500s.
Fig. 3 show the schematic diagram of perfect condition lower groove 30, and in first step etching process, hydrogen peroxide will Silicon substrate is oxidized to silicon oxide, silicon oxide and acid reaction, thus forms groove 30.In actual growth, entering In row first step etching process, due to the characteristic unstable, labile of hydrogen peroxide, in catabolic process Produce bubble, so that the surface of groove 30 and sidewall out-of-flatness after first step etching, formed in Fig. 3 Shown rough structure, have impact on the uniformity of groove 30 surface and sidewall.
With reference to shown in Fig. 4, perform step S3, use the second solution prepared in advance that described quasiconductor is served as a contrast The end 10, carries out second step etching, and the second solution is the mixed solution of phosphoric acid solution, potassium permanganate solution.
In the present embodiment, the preparation steps of the second solution includes: first, prepares potassium permanganate solution, described The concentration of potassium permanganate solution is 0.1g/ml-2g/ml, such as, by 100ml deionized water and 1.5g permanganic acid The proportions potassium permanganate solution of potassium, puts into potassium permanganate solution in Ultrasound Instrument in process for preparation and surpasses Sound so that potassium permanganate is substantially dissolved in deionized water, and ultrasonic time such as may be controlled to 20min-30min;Afterwards, potassium permanganate solution is stood five to ten days, takes its upper solution and again surpass Sound also stands five to ten days again;Finally, take again stand after potassium permanganate solution upper solution with Phosphoric acid solution is configured to the second solution according to a certain volume, and the volume of potassium permanganate solution is the body of phosphoric acid solution Long-pending five to ten times, it is preferred that potassium permanganate solution is 10: 1 with the volume ratio of phosphoric acid solution, mixing same The ultrasonic solution mix homogeneously that makes of Shi Jinhang, thus obtain the second solution.Carry out ultrasonic, stand so that molten Liquid is more uniform, and takes the clear liquid in solution.
In the present embodiment, after carrying out first step etching, carrying out second step etching immediately, second step etches Time be 10s-60s.Further, after having carried out second step etching, use deionized water to described quasiconductor Substrate 10 is rinsed, and is cleaned by the etching solution remained in groove 30.It should be noted that entering In row second step etching process, potassium permanganate has strong oxidizing property, and silica in silicon substrate is turned to by potassium permanganate Silicon oxide, phosphoric acid and silicon oxide react generation soluble substance, thus complete second step etching, so that second After step etching, the surface of groove 30 and the flatness of sidewall are well improved, thus improve groove Surface uniformity, and, the vertical wide ratio of groove 30 can well be kept.Additionally, through second After etching, the width of groove 30 and the degree of depth have and can increased, and its numerical value increased depends on second step The time of etching.Certainly, in the present invention, it is also possible to improved by the time of increase second step etching and partly lead The roughness of body substrate surface, but, due to the anisotropy of phosphoric acid with the mixed solution etching of potassium permanganate Bad, thus, the time increasing second step etching can reduce the vertical wide ratio of groove 30.
In second solution, phosphoric acid does not reacts with potassium permanganate, potassium permanganate as strong oxidizer, and phosphoric acid with The oxide of the Semiconductor substrate after oxidation reacts, thus performs etching Semiconductor substrate.
Carrying out in first step etching and second step etching process, it is 0 DEG C-30 DEG C that the temperature of etching solution maintains Between.Preferably, carrying out first step etching and second step etches in the environment of mixture of ice and water, frozen water mixes The temperature stabilization of compound is 0 DEG C, makes etch rate relatively low and more stable under this temperature environment, so that carve The condition of erosion is relatively stable.
Preferably, after second step has etched, acetone, ethanol, the mixed solution of deionized water is used to incite somebody to action The photoresist 20 of the patterning on Semiconductor substrate 10 surface is removed.Now, after lithographic method has etched The surface height map of the Semiconductor substrate that employing step instrument is measured is with reference to shown in Fig. 5, i.e. Fig. 5 represents formation The relation of the subregional height and the width in scan line top of step instrument in the profile of step, the most about Being the surface that part is Semiconductor substrate of 0, height is the groove of the part of-3500, it can be seen that Relatively sharp-pointed, the vertical width of the sidewall of the groove 30 of etching is bigger, and, the flatness in groove 30 is preferable.
Additionally, in another embodiment of the present invention, lithographic method is used for etch semiconductor substrates 10 surface, i.e. Do not form photoresist on the surface of Semiconductor substrate, etch the surface of whole Semiconductor substrate, and be formed without ditch Groove.Such as, take the Semiconductor substrate 10 of the 1cm × 1cm of well cutting, use above-mentioned identical method to etch institute State Semiconductor substrate 10, first carry out first step etching, then carry out second step etching.And in etching process The roughness on Semiconductor substrate 10 surface measured by the instruments such as middle employing step instrument.It should be noted that for table Levy the smooth degree on surface, need to introduce this concept of surface roughness.Surface roughness be used to characterize by All kinds of defects present on material surface atomic layer and the microcosmos geometric shape error that causes, be usually expressed as meat Micro-spike and nick that the nondescript spacing of eye is minimum are cheated.Surface roughness is the least, and surface is the most smooth.Mesh Front quantization surface roughness is most commonly used that profile arithmetic average error (Ra), profile offset distance (Y) refer to Point on measured zone Internal periphery is to the distance at datum line, the expression that profile arithmetic average error can approximate For:Wherein, YiFor the profile offset distance that every bit is corresponding.With reference to shown in Fig. 6, carry out first Before step etching, the surface roughness of Semiconductor substrate 10 isAfter the first step etches, half The roughness on the surface of conductor substrate 10 is greatly increased, forAnd after carrying out second step etching, half The surface roughness of conductor substrate 10 isThrough the lithographic method of the present invention, the flatness on surface obtains To improving.It should be noted that owing to, in etching process, the environment of etching maintains 0 DEG C, it may be assumed that etching The temperature of solution is maintained at 0 DEG C, thus etching speed is held essentially constant.But, inventor is sent out by experiment Bright discovery, with reference to shown in Fig. 6, etch in first step etching process (0-800s) is constantly carried out, and brings The effect of surface irregularity first rapidly increases to a certain value, is slowly increased afterwards.Same, second step etches The flatness on process (after 800s) surface first quickly falls to a certain value, the most slowly reduces, so that The flatness obtaining surface is improved.
In sum, the lithographic method of the present invention, use the mixed solution of phosphoric acid and potassium permanganate to perform etching, The vertical wide ratio of the groove after both can having kept etching, it is also possible to after making groove or Semiconductor substrate etching The flatness on surface improved.
Obviously, those skilled in the art can carry out various change and modification without deviating from this to the present invention Bright spirit and scope.So, if the present invention these amendment and modification belong to the claims in the present invention and Within the scope of its equivalent technologies, then the present invention is also intended to comprise these change and modification.

Claims (12)

1. a lithographic method, it is characterised in that including:
Semiconductor substrate is provided;
Using the first solution that described Semiconductor substrate carries out first step etching, described first solution includes acid And hydrogen peroxide;And
Using the second solution that described Semiconductor substrate carries out second step etching, described second solution includes phosphorus Acid and potassium permanganate.
2. lithographic method as claimed in claim 1, it is characterised in that described acid is phosphoric acid, sulphuric acid or hydrogen Fluoric acid.
3. lithographic method as claimed in claim 1, it is characterised in that in described first solution shared by acid Volume is 1/20~1/2, and in described first solution, volume shared by hydrogen peroxide is 1/20~2/5.
4. lithographic method as claimed in claim 1, it is characterised in that during the etching that the described first step etches Between be 500s-1500s.
5. lithographic method as claimed in claim 1, it is characterised in that described second solution is by potassium permanganate Solution is formulated with phosphoric acid solution, and the volume of potassium permanganate solution is 5~10 times of the volume of phosphoric acid solution.
6. lithographic method as claimed in claim 5, it is characterised in that the concentration of described potassium permanganate solution For 0.1g/ml-2g/ml.
7. lithographic method as claimed in claim 1, it is characterised in that during the etching that described second step etches Between be 10s-60s.
8. lithographic method as claimed in claim 1, it is characterised in that before carrying out first step etching, Described semiconductor substrate surface forms the photoresist of patterning.
9. lithographic method as claimed in claim 8, it is characterised in that with the non-mask of photoresist of patterning Carrying out first step etching, the surface of described Semiconductor substrate forms groove after the first step etches.
10. lithographic method as claimed in claim 8, it is characterised in that after carrying out second step etching, adopt The photoresist of described patterning is removed with the mixed solution of acetone, ethanol and deionized water.
11. lithographic methods as described in any one in claim 1-10, it is characterised in that described quasiconductor Substrate is silicon substrate.
12. lithographic methods as described in any one in claim 1-10, it is characterised in that the described first step When etching and second step etch, the temperature of etching solution maintains between 0 DEG C-30 DEG C.
CN201510325500.7A 2015-06-13 2015-06-13 Lithographic method Pending CN106252221A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108040435A (en) * 2017-12-12 2018-05-15 北京科技大学 A kind of aluminum nitride ceramic substrate circuit lithographic method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4294651A (en) * 1979-05-18 1981-10-13 Fujitsu Limited Method of surface-treating semiconductor substrate
US20060292821A1 (en) * 2003-09-09 2006-12-28 Csg Solar Ag Method of etching silicon
CN103454703A (en) * 2013-09-12 2013-12-18 长春理工大学 Method of manufacturing GaAs micro lens in wet etching method
CN103531458A (en) * 2013-09-09 2014-01-22 长春理工大学 Method for carrying out wet etching on GaAs-based material by utilizing two-step method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4294651A (en) * 1979-05-18 1981-10-13 Fujitsu Limited Method of surface-treating semiconductor substrate
US20060292821A1 (en) * 2003-09-09 2006-12-28 Csg Solar Ag Method of etching silicon
CN103531458A (en) * 2013-09-09 2014-01-22 长春理工大学 Method for carrying out wet etching on GaAs-based material by utilizing two-step method
CN103454703A (en) * 2013-09-12 2013-12-18 长春理工大学 Method of manufacturing GaAs micro lens in wet etching method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108040435A (en) * 2017-12-12 2018-05-15 北京科技大学 A kind of aluminum nitride ceramic substrate circuit lithographic method

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