CN106226967B - Array substrate, display panel and manufacturing method - Google Patents
Array substrate, display panel and manufacturing method Download PDFInfo
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- CN106226967B CN106226967B CN201610838862.0A CN201610838862A CN106226967B CN 106226967 B CN106226967 B CN 106226967B CN 201610838862 A CN201610838862 A CN 201610838862A CN 106226967 B CN106226967 B CN 106226967B
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- data line
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- array substrate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
Abstract
The invention provides an array substrate, a display panel and a manufacturing method, which are used for avoiding the problem of different brightness of pixel units caused by different input voltages of each pixel unit and improving the yield. The array substrate includes: a substrate, a data line and a grid line positioned on the substrate, and a pixel area formed by crossing the data line and the grid line; wherein the resistance of the data line gradually decreases along the transmission direction of the data signal.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a manufacturing method.
Background
A schematic structural diagram of an array substrate in a current liquid crystal display (Liquid Crystal Display, LCD) is shown in fig. 1, and the array substrate includes: the gate line 110, the data line 120, and the pixel region 130, wherein the pixel region 130 includes: a plurality of pixel units.
In the ideal case, i.e., the impedance (Rc Delay) of the data line 120 is zero, the input voltages of the plurality of pixel cells in the pixel region 130 are all the same, i.e., as shown in fig. 2 a. However, the experimental data indicate that the input voltage of the pixel unit in the pixel region 130 decreases along the transmission direction of the data signal, as shown in fig. 2 b. The larger the impedance of the data line, the larger the loss of the data signal, and the different input voltages of each pixel unit, the different brightness of the pixel units, so that the display effect of the display is seriously affected.
In summary, the display manufactured by the prior art has different brightness of the pixel units due to different input voltage of each pixel unit, so that the display effect of the display is seriously affected.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a display panel and a manufacturing method, which are used for avoiding the problem of different brightness of pixel units caused by different input voltages of each pixel unit and improving the yield.
The array substrate provided by the embodiment of the invention comprises the following components: a substrate, a data line and a grid line positioned on the substrate, and a pixel area formed by crossing the data line and the grid line; wherein the resistance of the data line gradually decreases along the transmission direction of the data signal.
According to the embodiment of the invention, the resistance of the data line is gradually reduced along the transmission direction of the data signal, so that the problem of different brightness of the pixel units due to different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the resistance of the data line gradually decreases along the transmission direction of the data signal, including:
the cross-sectional area of the data line gradually increases along the transmission direction of the data signal.
According to the embodiment of the invention, the line width of the data line is gradually increased along the transmission direction of the data signal, namely, the non-uniform width design is realized, so that the resistance of the data line is gradually reduced along the transmission direction of the data signal, the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the data line is projected to be trapezoid on the first plane; the first plane is parallel to the plane where the substrate is located.
According to the embodiment of the invention, the data line is projected to be trapezoid on the first plane, namely, the line width on the first plane is linearly increased along the transmission direction of the data signal, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the data line is projected to be trapezoid on the second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
According to the embodiment of the invention, the data line is projected to be trapezoid on the second plane, namely, the line width on the second plane is linearly increased along the transmission direction of the data signal, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the material of the data line includes: and a plurality of conductive materials having different resistance values, wherein the resistivity of the material of the data line gradually decreases along the transmission direction of the data signal.
The display panel provided by the embodiment of the invention comprises: the array substrate is provided with a driving module for inputting data signals to the array substrate; the output end of the data signal of the driving module is connected with the input end of the data line in the array substrate.
According to the embodiment of the invention, the resistance of the data line is gradually reduced along the transmission direction of the data signal, so that the problem of different brightness of the pixel units due to different input voltages of each pixel unit is avoided, and the yield is improved.
The manufacturing method of the array substrate provided by the embodiment of the invention comprises the following steps:
forming a gate line on a substrate by a patterning process;
and forming a data line on the formed gate line through a patterning process, wherein the resistance of the data line gradually decreases along the transmission direction of the data signal.
According to the embodiment of the invention, the resistance of the data line is gradually reduced along the transmission direction of the data signal, so that the problem of different brightness of the pixel units due to different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the resistance of the data line gradually decreases along the transmission direction of the driving signal, including:
the cross-sectional area of the data line gradually increases along the transmission direction of the data signal.
According to the embodiment of the invention, the line width of the data line is gradually increased along the transmission direction of the data signal, namely, the non-uniform width design is realized, so that the resistance of the data line is gradually reduced along the transmission direction of the data signal, the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, a first graph obtained by projection of the data line on a first plane is trapezoid; the first plane is parallel to the plane where the substrate is located.
According to the embodiment of the invention, the data line is projected to be trapezoid on the first plane, namely, the line width on the first plane is linearly increased along the transmission direction of the data signal, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the second graph obtained by projecting the data line on the second plane is trapezoid; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
According to the embodiment of the invention, the data line is projected to be trapezoid on the second plane, namely, the line width on the second plane is linearly increased along the transmission direction of the data signal, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Preferably, the material of the data line includes: and a plurality of conductive materials having different resistance values, wherein the resistivity of the material of the data line gradually decreases along the transmission direction of the data signal.
Drawings
Fig. 1 is a schematic structural diagram of an array substrate provided in the prior art;
FIG. 2a is a schematic diagram of input voltages of a pixel unit according to the prior art under ideal conditions;
FIG. 2b is a schematic diagram of the input voltage of a pixel unit according to the prior art in an actual state;
fig. 3a is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 3b is a schematic diagram of a projection pattern of a data line in an array substrate on a first plane according to an embodiment of the present invention;
fig. 3c is a schematic diagram of a projection pattern of a data line in an array substrate on a second plane according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 5 is a flow chart of a method for manufacturing an array substrate according to an embodiment of the present invention.
Detailed Description
The embodiment of the invention provides an array substrate, a display panel and a manufacturing method, which are used for avoiding the problem of different brightness of pixel units caused by different input voltages of each pixel unit and improving the yield.
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 3a, an embodiment of the present invention provides an array substrate, including: a substrate, a data line 310 and a gate line 110 on the substrate, and a pixel region 130 formed by crossing the data line 310 and the gate line 110; wherein the resistance of the data line gradually decreases along the transmission direction of the data signal.
To achieve the gradual decrease of the impedance along the transmission direction of the data signal, the line width of the data line 310 in the embodiment of the present invention gradually increases from the transmission direction of the data signal, i.e., from the signal input end 320 to the other end 330.
In the embodiment of the invention, the data lines are designed into the data lines with unequal widths, namely, the line widths of the data lines are gradually increased along the transmission direction of the data signals, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
In particular, referring to fig. 3b, the data line 310 is projected as a trapezoid on a first plane; the first plane is parallel to the plane where the substrate is located. The width m of the data line 310 in the first plane linearly increases along the transmission direction of the data signal. Specifically, the linear correlation coefficient of the increase in the width m of the data line 310 in the first plane is the upper bottom e or the lower bottom f of the first pattern.
In the embodiment of the present invention, for the projection of the data line 310 on the first plane, the line width of the data line 310 is gradually increased from the signal input end 320 to the other end 330, so that the impedance of the data line 310 is correspondingly reduced along the direction, and the loss of the data signal is correspondingly reduced, thus improving the uniformity of the brightness value of the pixel units, avoiding the problem of different brightness of the pixel units caused by different input voltages of each pixel unit, and improving the yield of the array substrate.
The embodiment of the invention provides a sectional view of the array substrate along A-A', referring to fig. 3c, the data line 310 is projected to be a trapezoid on the second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line. The width n of the data line 310 in the second plane linearly increases along the transmission direction of the data signal. Specifically, the linear correlation coefficient of the increase of the width n of the data line 310 in the first plane is the upper bottom g or the lower bottom j of the second pattern.
In the embodiment of the present invention, for the projection of the data line 310 on the second plane, the line width of the data line 310 is gradually increased from the signal input end 320 to the other end 330, so that the impedance of the data line 310 is correspondingly reduced along the direction, and the loss of the driving signal is correspondingly reduced, thus improving the uniformity of the brightness value of the pixel units, avoiding the problem of different brightness of the pixel units caused by different input voltages of each pixel unit, and improving the yield of the array substrate.
The material of the data line in the embodiment of the invention comprises the following components: and a plurality of conductive materials having different resistance values, wherein the resistivity of the material of the data line gradually decreases along the transmission direction of the data signal.
Referring to fig. 4, a display panel provided in an embodiment of the present invention includes: the above-mentioned array substrate 410 and the driving module 420 for inputting data signals to the array substrate; the output end of the data signal of the driving module 420 is connected to the input end of the data line 310 in the array substrate 410.
According to the embodiment of the invention, the resistance of the data line is gradually reduced along the transmission direction of the data signal, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Referring to fig. 5, a method for manufacturing an array substrate according to an embodiment of the present invention includes:
s501, forming a grid line on a substrate through a composition process;
s502, forming a data line on the formed grid line through a composition process, wherein the resistance of the data line gradually decreases along the transmission direction of a data signal.
According to the embodiment of the invention, the resistance of the data line is gradually reduced along the transmission direction of the data signal, so that the problem of different brightness of the pixel units caused by different input voltages of each pixel unit is avoided, and the yield is improved.
Specifically, the resistance of the data line gradually decreases along the transmission direction of the data signal, including:
the cross-sectional area of the data line gradually increases along the transmission direction of the data signal.
Specifically, the data line is projected to be trapezoid on a first plane; the first plane is parallel to the plane where the substrate is located.
Specifically, the data line is projected to be trapezoid on a second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
Specifically, the material of the data line includes: and a plurality of conductive materials having different resistance values, wherein the resistivity of the material of the data line gradually decreases along the transmission direction of the data signal.
In summary, the embodiments of the present invention provide an array substrate, a display panel and a manufacturing method, which are used for designing data lines with unequal widths, that is, the line widths of the data lines are gradually increased along the transmission direction of the data signals, or the data lines may be made of materials with different resistance values, that is, the resistivity of the materials forming the data lines is gradually reduced along the transmission direction of the data signals, so that the resistance of the data lines is gradually reduced along the transmission direction of the data signals, thereby avoiding the problem of different brightness of the pixel units caused by different input voltages of each pixel unit, and improving the yield.
It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, magnetic disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (13)
1. An array substrate, characterized by comprising: a substrate, a data line and a grid line positioned on the substrate, and a pixel area formed by crossing the data line and the grid line; the resistance of the data line gradually decreases along the transmission direction of the data signal in the data line.
2. The array substrate of claim 1, wherein the resistance of the data line gradually decreases along the transmission direction of the data signal, comprising:
the cross-sectional area of the data line gradually increases along the transmission direction of the data signal.
3. The array substrate of claim 2, wherein the data lines are projected as trapezoids on a first plane; wherein the first plane is parallel to the plane of the substrate.
4. The array substrate of claim 2, wherein the data lines are projected as trapezoids on a second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
5. The array substrate of claim 3, wherein the data lines are projected as trapezoids on a second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
6. The array substrate of any one of claims 1-5, wherein the material of the data line comprises: and a plurality of conductive materials having different resistance values, wherein the resistivity of the material of the data line gradually decreases along the transmission direction of the data signal.
7. A display panel, comprising: the array substrate of any one of claims 1 to 6, a driving module for inputting a data signal to the array substrate; the output end of the data signal of the driving module is connected with the input end of the data line in the array substrate.
8. The manufacturing method of the array substrate is characterized by comprising the following steps of:
forming a gate line on a substrate by a patterning process;
and forming a data line on the formed gate line through a patterning process, wherein the resistance of the data line gradually decreases along the transmission direction of the data signal.
9. The method of claim 8, wherein the resistance of the data line gradually decreases along the transmission direction of the data signal, comprising:
the cross-sectional area of the data line gradually increases along the transmission direction of the data signal.
10. The method of claim 9, wherein the data line is projected as a trapezoid on the first plane; the first plane is parallel to the plane where the substrate is located.
11. The method of claim 9, wherein the data line is projected as a trapezoid on the second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
12. The method of claim 10, wherein the data line is projected as a trapezoid on the second plane; the second plane is perpendicular to the plane of the substrate base plate and parallel to the data line.
13. The method of any one of claims 8-12, wherein the material of the data line comprises: and a plurality of conductive materials having different resistance values, wherein the resistivity of the material of the data line gradually decreases along the transmission direction of the data signal.
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| CN201610838862.0A CN106226967B (en) | 2016-09-21 | 2016-09-21 | Array substrate, display panel and manufacturing method |
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| CN106783890A (en) * | 2017-02-07 | 2017-05-31 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof, display device |
| CN106681077B (en) * | 2017-03-29 | 2019-08-02 | 上海中航光电子有限公司 | Display panel and display device |
| WO2018191958A1 (en) * | 2017-04-21 | 2018-10-25 | 深圳市柔宇科技有限公司 | Tft array substrate, display panel and display device |
| CN107799537A (en) * | 2017-09-26 | 2018-03-13 | 武汉华星光电技术有限公司 | Array base palte and display device |
| CN112530344A (en) * | 2020-12-01 | 2021-03-19 | Tcl华星光电技术有限公司 | Display panel and driving method thereof |
| CN113325629A (en) * | 2021-05-28 | 2021-08-31 | Tcl华星光电技术有限公司 | Backlight module, display module and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2008064780A (en) * | 2006-09-04 | 2008-03-21 | Funai Electric Co Ltd | Flat panel display and printed wiring board |
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| JP2006293343A (en) * | 2005-03-17 | 2006-10-26 | Hitachi Displays Ltd | Liquid crystal display device and display device |
| CN203324620U (en) * | 2013-07-25 | 2013-12-04 | 合肥京东方光电科技有限公司 | Array substrate and liquid crystal display device |
| CN104503171B (en) * | 2014-12-19 | 2017-06-06 | 深圳市华星光电技术有限公司 | A kind of liquid crystal display panel |
| CN105137632B (en) * | 2015-09-08 | 2017-07-04 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN105487314A (en) * | 2016-01-07 | 2016-04-13 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN105572997A (en) * | 2016-02-26 | 2016-05-11 | 武汉华星光电技术有限公司 | Display panel and signal wires thereof |
| CN206115110U (en) * | 2016-09-21 | 2017-04-19 | 合肥京东方光电科技有限公司 | Array substrate , display panel |
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| JP2008064780A (en) * | 2006-09-04 | 2008-03-21 | Funai Electric Co Ltd | Flat panel display and printed wiring board |
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