CN1062099C

CN1062099C - Segment synchronizing detection method in digital communication

Info

Publication number: CN1062099C
Application number: CN98117126A
Authority: CN
Inventors: 邹志永; 王匡; 谢磊; 张朝阳
Original assignee: Hi-Tech Research & Development Center State Science & Technology Commission
Current assignee: Hi-Tech Research & Development Center State Science & Technology Commission
Priority date: 1998-08-04
Filing date: 1998-08-04
Publication date: 2001-02-14
Anticipated expiration: 2018-08-04
Also published as: CN1211122A

Abstract

The present invention relates to a segment synchronization detecting method in digital communication. A concatenation buffer pool is set for recording the position of segment synchronization so as to replace a commonly used FIFO (FIFO memory). The method of the present invention can ensure a high correctness rate of detection, and the aim of resource saving can be reached under the precondition that control complexity is not increased basically.

Description

Segment synchronizing detection method in the digital communication

The present invention relates to the segment synchronizing detection method in a kind of digital communication.

Be everlasting in the digital communication to send in the message digit sequence and periodically add specific sequence (section of being referred to as synchronizing sequence), from baseband signal, detect step sequence on these sections at receiving terminal, and the synchronous and section of utilization information realization symbol clock wherein is synchronous, and this is a precondition of correctly recovering transmission information.As the symbol at Major Leagues' scheme stage casing synchronizing sequence of U.S.'s high definition TV (HDTV) is (+5 ,-5 ,-5 ,+5), and is to repeat in the cycle with 832.Because in information sequence, also may occur and the synchronous the same sequence of section, so when detecting satisfactory symbol pattern, must check also whether it is to be to repeat in the cycle with the section.

In traditional method, adopt:

(1) length being set is segment length, and width is the push-up storage (FIFO) of A/D sampling bits number, so just needs segment length to take advantage of several memory cell of A/D bit at least, and consumption of natural resource is too many.In Major Leagues' scheme, need 832 ^*8=6656Bit.

(2) whether the section of being is synchronous to judge the symbol sebolic addressing that receives earlier, deposits judged result " 1 " or " 0 " in push-up storage (FIFO) again, so only need a segment length memory cell, but general segment length is bigger, so also compare consumption of natural resource.In Major Leagues' scheme, need 832Bit.

For overcoming above-mentioned shortcoming, the purpose of this invention is to provide a kind of the assurance under the very high detection accuracy, can farthest save the segment synchronizing detection method in the digital communication of resource.

According to purpose of the present invention, the segment synchronizing detection method in a kind of digital communication, the method comprising the steps of is:

Symbol of every reception adds one with counter, and it is synchronous to judge whether to receive a section simultaneously, and with the count value in the count value and the Buffer Pool first order relatively:

A: the section of confiscating is synchronous and more unequal, does not then do any operation;

B: receive that a section is synchronous and more unequal, then count value is stored into the tail of the queue of the section isochronous queue in the Buffer Pool, and with corresponding identification position 1;

C: but more equal, the head of the queue that shows the section isochronous queue in the Buffer Pool is not that the section of vacation is synchronous to the section of not detecting, as long as formation is shifted forward once synchronously;

D: the section of detecting synchronously and more equal, then the section of showing sync interval segment length repeat, just can adopt the confidence level counter to carry out the forward direction protection, up to be sure oing that the section of finding is synchronously.

This method specifically adopts: described counter, its width (is satisfied 2 for the counting width ^{The counting width}The smallest positive integral of 〉=segment length), this counter is that count pulse is counted (0---segment length-1) with the symbol clock, when the value record that detects possible section counter that it is corresponding synchronously the time gets off.

Described cascade Buffer Pool progression is K (error of K during according to the length of section and section synchronous detecting allows thresholding to decide), the width that every grade of buffer cell width is a counter adds one, wherein last as sign position (Flag) be used for identifying this count value whether a corresponding possible section synchronously, the count value of other stored symbols counter (section counting).

The present invention has following advantage compared with prior art:

Because the synchronous probability of symbol sebolic addressing section of being is very little, so the section in one section symbol sebolic addressing synchronously (comprising genuine and false) number also seldom, as long as these sections synchronization position information is noted, just can replace push-up storage (FIFO) fully on the function so.Therefore this method can guarantee very high detection accuracy, and can at utmost save resource.

Above-mentioned purpose of the present invention and other advantage will become more clear in reference accompanying drawing detailed description of the preferred embodiment, wherein:

Fig. 1 is the Buffer Pool structural representation that the present invention adopts;

Fig. 2 is the flow chart of segment synchronizing detection method of the present invention;

With reference to Fig. 1, Fig. 1 is the structure chart of Buffer Pool.For realizing section synchronous detecting of the present invention, a counter is set, (the counting width is for satisfying 2 for the counting width for its width ^{The counting width}〉=segment length-1), this counter is that count pulse is counted (0-segment length-1) with the symbol hour hands, and when detecting a possible section synchronously the time, the count value that it is corresponding is noted.A progression be set be the cascade Buffer Pool of K (error of K during according to the length of section and section synchronous detecting allows thresholding to decide).Each grade buffer cell width is that the width of counter adds one, wherein last as sign position (Flag) be used for identifying this count value whether a corresponding possible section synchronously, the count value of the symbol counter of other storage.

The probability that occurs m pseudo-section synchronous (the synchronous meter in addition of real section) in a section is

C ^m _x ^*(1-P) ^x-m ^*(P) ^m *

Wherein x is a segment length, the detection probability that the P section of being is synchronous, and following formula hypothesis section all might occur at each symbol synchronously, and then, a m pseudo-section synchronous probability occurring in one section can be not littler, the more synchronous detection of the section of helping as.Like this as long as get suitable K value according to (*) formula, just can make and occur in the section equaling or very little more than the synchronous probability of K pseudo-section, it is very little promptly to detect error probability, again as long as can recover automatically after guaranteeing to make mistakes, the present invention just can replace using the system of push-up storage (FIFO) fully on function so, but it is as long as K multiply by the individual memory cell of counter widths (K* counts width).

Segment synchronizing detection method of the present invention is illustrated in conjunction with HDTV Major Leagues scheme.By being (+5 ,-5 ,-5 ,+5), and be to repeat in the cycle with 832 at the synchronous symbol in the Major Leagues scheme stage casing of HDTV.It is the K cascade Buffer Pool of (K is for being about 10) that a length is set.Every grade of buffer cell width is 11, the count value of wherein preceding 10 stored symbols counters, and last conduct sign position (Flag) is used for identifying this count value, and whether a corresponding possible section is synchronous.If symbol section of being judged to is synchronous+5 probability is P, being judged to-5 probability is q, and four then continuous symbol sections of being judged to are p for the probability in step ²q ²Section synchronous follow-up (5 ,-5 ,+5, x), (5 ,+5, x, x) certainly can the section of being not synchronous, think that for simplifying to calculate the synchronous appearance of pseudo-section is independent equiprobable fully, the position that false section synchronous head then may occur has only 826.

C ^m ₈₂₆ ^*(1-p ²q ²) ^826-m ^*(p ²q ²) ^m **

Synchronous the 1st and the 4th sampling of section is very little along with phase difference changes, and the 2nd and the 3rd sampling changes very greatly with phase difference, thus can be judged as+5 error threshold is established smallerly, and will be judged as bigger that-5 error threshold establishes.Consider+5 be subjected to the interference of pseudo-random data big, can be provided with+5 thresholding is (3.0～6.1) ,-5 thresholding is (2.1～-7.3).Four then adjacent synchronous probability of the symbol section of being judged to are about 0.00396.K might as well get 10, has so only used the memory cell of 110Bit.In that also the section of finding is synchronous, and two sections just may lose a real section synchronously when pseudo-section is synchronously more than 9 synchronously, and utilization (* *) formula can calculate its probability less than 0.002.Pseudo-section is had no effect especially to performance synchronously after the section of finding is synchronous.Two pseudo-sections are 1.57*10 at a distance of the probability of 832 symbols synchronously just ^-5Even the therefrom recovery that such mistake also can be very fast takes place.Descend rapidly when the error threshold of judging obtains the probability that (in fact data also can reduce bit synchronous influence) pseudo-section occurs synchronously when smaller again, error probability also just descends rapidly.If to may once judging for the absolute value sum of four synchronous symbols of section, the probability that pseudo-section occurs synchronously descends greatly again, and can get littler K value this moment, also with regard to resource-saving more.If error threshold is constant, strengthens the K value error probability is descended rapidly.The d type flip flop that Buffer Pool can adopt band to enable when hardware is realized, its concrete structure as shown in Figure 1.

The course of work of Buffer Pool is as follows: when symbol sebolic addressing is may the section of being synchronous through judging (Sync=1), enable K level (being afterbody), current count value (section count value, note by abridging be Sc) is deposited in the Sc[K of K level buffer cell], and with its sign position Flag[K] be changed to " 1 ".

At different levels enables

Enable[1]=!Flag[1]&Flag[2]

Enable[i]=! Flag[i] ﹠amp; Flag[i+1] #! Flag[i-1] ﹠amp; Flag[i] (i is 2 to k-1)

Enable[k]=Sync#!Flag[k-1]&Flag[k]

Sign position at different levels

Flag[i]=! Flag[i] ﹠amp; Flag[i+1] (its i be 1 to k-1)

Flag[k]=Sync (Sync is the section of detecting indication synchronously)

If the i level is designated like this " 1 ", and the sign position of i-1 level is " 0 ", the sign position that then the i level is moved on to i-1 under the effect of clock is " 0 ".The section that is positioned at cascade Buffer Pool end so synchronously next step step of effect of symbol clock to reach, up to the end of section isochronous queue.

With reference to Fig. 1, the flow chart according to segment synchronizing detection method of the present invention of key diagram 2 is as follows, and its step comprises:

Step 1: each symbol of every reception adds one with counter;

In step 2, it is synchronous to judge whether to receive a section, and with the count value in the count value and the Buffer Pool first order relatively:

A: symbol counter is not equal to Sc[1] and the section of not finding is not synchronous, does not carry out any operation.

B: symbol counter is not equal to Sc[1], but the section of finding is synchronous, then Counter Value is stored into the Sc[K in the Buffer Pool] in, and with Flag[K] ignore.This record will be under the effect of clock the tail of the queue of the section of moving on to isochronous queue progressively.It is step 3.

C: symbol counter equals Sc[1], but the section of finding is synchronous, then with Flag[1] clear one-tenth " 0 ", in subsequent several clocks, a section isochronous queue will move forward one by one.It is step 4.

D: symbol counter equals Sc[1] and the section of finding is synchronously, then thinks and has found real section synchronously, just can adopt the confidence level counter to protect forward, up to be sure oing that the section of finding is synchronous.It is step 5.

After comparison, enter step 6, in this step, check all buffer cells in the Buffer Pool, as there is certain one-level, it be designated 1 and its sign position of previous stage is 0, then buffer cell is moved on to previous stage and is clearly zero the sign position of original position, return step 1.

Claims

1, the segment synchronizing detection method in a kind of digital communication is characterized in that, the method comprising the steps of is: symbol of every reception, and counter adds one; It is synchronous to judge whether to receive a section, and the count value and the Buffer Pool first order are fallen into a trap numeric ratio:

A: the section of receiving is not synchronous and more unequal, does not then do any operation;

B: receive that a section is synchronously more unequal, then count value is stored into the tail of the queue of the section isochronous queue in the Buffer Pool, and with corresponding identification position 1;

2, according to the segment synchronizing detection method of claim 1, it is characterized in that: described counter, its width are counter widths, and wherein counter widths is for satisfying 2 ^{The counting width}The smallest positive integral of 〉=segment length, this counter are that count pulse is counted (0---segment length-1) with the symbol clock, when the value record that detects possible section counter that it is corresponding synchronously the time gets off.

3, according to the segment synchronizing detection method of claim 1, it is characterized in that described cascade Buffer Pool progression is K, the width that every grade of buffer cell width is a counter adds one, wherein last as sign position be used for identifying this count value whether a corresponding possible section synchronously, the count value of other stored symbols counter.