Clock source list update, clock synchronizing method and the system that base station clock synchronizes
Technical field
The present invention relates to wireless communication technology field, the clock source list synchronized more particularly to a kind of base station clock is more
Newly, clock synchronizing method and system.
Background technology
Small cell base station refers in particular to small-sized integrated cellular base station, is the system for the base station type for being different from macrocell base stations at present
Claim, supports number of users and coverage area to be divided into Microcell (microcell base station), Picocell (Pico cell bases according to it
Stand), Femtocell (winged cellular base station) etc., small cell base station have integrated level it is high, it is adaptable, open station quickly, maintenance just
The advantage of profit, is widely used in family, office and public place, can improve user network experience, reduce customer churn
And operator is helped to win the market share.
The extensive use of data service makes indoor communications become the hotly contested spot of mobile operator.Indoor permeability is not only
It is related to ARPU (Ayerage Revenue Per User, per user's average income) value, is more related to sense of the user to network
Degree of knowing, especially current urban construction speed are accelerated, and urban architecture density also continues to increase, signal difference, easy call drop under indoor environment
Or network busy, the higher problem of customer complaint rate are more and more prominent, therefore small cell base station is using more and more extensive.But problem
Thereupon, wherein one of most significant problems are no more than how to ensure small base station reliable and stable keep frequency and time synchronization,
The collaboration of deadline and frequency provide frequency reference, accurate timing, synchronous base and system clock necessary to system.
The method of synchronization used at present has GPS (Global Positioning System, global positioning system))/Big Dipper
It is synchronous, IEEE1588 network clockings are synchronous, the wireless interface method of synchronization or several ways various combination, but due to website
The influence of installation site has that clock source signals are unstable, synchronizing signal is caused to be lost, synchronous abnormality, generates frequency
Deviation, frame head drift seriously affect user experience and KPI (Key the problems such as interference so as to cause frequency interferences, time-slot cross
Performance Indicators, KPI Key Performance Indicator) index.Existing step-out treatment measures be limited by hardware platform or
The restriction of key chip, to all not advanced optimized after clock source step-out, or even simple restarting equipment solves the problems, such as step-out, sternly
Ghost image rings user experience.
Invention content
Based on this, it is necessary to be directed to clock source stability problem, provide a kind of clock source list that base station clock synchronizes more
Newly, clock synchronizing method and system can promote the stability of base station clock source synchronization, promote user experience.
The technical solution adopted in the present invention is as follows:
A kind of clock source list updating method that base station clock synchronizes, includes the following steps:
After detecting target clock source step-out, the step-out number in the target clock source is added one, or detecting
After the synchronizing signal in the target clock source is unstable, the unstable number in the target clock source is added one;
Judge whether the step-out number or the unstable number reach preset punishment threshold value;
If so, carrying out reducing priority processing or delete processing to the target clock source, priority processing is being reduced
Or after delete processing, the preconfigured clock source priority list synchronized for base station clock of update;
Wherein, each clock source in the clock source priority list is arranged according to the priority of each clock source
Sequence.
A kind of base station clock synchronization method, after the clock source list updating method update synchronized based on above-mentioned base station clock
Clock source priority list into row clock synchronize, the method includes the steps:
After the present clock source step-out of base station, next clock source is chosen according to the clock source priority list;
Whether the synchronizing signal for detecting currently selected clock source is stablized;
If unstable, described the step of next clock source is chosen according to the clock source priority list is returned;
If stablizing, synchronized into row clock by currently selected clock source.
A kind of clock source list updating system that base station clock synchronizes, including:
Number adjusts module, for after detecting target clock source step-out, by the step-out number in the target clock source
Add one, or after detecting that the synchronizing signal in the target clock source is unstable, by unstable time of the target clock source
Number plus one;
Judgment module, for judging whether the step-out number or the unstable number reach preset punishment thresholding
Value;
Module is adjusted, is when being, to be reduced to the target clock source for the judging result in the judgment module
Priority processing or delete processing;
Update module, for after the adjustment module reduces priority processing or delete processing, update to be pre-configured with
For base station clock synchronize clock source priority list;
Wherein, each clock source in the clock source priority list is arranged according to the priority of each clock source
Sequence.
A kind of base station clock synchronization system includes the clock source list updating system of base station clock as described above synchronization, also
Including:
Module is chosen, for being after the present clock source step-out of base station, or in the testing result of first detection module
When unstable, next clock source is chosen according to the clock source priority list;
Whether first detection module, the synchronizing signal for detecting currently selected clock source are stablized;
Synchronization module, for the testing result in the first detection module be stablize when, by it is currently selected when
Zhong Yuanjin row clocks synchronize.
It is after detecting target clock source step-out, by the target clock source according to the scheme of aforementioned present invention
Step-out number adds one, or after detecting that the synchronizing signal in the target clock source is unstable, by the target clock source
Unstable number adds one, judges whether the step-out number or the unstable number reach preset punishment threshold value, if
It is that carrying out reduction priority processing to the target clock source, either delete processing is reducing at priority processing or deletion
After reason, the preconfigured clock source priority list synchronized for base station clock of update, wherein the clock source priority row
Each clock source in table is ranked up according to the priority of each clock source, can be steady by synchronizing signal using this scheme
The clock source of the either step-out of qualitative difference often degrade or is deleted from clock source priority list so that is saved in
The clock source of clock source priority list is relative stability compared with strong and less step-out number clock source, and each clock source is according to each
The priority of the clock source is ranked up, and the clock source priority list in the present invention program is same for base station clock source
Step can effectively promote the stability of base station clock source synchronization, promote user experience.
Description of the drawings
Fig. 1 is the implementation process signal for the clock source list updating method that the base station clock of the embodiment of the present invention one synchronizes
Figure;
Fig. 2 is the implementation process signal for the clock source list updating method that the base station clock of the embodiment of the present invention two synchronizes
Figure;
Fig. 3 is the implementation process signal for the clock source list updating method that the base station clock of the embodiment of the present invention three synchronizes
Figure;
Fig. 4 is the implementation process schematic diagram of the base station clock synchronization method of the embodiment of the present invention four;
Fig. 5 is the composed structure signal for the clock source list updating system that the base station clock of the embodiment of the present invention five synchronizes
Figure;
Fig. 6 is the refinement composed structure schematic diagram of judgment module, adjustment module in a specific example in Fig. 5;
Fig. 7 is judgment module, the refinement composed structure schematic diagram of adjustment module in another specific example in Fig. 5;
Fig. 8 is the composed structure schematic diagram of the base station clock synchronization structure of the embodiment of the present invention six.
Specific implementation mode
To make the objectives, technical solutions, and advantages of the present invention more comprehensible, with reference to the accompanying drawings and embodiments, to this
Invention is described in further detail.It should be appreciated that the specific embodiments described herein are only used to explain the present invention,
Do not limit protection scope of the present invention.
The present invention program is to be pre-configured with a clock source priority list, each clock in the clock source priority list
Source is ranked up according to the priority of each clock source.In order to ensure the stability of clock source synchronization, increases step-out and punish machine
System reduces this clock source priority if a certain level clock source step-out number is more than threshold value, or even from the clock
It is deleted in the priority list of source;Synchronizing signal stability difference penalty mechanism can also be increased, if a certain level clock source is same
Step swinging of signal is qualitative, which to be reached, then reduces this clock source priority in some thresholding, or even from the clock source priority list
Middle deletion.The present invention program is described in detail below.
Embodiment one
The embodiment of the present invention one provides a kind of clock source list updating method that base station clock synchronizes.It is shown in Figure 1, be
The implementation process schematic diagram for the clock source list updating method that the base station clock of the embodiment of the present invention one synchronizes.As shown in Figure 1, this
The clock source list updating method that the base station clock of embodiment synchronizes includes the following steps:
Step S101:After detecting target clock source step-out, the step-out number in the target clock source is added one, or
After detecting that the synchronizing signal in the target clock source is unstable, the unstable number in the target clock source is added one;
Here, the target clock source can be any one clock source in clock source priority list;
Specifically, can base station after the power is turned on, detect the target clock source whether step-out, detecting the target clock
After the step-out of source, the step-out number in the target clock source is added one;Either periodically or during re-synchronizing, described in detection
Whether the synchronizing signal in target clock source is stablized, after detecting that the synchronizing signal in the target clock source is unstable, when by target
The unstable number of Zhong Yuan adds one;
Step S102:Judge whether the step-out number or the unstable number reach preset punishment threshold value,
If so, entering step S103;
Wherein, the punishment threshold value corresponding to the step-out number or the unstable number can be different, can also
It is identical;
Step S103:The target clock source is carried out to reduce priority processing or delete processing, is reducing priority
After processing or delete processing, the preconfigured clock source priority list synchronized for base station clock of update;
Wherein, each clock source in the clock source priority list is arranged according to the priority of each clock source
Sequence, the method for synchronization that the clock source priority list is related to include that the GPS/ Big Dippeves are synchronous, IEEE1588 network clockings are synchronous, nothing
The various combination of the line interface method of synchronization or several ways, and several methods of synchronization without being limited thereto;
Here, it reduces priority processing to generally refer to the priority in the target clock source reducing level-one, for example, by 2
Grade is reduced to 3 grades;
Here, the delete processing refers to deleting in the target clock source from the clock source priority list.
In addition, when the judging result of the step S102 is no, the update without the clock source priority list
Process.
Embodiment two
Second embodiment of the present invention provides the clock source list updating methods that a kind of base station clock synchronizes.The present embodiment two and reality
Apply example one the difference is that, the punishment threshold value include the first threshold value and the second threshold value, wherein described first
Limit value is less than second threshold value;Reach first threshold value and not in the step-out number or the unstable number
When reaching second threshold value, reduction priority processing is carried out to the target clock source, reaches institute in the step-out number
When stating the second threshold value, delete processing is carried out to the target clock source.
It is shown in Figure 2, it is the realization of the clock source list updating method of the base station clock synchronization of the embodiment of the present invention two
Flow diagram.As shown in Fig. 2, the clock source list updating method that the base station clock of the present embodiment two synchronizes includes following step
Suddenly:
Step S201:After detecting target clock source step-out, the step-out number in the target clock source is added one, or
After detecting that the synchronizing signal in the target clock source is unstable, the unstable number in the target clock source is added one;
Step S202:Judge whether the step-out number or the unstable number reach first threshold value, if
It is then to enter step S203;
Step S203:Judge whether the step-out number or the unstable number reach second threshold value, if
It is no, then S204 is entered step, if so, entering step S205;
Step S204:Reduction priority processing is carried out to the target clock source;
Step S205:Delete processing is carried out to the target clock source;
Step S206:After reducing priority processing or delete processing, update is preconfigured same for base station clock
The clock source priority list of step, wherein each clock source in the clock source priority list is according to each clock source
Priority is ranked up.
Punishment threshold value corresponding to step-out number as described above or the unstable number can be different, can also phase
Together, similarly, the first threshold value corresponding to the step-out number or the unstable number can be different, can also be identical,
The second threshold value corresponding to the step-out number or the unstable number can be different, can also be identical;
Identical in other technical characteristics and embodiment one in the present embodiment two, it will not be described here.
Embodiment three
The embodiment of the present invention three provides a kind of clock source list updating method that base station clock synchronizes.The present embodiment three and reality
Apply example two the difference is that, be to first carry out to judge that the step-out number or the unstable number are in embodiment two
It is no to reach the process of first threshold value, then execute and judge whether the step-out number or the unstable number reach institute
It states the process of the second threshold value, is to first carry out to judge that the step-out number or the unstable number are in the present embodiment three
It is no to reach the process of second threshold value, then execute and judge whether the step-out number or the unstable number reach institute
State the process of the first threshold value.
Step S301:After detecting target clock source step-out, the step-out number in the target clock source is added one, or
After detecting that the synchronizing signal in the target clock source is unstable, the unstable number in the target clock source is added one;
Step S302:Judge whether the step-out number or the unstable number reach second threshold value, if
It is then to enter step S303, if it is not, then entering step S304;
Step S303:Delete processing is carried out to the target clock source;
Step S304:Judge whether the step-out number or the unstable number reach first threshold value, if
It is then to enter step S305;
Step S305:If reaching first threshold value, reduction priority processing is carried out to the target clock source.
Step S306:After reducing priority processing or delete processing, update is preconfigured same for base station clock
The clock source priority list of step, wherein each clock source in the clock source priority list is according to each clock source
Priority is ranked up.
Identical in other technical characteristics and embodiment two in the present embodiment three, it will not be described here.
It is considered that in the above-described embodiment, after detecting that the synchronizing signal in the target clock source is unstable, by institute
The unstable number for stating target clock source adds one, therefore, it is necessary to judge whether the synchronizing signal in the target clock source is stablized, is
This, the clock source list updating method of base station clock synchronization in one of the embodiments, in any one above-mentioned embodiment
On the basis of, can also include step:Detect the timing stability and/or frequency stabilization of the synchronizing signal in the target clock source
Property, it is unstable or frequency is unstable in the sequential of the synchronizing signal in the target clock source, then judge the target clock source
Synchronizing signal it is unstable.
Example IV
According to the clock source list updating method that the base station clock of the embodiments of the present invention synchronizes, the embodiment of the present invention four
A kind of base station clock synchronization method is provided.Base station clock synchronization method in the embodiment of the present invention four is based on any one above-mentioned reality
The updated clock source priority list of clock source list updating method that the base station clock in example synchronizes is applied to synchronize into row clock.
Fig. 4 is the implementation process schematic diagram of the base station clock synchronization method embodiment of the embodiment of the present invention four.As shown in figure 4, this implementation
Base station clock synchronization method in example 4 includes the following steps:
Step S401:Detect base station present clock source whether step-out, when detecting the present clock source step-out, into
Enter step S402;
Step S402:Next clock source is chosen according to the clock source priority list, enters step S403;
Wherein, present clock source refers to the clock source that the base station is being currently used;
Here, next clock source is sequence in the next of present clock source or sorts upper primary selected
Clock source next clock source;Next clock source can with selected by present clock source or last time when
Zhong Yuanwei same priorities can be different priority;
Step S403:Whether the synchronizing signal for detecting currently selected clock source is stablized, if unstable, return to step
S402 enters step S404 if stablizing;
Step S404:It is synchronized into row clock by currently selected clock source.
In view of it sometimes appear that clock synchronizes unsuccessful situation, for this purpose, as shown in figure 4, one embodiment wherein
In base station clock synchronization method, can also include step:
Step S405:Whether detection is described synchronizes success by currently selected clock source into row clock synchronization, if not
Success is synchronized, return to step S402 enters step S406 if synchronizing success;
Step S406:Into the normal mode of operation of the base station.
According to the clock source list updating method that the base station clock of aforementioned present invention synchronizes, the present invention also provides a kind of base stations
The clock source list updating system that clock synchronizes, the clock source list updating system that just base station clock of the present invention synchronizes below
Embodiment is described in detail.
Embodiment five
The embodiment of the present invention five provides a kind of clock source list updating system that base station clock synchronizes.Fig. 5 is that the present invention is real
Apply the composed structure schematic diagram of the clock source list updating system of the base station clock synchronization of example five.
As shown in figure 5, the clock source list updating system that the base station clock in the present embodiment five synchronizes includes:
Number adjusts module 501, for after detecting target clock source step-out, by the step-out in the target clock source time
Number plus one, or after detecting that the synchronizing signal in the target clock source is unstable, by the unstable of the target clock source
Number adds one;
Judgment module 502, for judging whether the step-out number or the unstable number reach preset punishment
Threshold value;
Module 503 is adjusted, is when being, to be dropped to the target clock source for the judging result in the judgment module
Low priority processing or delete processing;
Update module 504, for after adjustment module 503 reduces priority processing or delete processing, update to be matched in advance
The clock source priority list synchronized for base station clock set;
Wherein, each clock source in the clock source priority list is arranged according to the priority of each clock source
Sequence.
In in a specific example, the punishment threshold value includes the first threshold value and the second threshold value, wherein described
First threshold value is less than second threshold value;As shown in fig. 6, judgment module 502 is sentenced including the first judging unit 601 and second
Disconnected unit 602, adjustment module 503 include the first deleting unit 603 and the first degraded cell 604, wherein:
First judging unit 601 is for judging whether the step-out number or the unstable number reach described first
Threshold value;
Second judgment unit 602 is used to, when the judgement result of the first judging unit 601 is to be, judge the step-out number
Or whether the unstable number reaches second threshold value;
First degraded cell 604 is used for when the judgement result of the first judging unit 601 is no, to the target clock source
Carry out reduction priority processing;
First deleting unit 603 is used for when the judgement result of second judgment unit 602 is to be, to the target clock source
Carry out delete processing.
In a wherein specific example, the punishment threshold value includes the first threshold value and the second threshold value, wherein institute
It states the first threshold value and is less than second threshold value;As shown in fig. 7, judgment module 502 includes third judging unit 701 and the 4th
Judging unit 702, adjustment module 503 include the second deleting unit 703 and the second degraded cell 704, wherein:
Third judging unit 701 is for judging whether the step-out number or the unstable number reach described second
Threshold value;
Second deleting unit 703 is used for when the judgement result of third judging unit 701 is to be, to the target clock source
Carry out delete processing;
4th judging unit 702 for third judging unit 701 judgement result be it is no when, judge the step-out number or
Whether unstable number described in person reaches first threshold value;
Second degraded cell 704 is used for when the judgement result of the 4th judging unit 702 is to be, to the target clock source
Carry out reduction priority processing.
The clock source list updating system that a kind of base station clock in a wherein specific example synchronizes, as shown in figure 5,
Can also include:
Detection module 505, the timing stability and/or frequency stabilization of the synchronizing signal for detecting the target clock source
Property, it is unstable or frequency is unstable in the sequential of the synchronizing signal in the target clock source, then judge the target clock source
Synchronizing signal it is unstable.
The clock source list updating system that base station clock provided in an embodiment of the present invention synchronizes, it is pointed out that:More than
Description to the clock source list updating system that base station clock synchronizes, the clock source list update side synchronous with above-mentioned base station clock
The description of method is similar, and the advantageous effect with the above method repeats no more to save length;Therefore, above to this
Undisclosed technical detail in the clock source list updating system that the base station clock that inventive embodiments provide synchronizes, please refers to above-mentioned
The description for the clock source list updating method that the base station clock of offer synchronizes.
According to the base station clock synchronization method of aforementioned present invention, the present invention also provides a kind of base station clock synchronization system, with
The embodiment of lower just base station clock synchronization system of the present invention is described in detail.
Embodiment six
The embodiment of the present invention six provides a kind of base station clock synchronization system.Fig. 8 is the base station clock of the embodiment of the present invention six
The composed structure schematic diagram of synchronization system.A preferred embodiment of the base station clock synchronization system of the present invention is shown in Fig. 8
Structural schematic diagram.Can include in the base station clock synchronization system of the specific implementation present invention according to different consideration factors
Whole shown in fig. 8 can also include only a portion shown in fig. 8.
A kind of base station clock synchronization system in the present embodiment six, including base station clock in embodiment as above synchronize when
Clock source list updating system 800 further includes:
Module 801 is chosen, is used for after the present clock source step-out of base station, or in the detection of first detection module 802
When being as a result unstable, next clock source is chosen according to the clock source priority list;
Whether first detection module 802, the synchronizing signal for detecting currently selected clock source are stablized;
Synchronization module 803 is when stablizing, by currently selected for the testing result in first detection module 802
Clock source is synchronized into row clock.
Further, the base station clock synchronization system in a wherein specific example, as shown in figure 8, can also include
Second detection module 804 and mode switch module 805:
Second detection module 804 is for detecting whether described synchronized into row clock by currently selected clock source synchronizes
Success;
Choose module 801 be additionally operable to the second detection module 804 testing result be do not synchronize successfully when, according to it is described when
Clock source priority list chooses next clock source;
Mode switch module 805 is used for when the testing result of second detection module is to synchronize successfully, into described
The normal mode of operation of base station.
Base station clock synchronization system provided in an embodiment of the present invention, it is pointed out that:Base station clock is synchronized above and is
The description of system, the description with above-mentioned base station clock synchronization method are similar, and with above-mentioned base station clock synchronization method
Advantageous effect repeats no more to save length;Therefore, above in base station clock synchronization system provided in an embodiment of the present invention
Undisclosed technical detail please refers to the description of the base station clock synchronization method of above-mentioned offer.
Each technical characteristic of embodiment described above can be combined arbitrarily, to keep description succinct, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, it is all considered to be the range of this specification record.
Several embodiments of the invention above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the protection of the present invention
Range.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.