CN106209085A - Numerical control ring oscillator and control method and device thereof - Google Patents

Numerical control ring oscillator and control method and device thereof Download PDF

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Publication number
CN106209085A
CN106209085A CN201610466691.3A CN201610466691A CN106209085A CN 106209085 A CN106209085 A CN 106209085A CN 201610466691 A CN201610466691 A CN 201610466691A CN 106209085 A CN106209085 A CN 106209085A
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China
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control code
controlled oscillator
order
outfan
delay unit
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CN106209085B (en
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乔树山
孙雅芃
赵慧冬
黑勇
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Ruili Flat Core Microelectronics Guangzhou Co Ltd
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Institute of Microelectronics of CAS
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)

Abstract

The invention discloses a numerical control ring oscillator and a control method and device thereof. Wherein, this numerical control ring oscillator includes: a high order digitally controlled oscillator; the input end of the low-bit numerical control oscillator is connected with the output end of the high-bit numerical control oscillator, and the output end of the low-bit numerical control oscillator is connected with the input end of the high-bit numerical control oscillator and the output end of the numerical control ring oscillator; the control code of the high-order numerical control oscillator is a high-order control code, and the control code of the low-order numerical control oscillator is a low-order control code. The invention solves the technical problems of limited output frequency precision and output frequency range of the numerical control ring oscillator in the prior art.

Description

Numerically controlled annular agitator and control method thereof and device
Technical field
The present invention relates to clock signal and generate field, in particular to a kind of numerically controlled annular agitator and controlling party thereof Method and device.
Background technology
Clock is an indispensable part in Circuits System.Traditional clock source crystal oscillator, because of the performance of its brilliance, It is acknowledged as optimal clock generator always.But, along with the development of integrated circuit, crystal oscillator also shows self Limitation.Its power consumption is high, and area is big, can not be integrated, and these all development trends with current integrated circuit are disagreed.Therefore, Researchers start to focus on clock research on the sheet that low-power consumption can be integrated.On common sheet, clock is divided into analog-and digital-two Kind.Simulation clock accuracy is high, but the most often has the shortcoming that power consumption is high, area is big.And for the band gap of voltage stabilizing in simulation clock Reference voltage source module is because of himself characteristic, and design at lower voltages can become extremely difficult, and this also in turn limit electricity The further reduction of source voltage.It addition, simulation clock is higher to process dependency, portable poor, which also limits sending out of it Exhibition.Compared with simulation clock, digital dock supply voltage can synchronize to reduce along with technique, has good portability, although In precision, ratio simulation clock is slightly worse, but requires in the strictest Circuits System at some to clock signal, one of can yet be regarded as Extraordinary upper clock generator.
Simplest digital dock producing method is for utilizing numerically controlled annular agitator, by the standard cell lib of odd number number The rp unit oscillator signal that obtains of cascade as the clock signal of output.In order to reduce area as far as possible, numerically controlled annular vibrates Device generally uses base-2 cascade structure, selects to be connected into the standard of numerically controlled annular agitator by switching different MUX Rp unit number, this circuit structure inevitably introduces MUX.Meanwhile, the placement-and-routing of domain produces Dead resistance, parasitic capacitance also allow the time delay of numerically controlled annular agitator have relative increase compared with theory, and MUX The time delay produced with dead resistance electric capacity is strictly affected by technique, supply voltage, temperature, and can there is circuit always In, this output frequency precision the most seriously limiting numerically controlled annular agitator and frequency range.
For the problem that the output frequency precision of numerically controlled annular agitator of the prior art and reference frequency output are limited, At present effective solution is not yet proposed.
Summary of the invention
Embodiments provide a kind of numerically controlled annular agitator and control method thereof and device, existing at least to solve The output frequency precision of the numerically controlled annular agitator in technology and the limited technical problem of reference frequency output.
An aspect according to embodiments of the present invention, it is provided that a kind of numerically controlled annular agitator, including: high-order numerical control vibration Device;Lower-order digit controlled oscillator, input is connected with the outfan of seniority top digit controlled oscillator, outfan and seniority top digit controlled oscillator The outfan of input and numerical control ring oscillator connects;Wherein, the control code of seniority top digit controlled oscillator is high-order control code, low The control code of figure place controlled oscillator is low level control code.
Another aspect according to embodiments of the present invention, additionally provides the control method of a kind of numerically controlled annular agitator, including: Obtain the first control code of numerically controlled annular agitator;Utilize inherent delay that the first control code is adjusted, obtain the second control Code;Second control code is resolved into high-order control code and low level control code;High position control code is transmitted to seniority top digit controlled oscillator, And low level control code is transmitted to lower-order digit controlled oscillator.
Another aspect according to embodiments of the present invention, additionally provides the control device of a kind of numerically controlled annular agitator, including: Acquisition module, for obtaining the first control code of numerically controlled annular agitator;Adjusting module, is used for utilizing inherent delay to the first control Code processed is adjusted, and obtains the second control code;Decomposing module, for resolving into high-order control code and low level control by the second control code Code processed;Transport module, for transmitting high position control code to seniority top digit controlled oscillator, and transmits low level control code to lower-order digit Controlled oscillator.
In embodiments of the present invention, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator and low level numerical control vibration Device, the input of lower-order digit controlled oscillator is connected with the outfan of seniority top digit controlled oscillator, outfan and seniority top digit controlled oscillator Input and numerical control ring oscillator outfan connect, thus realize constant at basic guarantee numerically controlled annular agitator area On the premise of, the number and the laying out pattern that reduce the switching device such as MUX being connected into circuit connect up the dead resistance caused Electric capacity, slow down domain dead resistance electric capacity, ambient temperature and supply voltage to the numerically controlled annular vibration without extraneous reference clock The impact of device oscillator output frequencies, simultaneously, it is possible to use the control code of numerical control ring oscillator is entered by the length of inherent delay Row fine setting, eliminates technique, supply voltage, the temperature impact on numerical control ring oscillator output frequency further, solves existing The output frequency precision of the numerically controlled annular agitator in technology and the limited technical problem of reference frequency output.Therefore, by this Invention above-described embodiment, can reach to reduce the inherent delay of numerically controlled annular agitator, improve the output frequency of digital controlled oscillator Precision and frequency range, have the effect of the good suitability.
Accompanying drawing explanation
Accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes the part of the application, this Bright schematic description and description is used for explaining the present invention, is not intended that inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the schematic diagram of a kind of numerically controlled annular agitator according to embodiments of the present invention;
Fig. 2 is the schematic diagram of a kind of optional numerically controlled annular agitator according to embodiments of the present invention;
Fig. 3 is the structural representation of a kind of optional seniority top digit controlled oscillator according to embodiments of the present invention;
Fig. 4 is the structural representation of a kind of optional lower-order digit controlled oscillator according to embodiments of the present invention;
Fig. 5 is the flow chart of the control method of a kind of numerically controlled annular agitator according to embodiments of the present invention;
Fig. 6 is the standard time delay of the different number of a kind of optional numerically controlled annular agitator gating according to embodiments of the present invention The schematic diagram of the output frequency error after unit;
Fig. 7 is the signal of the output frequency error of a kind of optional numerically controlled annular agitator according to embodiments of the present invention Figure;
Fig. 8 is the flow chart of the control method of a kind of optional numerically controlled annular agitator according to embodiments of the present invention;With And
Fig. 9 is the schematic diagram controlling device of a kind of numerically controlled annular agitator according to embodiments of the present invention.
Detailed description of the invention
In order to make those skilled in the art be more fully understood that the present invention program, below in conjunction with in the embodiment of the present invention Accompanying drawing, is clearly and completely described the technical scheme in the embodiment of the present invention, it is clear that described embodiment is only The embodiment of a present invention part rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill people The every other embodiment that member is obtained under not making creative work premise, all should belong to the model of present invention protection Enclose.
It should be noted that term " first " in description and claims of this specification and above-mentioned accompanying drawing, " Two " it is etc. for distinguishing similar object, without being used for describing specific order or precedence.Should be appreciated that so use Data can exchange in the appropriate case, in order to embodiments of the invention described herein can with except here diagram or Order beyond those described is implemented.Additionally, term " includes " and " having " and their any deformation, it is intended that cover Cover non-exclusive comprising, such as, contain series of steps or the process of unit, method, system, product or equipment are not necessarily limited to Those steps clearly listed or unit, but can include the most clearly listing or for these processes, method, product Or intrinsic other step of equipment or unit.
Embodiment 1
According to embodiments of the present invention, it is provided that the embodiment of a kind of numerically controlled annular agitator.
Fig. 1 is the schematic diagram of a kind of numerically controlled annular agitator according to embodiments of the present invention, as it is shown in figure 1, this numerical control ring Shape agitator includes: seniority top digit controlled oscillator 11 and lower-order digit controlled oscillator 13.
Wherein, the input of lower-order digit controlled oscillator 13 is connected with the outfan of seniority top digit controlled oscillator 11, low level numerical control The outfan of agitator 13 is connected with the input of seniority top digit controlled oscillator 11 and the outfan of numerical control ring oscillator.
Wherein, the control code of seniority top digit controlled oscillator 11 is high-order control code, and the control code of lower-order digit controlled oscillator 13 is Low level control code.
Herein it should be noted that the standard from different numbers that depends not only on the cycle of oscillation of numerically controlled annular agitator is prolonged The time delay of Shi Danyuan, but also electric with the dead resistance that MUX etc. selects the time delay of switch, laying out pattern wiring to cause Holding the time delay that causes relevant, latter two are affected relatively big by technique, supply voltage, temperature because of procatarxis, are limited to a great extent The precision of numerically controlled annular agitator, therefore, it can be referred to as the time delay that rear two factors produce the inherent delay of circuit.
In the optional scheme of one, as in figure 2 it is shown, the standard cell lib that numerically controlled annular agitator is provided by technique manufacturer In rp unit combine, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator and lower-order digit controlled oscillator two Part, the input of lower-order digit controlled oscillator is connected with the outfan of seniority top digit controlled oscillator, the output of lower-order digit controlled oscillator End is connected with the input of seniority top digit controlled oscillator and the outfan of numerical control ring oscillator, thus when structure does not has extraneous reference The open loop analog or digital clock generator of clock.Seniority top digit controlled oscillator determines the substantially output frequency of numerically controlled annular agitator Rate, lower-order digit controlled oscillator determines the output frequency that numerically controlled annular agitator is final.Seniority top digit controlled oscillator and low level numerical control Agitator has respective control code respectively, and by gating different control codes, numerically controlled annular agitator can generate respective tones The clock of rate.
In the optional scheme of another kind, the capacitance variations meeting caused due to the gating end difference of lower-order digit controlled oscillator The inherent delay making circuit produces certain change, vibrates to by numerically controlled annular to eliminate technique, supply voltage and temperature as far as possible The impact of the inherent delay in device, can pass through aided algorithm, utilizes the control to numerical control ring oscillator of the length of inherent delay Code processed is finely adjusted, so that it is determined that high-order control code and low level control code.
By the above embodiment of the present invention, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator and low level numerical control Agitator, the input of lower-order digit controlled oscillator is connected with the outfan of seniority top digit controlled oscillator, and outfan shakes with high-order numerical control The outfan of the input and numerical control ring oscillator that swing device connects, thus realizes at basic guarantee numerically controlled annular agitator area On the premise of constant, the number and the laying out pattern that reduce the switching device such as MUX being connected into circuit connect up the parasitism caused Resistance capacitance, slow down domain dead resistance electric capacity, ambient temperature and supply voltage to the numerically controlled annular without extraneous reference clock The impact of agitator oscillator output frequencies, solves the output frequency precision of numerically controlled annular agitator of the prior art and defeated Go out the technical problem that frequency range is limited.Therefore, by the above embodiment of the present invention, can reach to reduce numerically controlled annular agitator Inherent delay, improve the output frequency precision of digital controlled oscillator and frequency range, there is the effect of the good suitability.
Optionally, according to the above embodiment of the present invention, seniority top digit controlled oscillator 13 includes: multi-stage cascade structure.
Wherein, multi-stage cascade structure is connected, the input of first order cascade structure and the input of seniority top digit controlled oscillator Connecting, the outfan of afterbody cascade structure is connected with the outfan of seniority top digit controlled oscillator.
In the optional scheme of one, as it is shown on figure 3, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator (i.e. DCOH shown in dotted line frame in figure) and lower-order digit controlled oscillator (i.e. DCOL in figure) two parts, seniority top digit controlled oscillator is permissible Use base-2 cascade structure, such as, can use 6 grades of cascade structures, connect between every grade of cascade structure, first order cascade structure The input of input and seniority top digit controlled oscillator, i.e. the outfan of lower-order digit controlled oscillator connects, afterbody level link The input of the outfan of structure and the outfan of seniority top digit controlled oscillator, i.e. lower-order digit controlled oscillator connects, every grade of cascade structure Component units similar, and the connected mode of the component units of every grade of cascade structure is identical.
Optionally, according to the above embodiment of the present invention, every grade of cascade structure may include that NAND gate, the first predetermined number Standard delay unit and MUX.
Wherein, the first input end of NAND gate is connected with high-order control code, the second input of NAND gate and every grade of cascade The input of structure connects, and the input of standard delay unit of the first predetermined number is connected with the outfan of NAND gate, and first The standard delay unit series connection of predetermined number, the quantity of the standard delay unit of every grade of cascade structure is different, MUX The outfan of the standard delay unit of first input end and the first predetermined number connects, and the second input of MUX is with every The input of level cascade structure connects, and the control end of MUX is connected with high-order control code, the outfan of MUX It is connected with the outfan of every grade of cascade structure.
Concrete, above-mentioned MUX can be alternative MUX, when controlling end input for high level, and can To select conducting high level input, the most above-mentioned first input end, when controlling end input for low level, conducting can be selected Low level input, the second the most above-mentioned input.
Optionally, above-mentioned first predetermined number can be one of following: 16,32,64,128,256 and 512.Above-mentioned standard Delay unit can be NAND gate.
Herein it should be noted that above-mentioned standard delay unit can be the gate circuit with inverter functionality, and not only office It is limited to the NAND gate described in the embodiment of the present invention.
In the optional scheme of one, as it is shown on figure 3, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator (i.e. DCOH shown in dotted line frame in figure) and lower-order digit controlled oscillator (i.e. DCOL in figure) two parts, seniority top digit controlled oscillator is permissible Using base-2 cascade structure, every grade of cascade structure can be by NAND gate, multiple standard delay units, and MUX structure Becoming, the first input end of NAND gate and the control end of MUX are all connected with high-order control code, the second input of NAND gate The low level input of end and MUX is all connected with the input of this grade of cascade structure, and multiple standard delay units are connected Between the outfan and the high level input of MUX of NAND gate.It is for instance possible to use 6 grades of cascade structures, every grade The number of the standard delay unit of cascade structure can be respectively 16,32,64,128,256 and 512, and first order cascade structure can To include 512 standard delay units, second level cascade structure can include 256 standard delay units, third level level link Structure can include 128 standard delay units, and fourth stage cascade structure can include 64 standard delay units, and level V cascades Structure can include that 32 standard delay units, the 6th grade of cascade structure can include 16 standard delay units.Can pass through MUX gates the standard delay unit number being connected into numerically controlled annular agitator, such as, when needs gating standard time delay When unit number is 64, it may be determined that the MUX of fourth stage cascade structure selects conducting high level input, remaining level The MUX of connection structure all selects to turn on low level input, so that it is determined that high-order control code is 000100, by control code Inputting the control end of multiple MUX, i.e. C=001000, first order cascade structure controls end C [5]=0, and the second level cascades Structure control end C [4]=0, third level cascade structure controls end C [3]=0, and fourth stage cascade structure controls end C [2]=1, the Pyatyi cascade structure controls end C [1]=0, the 6th grade of cascade structure control end C [0]=0, thus only fourth stage cascade structure MUX select conducting high level input.
By such scheme, seniority top digit controlled oscillator uses base-2 cascade structure, and the number of MUX is less, circuit Connect relatively simple.
Optionally, according to the above embodiment of the present invention, lower-order digit controlled oscillator 13 includes: the standard of the second predetermined number is prolonged Shi Danyuan and multiple three state buffer.
Wherein, the standard delay unit series connection of the second predetermined number, the input of first standard delay unit and low level The input of digital controlled oscillator connects, and the outfan of last standard delay unit connects with the outfan of lower-order digit controlled oscillator Connect.The input of each three state buffer is connected with the outfan of the standard delay unit of odd number number, outfan and lower-order digit The outfan of controlled oscillator connects, and controls end and is connected with low level control code.
Optionally, above-mentioned second predetermined number can be 15.Above-mentioned three state buffer can be three with switching function State buffer.Above-mentioned standard delay unit can be NAND gate.
Herein it should be noted that above-mentioned standard delay unit can be the gate circuit with inverter functionality, and not only office It is limited to the NAND gate described in the embodiment of the present invention.
In the optional scheme of one, as shown in Figure 4, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator and low Figure place controlled oscillator two parts, lower-order digit controlled oscillator can use the chain structure with three state buffer switch, Ke Yiyou Multiple standard delay units and multiple three state buffer composition, multiple standard delay units are connected on the defeated of lower-order digit controlled oscillator Entering between end and outfan, three state buffer is arranged on the outfan of the standard delay unit of odd number number and vibrates with low level numerical control Between the outfan of device.Such as, lower-order digit controlled oscillator can be made up of 15 standard delay units and 8 three state buffers, 1st three state buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 1st standard delay unit, the 2 three state buffers are connected between outfan and the outfan of lower-order digit controlled oscillator of the 3rd standard delay unit, and the 3rd Individual three state buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 5th standard delay unit, the 4th Three state buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 7th standard delay unit, the 5th three State buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 9th standard delay unit, the 6th tri-state Buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 11st standard delay unit, the 7th tri-state Buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 13rd standard delay unit, the 8th tri-state Buffer is connected between outfan and the outfan of lower-order digit controlled oscillator of the 15th standard delay unit.Can be by three State buffer gates the standard delay unit number being connected into numerically controlled annular agitator, no matter selects 1 or selects 15 standards Delay unit, be connected into numerically controlled annular agitator in addition to the standard delay unit of Theoretical Calculation, only one of which three state buffer, contracting The short inherent delay introduced by switching device.Such as, when needs gating standard delay unit number is 13, it may be determined that the 7 three state buffer conductings, remaining three state buffer is in high-impedance state, so that it is determined that control code is 13, i.e. OE= Control end OE [0]=0 of the 00000010, the 1st three state buffer, control end OE [1]=0 of the 2nd three state buffer, the 3rd Control end OE [2]=0 of individual three state buffer, control end OE [3]=0 of the 4th three state buffer, the 5th three state buffer Control end OE [4]=0, control end OE [5]=0 of the 6th three state buffer, control end OE [6] of the 7th three state buffer Control end OE [7]=0 of the=1, the 8th three state buffer.
By such scheme, lower-order digit controlled oscillator is taked the chain structure with three state buffer, is connected into numerically controlled annular The extra time delay of pierce circuit at most has and the time delay of an only three state buffer, and precision is higher.
Optionally, according to the above embodiment of the present invention, lower-order digit controlled oscillator 13 also includes: multiple virtual devices.
Wherein, the input of each virtual device is connected with the outfan of the standard delay unit of even number number, outfan It is connected with the outfan of lower-order digit controlled oscillator, controls end ground connection.
In the optional scheme of one, as shown in Figure 4, lower-order digit controlled oscillator can increase virtual device and ensure circuit Load is consistent, virtual device as illustrated with the dotted box, the input of each virtual device and the standard delay unit of even number number Outfan connect, outfan is connected with the outfan of lower-order digit controlled oscillator, control end ground connection.Such as, low level numerical control vibration Device can be made up of 15 standard delay units and 8 three state buffers, it is also possible to includes 7 virtual devices, the 1st virtual machine Part is connected between outfan and the outfan of lower-order digit controlled oscillator of the 2nd standard delay unit, and the 2nd virtual device is even Being connected between outfan and the outfan of lower-order digit controlled oscillator of the 4th standard delay unit, the 3rd virtual device is connected to Between outfan and the outfan of lower-order digit controlled oscillator of the 6th standard delay unit, the 4th virtual device is connected to the 8th Between outfan and the outfan of lower-order digit controlled oscillator of individual standard delay unit, the 5th virtual device is connected to the 10th Between outfan and the outfan of lower-order digit controlled oscillator of standard delay unit, the 6th virtual device is connected to the 12nd mark Between outfan and the outfan of lower-order digit controlled oscillator of quasi-delay unit, the 7th virtual device is connected to the 14th standard Between outfan and the outfan of lower-order digit controlled oscillator of delay unit.
Embodiment 2
According to embodiments of the present invention, additionally provide the embodiment of the control method of a kind of numerically controlled annular agitator, need Bright, can hold in the computer system of such as one group of computer executable instructions in the step shown in the flow chart of accompanying drawing OK, and, although show logical order in flow charts, but in some cases, can be to be different from order herein Step shown or described by execution.
Fig. 5 is the flow chart of the control method of a kind of numerically controlled annular agitator according to embodiments of the present invention, such as Fig. 5 institute Showing, the method comprises the steps:
Step S52, obtains the first control code of numerically controlled annular agitator.
Step S54, utilizes inherent delay to be adjusted the first control code, obtains the second control code.
Step S56, resolves into high-order control code and low level control code by the second control code.
Step S58, transmits high position control code to seniority top digit controlled oscillator, and transmits low level control code to low level numerical control Agitator.
Optionally, above-mentioned first control code can be the former control code of numerically controlled annular agitator, and above-mentioned second control code can To be the new control code after utilizing inherent delay that former control code is finely adjusted.
In the optional scheme of one, the target frequency that can generate according to expectation numerically controlled annular agitator, determine numerical control The former control code of ring oscillator, after obtaining former control code, can be according to the standard time delay of lower-order digit controlled oscillator gating The inherent delay that the number of unit produces, is finely adjusted former control code, obtains new control code, new control code is divided into height Position control code and low level control code, high-order control code is sent into seniority top digit controlled oscillator, is controlled MUX gating varying number Standard delay unit, low level control code send into lower-order digit controlled oscillator, control three state buffer gating varying number standard Delay unit.
In the optional scheme of another kind, certain in technique, when changing supply voltage and ambient temperature, the different numerical control of gating The error of the output frequency that ring oscillator control code obtains and ideal frequency is as shown in Figure 6.It will be appreciated from fig. 6 that in control code When number is more than 100, namely output frequency is when 100M, and frequency error is less than 1%.When output frequency reduces, frequency error is also Can reduce further.Typical case, quickly, in the case of slow process angle, when supply voltage changes from 1.6V to 2V, ambient temperature When 0 to 80 degree change, target frequency is set as the output frequency error of numerically controlled annular agitator during 25MHz as shown in Figure 7. As shown in Figure 7, now the output frequency error of numerically controlled annular agitator is-0.69%~1.37%, far below the most universal Numerically controlled annular oscillator structure.
Herein it should be noted that the capacitance variations caused due to the gating end difference of lower-order digit controlled oscillator can make electricity The inherent delay on road produces certain change, in order to eliminate technique, supply voltage and temperature to by numerically controlled annular agitator as far as possible The impact of inherent delay, aided algorithm can be passed through, utilize the length of the inherent delay control code to numerical control ring oscillator It is finely adjusted, so that it is determined that high-order control code and low level control code.
By the above embodiment of the present invention, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator and low level numerical control Agitator, can obtain the first control code of numerically controlled annular agitator, utilizes inherent delay to be adjusted the first control code, To the second control code, the second control code is resolved into high-order control code and low level control code, by the transmission of high position control code to high-order Digital controlled oscillator, and by low level control code transmission to lower-order digit controlled oscillator, thus realize utilizing the length logarithm of inherent delay The control code of control ring oscillator is finely adjusted, and eliminates technique, supply voltage, temperature further to the output of numerical control ring oscillator The impact of frequency, the output frequency precision and the reference frequency output that solve numerically controlled annular agitator of the prior art are limited Technical problem.Therefore, by the above embodiment of the present invention, can reach to improve the precision of numerically controlled annular agitator, improve numerical control The output frequency precision of agitator and frequency range, have the effect of the good suitability.
Optionally, according to the above embodiment of the present invention, step S54, utilize inherent delay that the first control code is adjusted, Obtain the second control code, including:
Step S542, from the beginning of the lowest order of the first control code, extracts the first control code presetting figure place, obtains the 3rd control Code processed.
Optionally, when lower-order digit controlled oscillator comprises 15 standard delay units, above-mentioned first presets figure place can be 4。
Step S544, obtains the inherent delay corresponding with the 3rd control code.
Step S546, according to inherent delay and the time delay of standard delay unit, obtains the first quantity of standard delay unit.
Step S548, calculates the first control code and the difference of the first quantity, obtains the second control code.
In the optional scheme of one, the standard delay unit of the different number of lower-order digit controlled oscillator module gating, produce Inherent delay slightly difference.Assume gating 1,3,5 ... after 15 standard delay units, inherent delay is respectively 3ns, 3.02ns, 3.04ns ..., 3.14ns.Getting former control code CODE of numerically controlled annular agitatorori=0110010001 Afterwards, low four the 3rd control codes obtaining gating lower-order digit controlled oscillator of former control code can be extracted, can pass through Table look-up and obtain the inherent delay corresponding with the 3rd control code, according to inherent delay and the time delay of standard delay unit, obtain intrinsic Number NUM=30 of the standard delay unit that time delay is corresponding, the first the most above-mentioned quantity is 30, can pass through formula CODEnew= CODEori-NUM calculates new control code, the second the most above-mentioned control code CODEnew=401-30=371=0101110011.
Optionally, according to the above embodiment of the present invention, step S544, the inherent delay bag corresponding with the 3rd control code is obtained Include:
Step S5442, is converted to decimal number by the 3rd control code, obtains the second quantity of standard delay unit.
Step S5444, according to the second quantity, inquiry obtains inherent delay.
In the optional scheme of one, getting former control code CODE of numerically controlled annular agitatororiIt is 0110010001 In the case of, latter four that can extract former control code obtain the 3rd control code, and i.e. 0001, the 3rd control code is converted to ten and enters Number processed, the standard delay unit of the gating obtaining lower-order digit controlled oscillator is 1, and the second the most above-mentioned quantity is 1, can by tabling look-up To obtain, the inherent delay of 1 standard delay unit of gating is 3ns.
Optionally, according to the above embodiment of the present invention, step S546, according to prolonging of inherent delay and standard delay unit Time, obtain the first quantity of standard delay unit, including:
Step S5462, calculates the ratio of the time delay of inherent delay and standard delay unit, obtains the first quantity.
In the optional scheme of one, the time delay T of standard delay unitcellCan be 0.1ns, formula can be passed throughObtain number NUM of standard delay unit corresponding to inherent delay, wherein, TinhFor numerically controlled annular agitator Inherent delay.So, during lower-order digit controlled oscillator module 1,3,5,7,9 standard delay units of gating, corresponding inherent delay Number is 30;During 11,13,15 standard delay units of gating, corresponding inherent delay number is 31.Such as, when intrinsic When time delay is 3ns, can be calculated the number of standard delay unit corresponding to inherent delay by formula is 30.
Optionally, according to the above embodiment of the present invention, step S56, the second control code is resolved into high-order control code and low Position control code, including:
Step S562, from the beginning of the highest order of the second control code, extracts the second control code presetting figure place, obtains high-order control Code processed.
Optionally, when seniority top digit controlled oscillator comprises 6 grades of cascade structures, above-mentioned second to preset figure place can be 6.
Other control codes in addition to high-order control code in second control code are converted into decimal number by step S564, To low level control code.
In the optional scheme of one, in the length utilizing inherent delay, the control code of numerical control ring oscillator is carried out micro- Adjusting, after obtaining new control code, high six that can extract the new control code calculated obtain high-order control code, and by high position control Code processed is sent into seniority top digit controlled oscillator and is controlled end, extract low four be converted to decimal number after, obtain low level control code, and by low Position control code is sent into the lower-order digit controlled oscillator of gating corresponding number standard delay unit and is controlled end.
Optionally, according to the above embodiment of the present invention, step S52, the first control code bag of numerically controlled annular agitator is obtained Include:
Step S522, obtains the target frequency preset.
Optionally, above-mentioned default target frequency can be the target frequency that expectation numerically controlled annular agitator generates.
Step S524, calculates the ratio of the time delay of target frequency and standard delay unit, obtains the of standard delay unit Three quantity.
Step S526, is converted to binary code by the 3rd quantity, obtains the first control code.
In the optional scheme of one, after getting the target frequency that expectation generates, can be according to target frequency pair The object time T answeredobj, and the time delay T of standard delay unitcell, pass through formulaIt is calculated and is connected into number The number of the standard delay unit of control ring oscillator, the 3rd the most above-mentioned quantity, the 3rd quantity is converted to binary code, To the first control code, such as, the time delay T of a standard delay unitcellCan be 0.1ns, it is desirable to the target frequency of generation is 25MHz, i.e. object time TobjFor 40ns, then the first control code CODEori=400 (dec)=0110010000 (bin).
Optionally, according to the above embodiment of the present invention, step S526, the 3rd quantity is converted to binary code, obtains One control code, including:
Step S5262, it is judged that whether the 3rd quantity is even number.
Step S5264, in the case of the 3rd quantity is even number, is converted to odd number by the 3rd quantity, and after processing 3rd quantity is converted to binary code, obtains the first control code.
Step S5266, in the case of the 3rd quantity is odd number, is directly converted to binary code by the 3rd quantity, obtains First control code.
In the optional scheme of one, in order to ensure the normal starting of oscillation of numerically controlled annular agitator, it can be determined that the 3rd quantity is No for even number, the 3rd quantity be even number not for odd number in the case of, the 3rd quantity is taken as odd number, is digitally controlled ring oscillation The former control code of device.
Optionally, according to the above embodiment of the present invention, step S5264, the 3rd quantity is converted to odd number, including: step S52640, adds one by the 3rd quantity, the 3rd quantity after being processed.
In the optional scheme of one, it is, in the case of even number is not odd number, the 3rd quantity to be added one in the 3rd quantity, real Existing 3rd quantity is taken as odd number, such as, when being calculated CODEoriDuring=400 (dec)=0110010000 (bin), can be by 3rd quantity adds one, is digitally controlled the former control code of ring oscillator, and i.e. 0110010001.
Below in conjunction with Fig. 8, being described in detail one preferred embodiment of the present invention, as shown in Figure 8, the method is permissible Including step S81 to step S83:
Step S81, calculates the first control code of numerically controlled annular agitator.
Optionally, above-mentioned control code can be ten binary codes, can obtain default target frequency, calculates target frequency The ratio of the time delay of rate and standard delay unit, obtains the 3rd quantity of standard delay unit, and the just the 3rd quantity is converted to Binary code, is digitally controlled the control code needed for agitator, the first the most above-mentioned control code.
Rear four control codes are converted to decimal number, obtain the second quantity of standard delay unit by step S82.
Optionally, from the beginning of the lowest order of the first control code, extract the control code of low four, obtain the 3rd control code, and 3rd control code is converted to decimal number, obtains the number of the standard delay unit of the gating of lower-order digit controlled oscillator, i.e. go up The second quantity stated.
Step S83, according to the second quantity, inquiry obtains inherent delay, and obtains the first quantity of standard delay unit.
Optionally, the inherent delay corresponding with the second quantity can be obtained by tabling look-up, calculate inherent delay and standard is prolonged The ratio of the time delay of Shi Danyuan, obtains the number of standard delay unit corresponding to inherent delay, the first the most above-mentioned quantity.
Step S84, calculates the first control code and the difference of the first quantity, obtains the second control code.
Optionally, former control code can be deducted the number of standard delay unit corresponding to inherent delay, obtain new control Code processed, the second the most above-mentioned control code.
Step S85, resolves into high-order control code and low level control code by the second control code, by paramount for the transmission of high position control code Figure place controlled oscillator, and low level control code is transmitted to lower-order digit controlled oscillator.
Optionally, the control code of high six from the beginning of the highest order of the second control code, can be extracted, obtain high-order control Code, and by high position control code send into seniority top digit controlled oscillator control end, extract low four be converted to decimal number after, obtain low level Control code, and low level control code is sent into the lower-order digit controlled oscillator control end of gating corresponding number standard delay unit.
By such scheme, technique, supply voltage and temperature can be eliminated to a certain extent to numerical control ring oscillator The impact of cycle of oscillation, thus improve the precision of numerically controlled annular agitator, increase the frequency accuracy of numerically controlled annular agitator output And frequency range.
Embodiment 3
According to embodiments of the present invention, the embodiment controlling device of a kind of numerically controlled annular agitator is additionally provided.
Fig. 9 is the schematic diagram controlling device of a kind of numerically controlled annular agitator according to embodiments of the present invention, such as Fig. 9 institute Showing, this device includes:
Acquisition module 91, for obtaining the first control code of numerically controlled annular agitator.
Adjusting module 93, is used for utilizing inherent delay to be adjusted the first control code, obtains the second control code.
Decomposing module 95, for resolving into high-order control code and low level control code by the second control code.
Transport module 97, for transmitting high position control code to seniority top digit controlled oscillator, and transmits low level control code extremely Lower-order digit controlled oscillator.
Optionally, above-mentioned first control code can be the former control code of numerically controlled annular agitator, and above-mentioned second control code can To be the new control code after utilizing inherent delay that former control code is finely adjusted.
In the optional scheme of one, the target frequency that can generate according to expectation numerically controlled annular agitator, determine numerical control The former control code of ring oscillator, after obtaining former control code, can be according to the standard time delay of lower-order digit controlled oscillator gating The inherent delay that the number of unit produces, is finely adjusted former control code, obtains new control code, new control code is divided into height Position control code and low level control code, high-order control code is sent into seniority top digit controlled oscillator, is controlled MUX gating varying number Standard delay unit, low level control code send into lower-order digit controlled oscillator, control three state buffer gating varying number standard Delay unit.
In the optional scheme of another kind, certain in technique, when changing supply voltage and ambient temperature, the different numerical control of gating The error of the output frequency that ring oscillator control code obtains and ideal frequency is as shown in Figure 6.It will be appreciated from fig. 6 that in control code When number is more than 100, namely output frequency is when 100M, and frequency error is less than 1%.When output frequency reduces, frequency error is also Can reduce further.Typical case, quickly, in the case of slow process angle, when supply voltage changes from 1.6V to 2V, ambient temperature When 0 to 80 degree change, target frequency is set as the output frequency error of numerically controlled annular agitator during 25MHz as shown in Figure 7. As shown in Figure 7, now the output frequency error of numerically controlled annular agitator is-0.69%~1.37%, far below the most universal Numerically controlled annular oscillator structure.
Herein it should be noted that the capacitance variations caused by the gating end difference of lower-order digit controlled oscillator module can make The inherent delay of circuit produces certain change.In order to eliminate technique, supply voltage and temperature to by numerically controlled annular agitator as far as possible In the impact of inherent delay, aided algorithm can be passed through, utilize the control to numerical control ring oscillator of the length of inherent delay Code is finely adjusted, so that it is determined that high-order control code and low level control code.
By the above embodiment of the present invention, numerically controlled annular agitator can be divided into seniority top digit controlled oscillator and low level numerical control Agitator, can obtain the first control code of numerically controlled annular agitator, utilizes inherent delay to be adjusted the first control code, To the second control code, the second control code is resolved into high-order control code and low level control code, by the transmission of high position control code to high-order Digital controlled oscillator, and by low level control code transmission to lower-order digit controlled oscillator, thus realize utilizing the length logarithm of inherent delay The control code of control ring oscillator is finely adjusted, and eliminates technique, supply voltage, temperature further to the output of numerical control ring oscillator The impact of frequency, the output frequency precision and the reference frequency output that solve numerically controlled annular agitator of the prior art are limited Technical problem.Therefore, by the above embodiment of the present invention, can reach to improve the precision of numerically controlled annular agitator, improve numerical control The output frequency precision of agitator and frequency range, have the effect of the good suitability.
The invention described above embodiment sequence number, just to describing, does not represent the quality of embodiment.
In the above embodiment of the present invention, the description to each embodiment all emphasizes particularly on different fields, and does not has in certain embodiment The part described in detail, may refer to the associated description of other embodiments.
In several embodiments provided herein, it should be understood that disclosed technology contents, can be passed through other Mode realizes.Wherein, device embodiment described above is only schematically, the division of the most described unit, Ke Yiwei A kind of logic function divides, actual can have when realizing other dividing mode, the most multiple unit or assembly can in conjunction with or Person is desirably integrated into another system, or some features can be ignored, or does not performs.Another point, shown or discussed is mutual Between coupling direct-coupling or communication connection can be the INDIRECT COUPLING by some interfaces, unit or module or communication link Connect, can be being electrical or other form.
The described unit illustrated as separating component can be or may not be physically separate, shows as unit The parts shown can be or may not be physical location, i.e. may be located at a place, or can also be distributed to multiple On unit.Some or all of unit therein can be selected according to the actual needs to realize the purpose of the present embodiment scheme.
It addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, it is also possible to It is that unit is individually physically present, it is also possible to two or more unit are integrated in a unit.Above-mentioned integrated list Unit both can realize to use the form of hardware, it would however also be possible to employ the form of SFU software functional unit realizes.
If described integrated unit realizes and as independent production marketing or use using the form of SFU software functional unit Time, can be stored in a computer read/write memory medium.Based on such understanding, technical scheme is substantially The part that in other words prior art contributed or this technical scheme completely or partially can be with the form of software product Embodying, this computer software product is stored in a storage medium, including some instructions with so that a computer Equipment (can be for personal computer, server or the network equipment etc.) perform the whole of method described in each embodiment of the present invention or Part steps.And aforesaid storage medium includes: USB flash disk, read only memory (ROM, Read-Only Memory), random access memory are deposited Reservoir (RAM, Random Access Memory), portable hard drive, magnetic disc or CD etc. are various can store program code Medium.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For Yuan, under the premise without departing from the principles of the invention, it is also possible to make some improvements and modifications, these improvements and modifications also should It is considered as protection scope of the present invention.

Claims (17)

1. a numerically controlled annular agitator, it is characterised in that including:
Seniority top digit controlled oscillator;
Lower-order digit controlled oscillator, input is connected with the outfan of described seniority top digit controlled oscillator, outfan and described seniority top digit The input of controlled oscillator and the outfan of numerical control ring oscillator connect;
Wherein, the control code of described seniority top digit controlled oscillator is high-order control code, and the control code of described lower-order digit controlled oscillator is Low level control code.
Numerically controlled annular agitator the most according to claim 1, it is characterised in that described seniority top digit controlled oscillator includes:
Multi-stage cascade structure, wherein, described multi-stage cascade structure is connected, the input of first order cascade structure and described seniority top digit The input of controlled oscillator connects, and the outfan of afterbody cascade structure connects with the outfan of described seniority top digit controlled oscillator Connect.
Numerically controlled annular agitator the most according to claim 2, it is characterised in that every grade of cascade structure includes:
NAND gate, first input end is connected with described high-order control code, the second input and the input of described every grade of cascade structure End connects;
The standard delay unit of the first predetermined number, input is connected with the outfan of described NAND gate, wherein, described first pre- If the standard delay unit series connection of quantity, the quantity of the standard delay unit of described every grade of cascade structure is different;
MUX, first input end is connected with the outfan of the standard delay unit of described first predetermined number, and second is defeated Enter end is connected with the input of described every grade of cascade structure, control end with described a high position control code be connected, outfan and described often The outfan of level cascade structure connects.
Numerically controlled annular agitator the most according to claim 3, it is characterised in that described first predetermined number is such as purgation One: 16,32,64,128,256 and 512.
Numerically controlled annular agitator the most according to claim 1, it is characterised in that described lower-order digit controlled oscillator includes:
The standard delay unit of the second predetermined number, wherein, the standard delay unit series connection of described second predetermined number, first The input of standard delay unit is connected with the input of described lower-order digit controlled oscillator, last standard delay unit defeated Go out end to be connected with the outfan of described lower-order digit controlled oscillator;
Multiple three state buffers, wherein, the output of the standard delay unit of the input of each three state buffer and odd number number End connects, and outfan is connected with the outfan of described lower-order digit controlled oscillator, controls end and is connected with described low level control code.
Numerically controlled annular agitator the most according to claim 5, it is characterised in that described lower-order digit controlled oscillator also includes:
Multiple virtual devices, wherein, the input of each virtual device connects with the outfan of the standard delay unit of even number number Connecing, outfan is connected with the outfan of described lower-order digit controlled oscillator, controls end ground connection.
Numerically controlled annular agitator the most according to claim 5, it is characterised in that described second predetermined number is 15.
8. according to the numerically controlled annular agitator described in any one in claim 3 to 7, it is characterised in that described standard time delay Unit is NAND gate.
9. the control method of a numerically controlled annular agitator, it is characterised in that including:
Obtain the first control code of numerically controlled annular agitator;
Utilize inherent delay that described first control code is adjusted, obtain the second control code;
Described second control code is resolved into high-order control code and low level control code;
Described high-order control code is transmitted to seniority top digit controlled oscillator, and the transmission of described low level control code is vibrated to low level numerical control Device.
Method the most according to claim 9, it is characterised in that utilize inherent delay that described first control code is adjusted Whole, obtain the second control code, including:
From the beginning of the lowest order of described first control code, extract the first control code presetting figure place, obtain the 3rd control code;
Obtain the inherent delay corresponding with described 3rd control code;
According to described inherent delay and the time delay of standard delay unit, obtain the first quantity of standard delay unit;
Calculate described first control code and the difference of described first quantity, obtain described second control code.
11. methods according to claim 10, it is characterised in that obtain the inherent delay corresponding with described 3rd control code Including:
Described 3rd control code is converted to decimal number, obtains the second quantity of standard delay unit;
According to described second quantity, inquiry obtains described inherent delay.
12. methods according to claim 10, it is characterised in that according to prolonging of described inherent delay and standard delay unit Time, obtain the first quantity of standard delay unit, including:
Calculate the ratio of the time delay of described inherent delay and described standard delay unit, obtain described first quantity.
13. methods according to claim 9, it is characterised in that described second control code is resolved into high-order control code and Low level control code, including:
From the beginning of the highest order of described second control code, extract the second control code presetting figure place, obtain described high-order control code;
Other control codes in addition to described high-order control code in described second control code are converted into decimal number, obtain described Low level control code.
14. methods according to claim 9, it is characterised in that the first control code obtaining numerically controlled annular agitator includes:
Obtain the target frequency preset;
Calculate the ratio of the time delay of described target frequency and standard delay unit, obtain the 3rd quantity of standard delay unit;
Described 3rd quantity is converted to binary code, obtains described first control code.
15. methods according to claim 14, it is characterised in that described 3rd quantity is converted to binary code, obtains Described first control code, including:
Judge whether described 3rd quantity is even number;
In the case of described 3rd quantity is even number, described 3rd quantity is converted to odd number, and the 3rd number after processing Amount is converted to binary code, obtains described first control code;
In the case of described 3rd quantity is odd number, directly described 3rd quantity is converted to binary code, obtains described One control code.
16. methods according to claim 15, it is characterised in that described 3rd quantity is converted to odd number, including:
Described 3rd quantity is added one, obtains the 3rd quantity after described process.
The control device of 17. 1 kinds of numerically controlled annular agitators, it is characterised in that including:
Acquisition module, for obtaining the first control code of numerically controlled annular agitator;
Adjusting module, is used for utilizing inherent delay to be adjusted described first control code, obtains the second control code;
Decomposing module, for resolving into high-order control code and low level control code by described second control code;
Transport module, for transmitting described high-order control code to seniority top digit controlled oscillator, and transmits described low level control code To lower-order digit controlled oscillator.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110825347A (en) * 2018-08-09 2020-02-21 旺宏电子股份有限公司 Adjustable random number generation circuit and adjustable random number generation method
CN112615589A (en) * 2020-12-15 2021-04-06 海光信息技术股份有限公司 Method and device for adjusting frequency of ring oscillator, storage medium and equipment

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6259330B1 (en) * 1998-12-17 2001-07-10 Nec Corporation Ring oscillator having variable coarse and fine delays
US20110038451A1 (en) * 2009-08-14 2011-02-17 Taiwan Semiconductor Manufacturing Company, Ltd. Ultra high resolution timing measurement
CN104320136A (en) * 2014-11-04 2015-01-28 中国科学院微电子研究所 Clock signal generator realized by utilizing all-digital standard unit
CN104426542A (en) * 2013-08-19 2015-03-18 南亚科技股份有限公司 Delay line ring oscillation apparatus

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6259330B1 (en) * 1998-12-17 2001-07-10 Nec Corporation Ring oscillator having variable coarse and fine delays
US20110038451A1 (en) * 2009-08-14 2011-02-17 Taiwan Semiconductor Manufacturing Company, Ltd. Ultra high resolution timing measurement
CN104426542A (en) * 2013-08-19 2015-03-18 南亚科技股份有限公司 Delay line ring oscillation apparatus
CN104320136A (en) * 2014-11-04 2015-01-28 中国科学院微电子研究所 Clock signal generator realized by utilizing all-digital standard unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110825347A (en) * 2018-08-09 2020-02-21 旺宏电子股份有限公司 Adjustable random number generation circuit and adjustable random number generation method
CN110825347B (en) * 2018-08-09 2023-05-09 旺宏电子股份有限公司 Adjustable random number generation circuit and adjustable random number generation method
CN112615589A (en) * 2020-12-15 2021-04-06 海光信息技术股份有限公司 Method and device for adjusting frequency of ring oscillator, storage medium and equipment
CN112615589B (en) * 2020-12-15 2023-03-24 海光信息技术股份有限公司 Method and device for adjusting frequency of ring oscillator, storage medium and equipment

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