CN106206542A - Semiconductor vertical copper-connection is filled TSV structure and the forming method of organic polymer - Google Patents
Semiconductor vertical copper-connection is filled TSV structure and the forming method of organic polymer Download PDFInfo
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- CN106206542A CN106206542A CN201610579935.9A CN201610579935A CN106206542A CN 106206542 A CN106206542 A CN 106206542A CN 201610579935 A CN201610579935 A CN 201610579935A CN 106206542 A CN106206542 A CN 106206542A
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- copper
- organic polymer
- tsv structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Abstract
The invention provides the TSV structure filling organic polymer in a kind of semiconductor vertical copper-connection, including semiconductor substrate, described semiconductor substrate is provided with some blind holes or through hole, it is filled partially with copper plate in described blind hole or through hole, on described copper plate, chemical graft has organic polymer, is provided with micro convex point at the substrate surface achieving copper and organic polymer filling.Described forming method comprises the steps: to be placed in chemical plating fluid the semiconductor substrate with copper coating to carry out chemical graft, and the surface grafting at described copper coating goes out polymeric layer；After the front of semiconductor substrate is polished, sputter lower metal layer and copper seed layer；After the surface-coated photoresist of described copper seed layer, electroplate out micro convex point, finally remove photoresist.Compared with prior art, the present invention has following beneficial effect: the method that the present invention provides is simple, convenient, and manufacturing process requires low, can reduce process costs well.
Description
Technical field
The invention belongs to semiconductor manufacturing and Electronic Packaging field, be specifically related in a kind of semiconductor vertical copper-connection fill
The TSV structure of organic polymer and forming method.
Background technology
Being filled by the copper facing of quasiconductor via and realizing the encapsulation of 3D stacked electronic is the most important Electronic Packaging shape
Formula, but the via for big depth-to-width ratio is difficulty with zero defect copper facing filling.This is owing to traditional hole filling is to use to determine
The method of electric current, is susceptible to seal in advance phenomenon by the method, it is impossible to realizes good hole and fills, especially to big depth-to-width ratio
Via.Due to hole fill the gap caused of problem, hole can cause stress to concentrate, to product in the encapsulation process in later stage
Reliability causes harm greatly.
Although current method makes great progress in optimization hole filling problem, but for the most thorough
In solving hole, defect still suffers from problem.So, research and develop defect in a kind of new method avoids hole and be particularly important.The most complete
The quasiconductor via that copper facing is filled is filled organic polymer, on the one hand reduces the technological requirement of copper-plating technique, save work
Skill cost；On the other hand it can be avoided that defect in hole when copper facing is filled, follow-up encapsulation process plays thermal stress buffering
Effect.Thus the TSV structure filling organic polymer in realizing the quasiconductor via that copper facing is filled has major application valency
Value, can be widely used for various high-end electronic and manufactures field, be particularly applicable in the via of big depth-to-width ratio.
Summary of the invention
It is an object of the invention to provide TSV structure and the one-tenth filling organic polymer in a kind of semiconductor vertical copper-connection
Type method, to solve the problems referred to above in the presence of prior art.
The present invention is achieved by the following technical solutions:
First aspect, the invention provides the TSV structure filling organic polymer in a kind of semiconductor vertical copper-connection, bag
Including semiconductor substrate, wherein, described semiconductor substrate is provided with some blind holes or through hole, is partially filled with in described blind hole or through hole
Having copper plate, on described copper plate, chemical graft has organic polymer, sets at the substrate surface being filled with copper and organic polymer
There is micro convex point.Defect in hole when this structure can avoid copper facing to fill, plays the work of thermal stress buffering in follow-up encapsulation process
With；Being provided with micro convex point at the substrate surface being filled with copper and organic polymer, to realize 3D chip-stacked.
Preferably, the type of described semiconductor substrate is N-shaped or p-type.
Preferably, described semiconductor substrate is element semiconductor or compound semiconductor.
Preferably, the diameter of described blind hole or through hole is all less than 50 μm, and depth-to-width ratio is all less than 20:1.
Preferably, insulating barrier and barrier layer also it are sequentially provided with between described blind hole or through hole and copper plate.
Preferably, described micro convex point includes copper post and weld cap, by wiring between copper post, weld cap and TSV structure
Layer forms electrical property interconnection.The structure of wiring layer and formation mechenism refer to " RDL technique in the encapsulation of TSV three-dimensional systematic and
Design basis research ", Peking University's Master's thesis, 2012, author: Cui Qinghu.
Second aspect, present invention also offers and fill organic polymer in a kind of semiconductor vertical copper-connection as the aforementioned
The forming method of TSV structure, it comprises the steps:
The semiconductor substrate with copper coating is placed in chemical plating fluid and carries out chemical graft, on the surface of described copper coating
It is grafted out organic polymer layers；
After the front of semiconductor substrate is polished, sputter lower metal layer and copper seed layer；
After the surface-coated photoresist of described copper seed layer, electroplate out micro convex point, finally remove photoresist.
Preferably, described chemical plating fluid is the water containing surfactant, chelating agent, organic monomer and initiator
Solution, and the temperature of chemical plating fluid is less than 50 DEG C.
Semiconductor vertical copper interconnection technology is a kind of important Electronic Packaging form realizing 3-D stacks encapsulation.Partly leading
In the vertical copper interconnection technology of body, generally comprise the preparation of via, and the filling out of insulating barrier, barrier layer, Seed Layer and metallic copper
Fill.The 3-D stacks encapsulation commonly referred to as TSV (Through realized by the via on semiconductor substrate
Semiconductor via) technology.While realizing three-dimension packaging by TSV technology, substrate surface generally require prepare micro-
Salient point realizes the interconnection of upper and lower chip, and micro convex point forms electrical property with TSV structure by wiring layer and interconnects.
Compared with prior art, the present invention has a following beneficial effect:
1, the method that the present invention provides is simple, convenient, and manufacturing process requires low, can reduce process costs well；
2, in the quasiconductor blind hole realizing copper facing filling or through hole, fill the TSV structure of organic polymer, be possible not only to
Realize the superfill in the quasiconductor blind hole or through hole of copper facing filling, it is to avoid defect in hole when copper facing is filled, and permissible
The effect of buffering stress is played in package fabrication process；
3, the TSV knot filling organic polymer in the quasiconductor blind hole realizing copper facing filling or through hole that the present invention provides
Structure, simple, convenient, in Electronic Packaging field, there is great actual application value, be conducive to extensively utilizing, especially can realize
Application in the blind hole or through hole of big depth-to-width ratio.
Accompanying drawing explanation
By the detailed description non-limiting example made with reference to the following drawings of reading, the further feature of the present invention,
Purpose and advantage will become more apparent upon:
Fig. 1 is the schematic diagram of the TSV structure filling organic polymer in realizing the quasiconductor via that copper facing is filled.
In figure: 1, semiconductor substrate；2, insulating barrier；3, barrier layer；4, copper plate；5, organic polymer obturator；6, weldering
Cap.
Detailed description of the invention
Below in conjunction with specific embodiment, the present invention is described in detail.Following example will assist in the technology of this area
Personnel are further appreciated by the present invention, but limit the present invention the most in any form.It should be pointed out that, the ordinary skill to this area
For personnel, without departing from the inventive concept of the premise, it is also possible to make some deformation and improvement.These broadly fall into the present invention
Protection domain.
A kind of TSV knot filling organic polymer in realizing the quasiconductor via that copper facing is filled that the present invention provides
Structure, as shown in Figure 1 a or 1b, including semiconductor substrate 1, semiconductor substrate 1 is provided with some blind holes or through hole, blind hole or logical
Being filled with insulating barrier 2 and barrier layer 3 in hole, the surface portion on barrier layer 3 is filled with copper plate 4, and the surface of copper plate 4 is filled with
Polymeric layer 5, the front of semiconductor substrate 1 is provided with weld cap 6.
Embodiment 1
The present embodiment relates to the TSV structure filling organic polymer in a kind of semiconductor vertical copper-connection, and concrete steps are such as
Under:
Step (1): in p-type, resistivity is 5 Ω cm, and in the silicon chip with silicon through hole, copper is filled out in plating, but not exclusively fills out
Full, then the silicon chip that incomplete copper facing is filled is put into and acetone, ethanol carry out oil removal treatment, then pickling removes matrix surface
Oxide, finally with pure water, matrix surface is rinsed well；
Step (2): being put in the aqueous phase solution configured by the silicon chip after step (1) processes and react, its component is
The dodecyl sodium sulfate of 0.01g/mL, the acrylic acid of 6% volume fraction, the pyrazoles diazonium inner salt of 0.002g/mL, 0.01g/mL
EDTA-2Na；
Step (3): the sample after reaction a period of time is taken out, measures the organic thickness of section；
Step (4): adjust the response time according to the thickness in step (3), repeats step (1)～(3) so that at Copper substrate
The Organic substance of upper deposition can fill defect in hole；
Step (5): the silicon chip after processing chemically-mechanicapolish polishes in base material front, then gold under its surface sputters
Belong to layer and copper seed layer；
Step (6): the sample coating photoresist after above-mentioned steps being completed, is allowed to graphical；Then micro convex point is electroplated；?
Rear removal photoresist.
Embodiment 2
The present embodiment relates to the TSV structure filling organic polymer in a kind of semiconductor vertical copper-connection, and concrete steps are such as
Under:
Step (1): at N-shaped, resistivity is 50 Ω cm, electroplates and fill out copper in the GaAs sheet with via, but not exclusively
Filling up, then put into by the GaAs sheet that incomplete copper facing is filled and carry out oil removal treatment in acetone, ethanol, then pickling removes matrix
The oxide on surface, finally rinses well matrix surface with pure water；
Step (2): being put in the aqueous phase solution configured by the GaAs sheet after step (1) processes and react, component is
The dodecyl sodium sulfate of 1g/mL, the acrylic acid of 6% volume fraction, the triptycene diazol of 0.002g/mL, 0.01g/mL's
EDTA-2Na；
Step (3): the sample after reaction a period of time is taken out, measures the organic thickness of section；
Step (4): adjust the response time according to the thickness in step (3), repeats step (1)～(3) so that at Copper substrate
The Organic substance of upper deposition can fill defect in hole；
Step (5): the GaAs sheet after processing chemically-mechanicapolish polishes in base material front, then under its surface sputters
Metal level and copper seed layer；
Step (6): the sample coating photoresist after above-mentioned steps being completed, is allowed to graphical；Then micro convex point is electroplated；?
Rear removal photoresist.
Comparative example 1
The present embodiment relates to the TSV structure filling organic polymer in a kind of semiconductor vertical copper-connection, and concrete steps are such as
Under:
By p-type, resistivity is 5 Ω cm, have been carried out in silicon through hole incomplete copper facing fill silicon chip put into acetone,
Carrying out oil removal treatment in ethanol, then pickling removes the oxide of matrix surface, is finally rinsed well by matrix surface with pure water；
Silicon chip after cleaning irrigates Organic substance.Owing to Organic substance has certain viscosity, and Organic substance is bad to the wettability of silicon chip,
Thus cannot realize aperture is filled up completely with, the most also cannot realize filling in realizing the quasiconductor via that copper facing is filled
The TSV structure of organic polymer.
Comparative example 2
The present embodiment relates to the TSV structure filling organic polymer in a kind of semiconductor vertical copper-connection, and concrete steps are such as
Under:
Step (1) is in p-type, and resistivity is 5 Ω cm, fills out copper with plating in the silicon chip in silicon through hole, but not exclusively fills out
Full, then the silicon chip that incomplete copper facing is filled is put into and acetone, ethanol carry out oil removal treatment, then pickling removes matrix surface
Oxide, finally with pure water, matrix surface is rinsed well；
Silicon chip after step (2) will be cleaned is put in the aqueous solution configured, and its component is the dodecyl of 0.01g/mL
Sodium sulfonate, the methyl methacrylate of 6% volume fraction, the pyrazoles diazonium inner salt of 0.002g/mL, the EDTA-of 0.01g/mL
2Na；
Sample after reaction a period of time is taken out by step (3), measures the organic thickness of section, it is found that this
Planting chemical graft is uniform thickness at micropore sidewall and bottom, it is impossible to preferred growth bottom realization.Therefore the Organic substance filled cannot
Realize densification to grow completely, the most also cannot realize filling organic polymer in realizing the quasiconductor via that copper facing is filled
TSV structure.
Above the specific embodiment of the present invention is described.It is to be appreciated that the invention is not limited in above-mentioned
Particular implementation, those skilled in the art can make various deformation or amendment within the scope of the claims, this not shadow
Ring the flesh and blood of the present invention.
Claims (8)
1. filling a TSV structure for organic polymer in semiconductor vertical copper-connection, including semiconductor substrate, its feature exists
In, described semiconductor substrate is provided with some blind holes or through hole, is filled partially with copper plate, described plating in described blind hole or through hole
In layers of copper, chemical graft has organic polymer, is provided with micro convex point at the substrate surface achieving copper and organic polymer filling.
2. semiconductor vertical copper-connection as claimed in claim 1 is filled the TSV structure of organic polymer, it is characterised in that
The type of described semiconductor substrate is N-shaped or p-type.
3. filling the TSV structure of organic polymer in semiconductor vertical copper-connection as claimed in claim 1 or 2, its feature exists
In, described semiconductor substrate is element semiconductor or compound semiconductor.
4. semiconductor vertical copper-connection as claimed in claim 1 is filled the TSV structure of organic polymer, it is characterised in that
The diameter of described blind hole or through hole is all less than 50 μm, and depth-to-width ratio is all less than 20:1.
5. semiconductor vertical copper-connection as claimed in claim 1 is filled the TSV structure of organic polymer, it is characterised in that
Insulating barrier and barrier layer also it is sequentially provided with between described blind hole or through hole and copper plate.
6. semiconductor vertical copper-connection as claimed in claim 1 is filled the TSV structure of organic polymer, it is characterised in that
Described micro convex point includes copper post and weld cap, forms electrical property by wiring layer and interconnect between copper post, weld cap and TSV structure.
7. a semiconductor vertical copper-connection as claimed in claim 1 is filled the molding side of the TSV structure of organic polymer
Method, it is characterised in that comprise the steps:
The semiconductor substrate with copper coating is placed in chemical plating fluid and carries out chemical graft, at the surface grafting of described copper coating
Go out organic polymer layers；
After the front of semiconductor substrate is polished, sputter lower metal layer and copper seed layer；
After the surface-coated photoresist of described copper seed layer, electroplate out micro convex point, finally remove photoresist.
8. semiconductor vertical copper-connection as claimed in claim 7 is filled the forming method of the TSV structure of organic polymer, its
Being characterised by, described chemical plating fluid is the aqueous solution containing surfactant, chelating agent, organic monomer and initiator, and chemistry
The temperature of plating solution is less than 50 DEG C.
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Cited By (3)
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| CN111403345A (en) * | 2020-03-13 | 2020-07-10 | 长江存储科技有限责任公司 | Isolation guard ring, semiconductor structure and preparation method thereof |
| CN111480226A (en) * | 2020-03-03 | 2020-07-31 | 长江存储科技有限责任公司 | Protective structure in semiconductor chip and method for forming the same |
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