CN106202213A - A kind of FPGA binary file compression, decompressing method and compression, decompression device - Google Patents
A kind of FPGA binary file compression, decompressing method and compression, decompression device Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 230000006837 decompression Effects 0.000 title claims abstract description 24
- 238000003860 storage Methods 0.000 claims abstract description 56
- 230000006870 function Effects 0.000 claims description 29
- 230000009467 reduction Effects 0.000 claims description 8
- 238000000926 separation method Methods 0.000 claims description 8
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- G06F16/10—File systems; File servers
- G06F16/17—Details of further file system functions
- G06F16/174—Redundancy elimination performed by the file system
- G06F16/1744—Redundancy elimination performed by the file system using compression, e.g. sparse files
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Abstract
The present invention is applicable to FPGA technology field, it is provided that a kind of FPGA binary file compression, decompressing method and compression, decompression device, compression method includes: obtain FPGA binary file；The content of traversal FPGA binary file, classifies to content, it is determined that categorical data and the data field at categorical data place；Use the code storage mode that described data field is corresponding, code storage categorical data；According to universal compressed algorithm, to comentropy less than the categorical data of setting value, carry out reduced overall.Beneficial effects of the present invention is as follows: 1) analyze the construction features of FPGA binary file, FPGA binary file is divided into several certain types of data field.Different coded system compression storages is used for different data fields, greatly reduces file storage；2) using length, type, the mode of data value preserves, and for first compression, the application scenarios repeatedly decompressed is the most effective.Decompression speed is far longer than compression speed, improves decompression effect.
Description
Technical field
The invention belongs to FPGA technology field, particularly relate to the compression of a kind of FPGA binary file, decompressing method and compression,
Decompression device.
Background technology
Data compression refers on the premise of not losing useful information, and reduction data volume, to reduce memory space, improves it
Data or are reorganized by transmission, storage and treatment effeciency according to certain algorithm, reduce the redundancy of data and storage
A kind of technical method in space.Existing compression algorithm is with universal compressed as main flow, and LZMA, GZIP, RAR etc. are universal compressed
Algorithm.
But, current universal compressed algorithm, it is impossible to according to the data type of FPGA binary file, be optimized pressure
Contracting, is unfavorable for improving reduced overall ratio and overall compression performance.Its reason is, current universal compressed algorithm is all towards entirely
The data fields in portion, will not carry out special handling, therefore, the reduced overall ratio of FPGA binary file to FPGA binary file
The highest with overall compression performance.
Summary of the invention
The purpose of the embodiment of the present invention is to provide a kind of FPGA binary file compression method, it is intended to solve current leading to
By compression algorithm, it is impossible to according to the data type of FPGA binary file, be optimized compression, it is unfavorable for improving reduced overall ratio
Problem with overall compression performance.
The embodiment of the present invention is achieved in that a kind of FPGA binary file compression method, including:
Obtain FPGA binary file；
The content of traversal FPGA binary file, classifies to content, it is determined that categorical data and categorical data place
Data field；
Use the code storage mode that described data field is corresponding, code storage categorical data；
According to universal compressed algorithm, to comentropy less than the categorical data of setting value, carry out reduced overall.
The another object of the embodiment of the present invention is to provide a kind of FPGA binary file decompressing method, including:
According to general decompression algorithm, to comentropy less than the categorical data of setting value, carry out overall decompression；
The code storage mode that described data field is corresponding, decoding is used to store the data in described data field；
According to categorical data and the data field at categorical data place, the content of classification is reduced, is traveled through
The content of FPGA binary file；
According to the content obtained, reduction FPGA binary file.
The another object of the embodiment of the present invention is to provide a kind of FPGA binary file compressor, including:
FPGA binary file acquisition module, is used for obtaining FPGA binary file；
Determination module, for traveling through the content of FPGA binary file, classifies to content, it is determined that categorical data and
The data field at categorical data place；
Code storage module, is used for the code storage mode using described data field corresponding, code storage categorical data；
Compression module, for according to universal compressed algorithm, to comentropy less than the categorical data of setting value, carrying out overall pressure
Contracting.
The another object of the embodiment of the present invention is to provide a kind of FPGA binary file decompression device, including:
Global solution die block, for according to general decompression algorithm, to comentropy less than the categorical data of setting value, carrying out whole
Body decompresses；
Decoder module, is used for the code storage mode using described data field corresponding, and decoding stores in described data field
Data；
Content recovery module, for according to categorical data and the data field at categorical data place, entering the content of classification
Row reduction, obtains traveling through the content of FPGA binary file；
FPGA binary file recovery module, for according to the content obtained, reduction FPGA binary file
In embodiments of the present invention, the content of traversal FPGA binary file, content is classified, it is determined that categorical data
And the data field at categorical data place；Use the code storage mode that described data field is corresponding, code storage categorical data；Root
According to universal compressed algorithm, to comentropy less than the categorical data of setting value, carry out reduced overall.Therefore solve current general
Compression algorithm, it is impossible to according to the data type of FPGA binary file, be optimized compression, be unfavorable for improve reduced overall than and
The problem of overall compression performance.It has the beneficial effects that following two aspects, and details are as follows:
1) analyze the construction features of FPGA binary file, FPGA binary file is divided into several certain types of data
District.Different coded system compression storages is used for different data fields, greatly reduces file storage；
2) using length, type, the mode of data value preserves, and for first compression, the application scenarios repeatedly decompressed is special
Effectively.Decompression speed is far longer than compression speed, improves decompression effect.
Accompanying drawing explanation
Fig. 1 is the flowchart of the FPGA binary file compression method that the embodiment of the present invention provides；
Fig. 2 is the flowchart of FPGA binary file compression method step S102 that the embodiment of the present invention provides；
Fig. 3 is the flowchart of FPGA binary file compression method step S103 that the embodiment of the present invention provides；
Fig. 4 is the flowchart of the FPGA binary file decompressing method that the embodiment of the present invention provides；
Fig. 5 is that the embodiment of the present invention describes FPGA binary file compression method, preferable enforcement in actual applications
Flow chart；
Fig. 6 is the structured flowchart of the FPGA binary file compressor that the embodiment of the present invention provides；
Fig. 7 is the structured flowchart of the FPGA binary file decompression device that the embodiment of the present invention provides.
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, right
The present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, and
It is not used in the restriction present invention.
Embodiment one
Fig. 1 is the flowchart of the FPGA binary file compression method that the embodiment of the present invention provides, and details are as follows:
In step S101, obtain FPGA binary file；
In step s 102, traversal FPGA binary file content, content is classified, it is determined that categorical data and
The data field at categorical data place；
Wherein, described data field includes: fixed data district, repetition data field, sparse data district and random data district；
Fixed data district is: the data field that each FPGA binary file is total；
Repeating data field is: storage full 0 or the data field of complete 1；
Sparse data district is: the data field of storage nybble data；
Random data district is: the data field of storage random data.
In step s 103, the code storage mode that described data field is corresponding, code storage categorical data are used；
In step S104, according to universal compressed algorithm, to comentropy less than the categorical data of setting value, carry out overall pressure
Contracting.
Piecemeal follows following several principles during dividing:
The greatest length of each piecemeal is 0x0FFF.
(A) .bit30-bit31 position is used for representing piecemeal type；
00: fixed data district；
01: repeat data field；
10: sparse data district；
11: random data district.
(B) .bit28-bit29 position is for representing the length 00 of data cell:
Data in units of a byte；
01: the data in units of two bytes；
10: the data in units of four bytes；
11: the data in units of eight bytes, it is used for representing that the data cell of sparse data district and repetition data field is big
Little.
Order discharge between piecemeal and piecemeal, all piecemeals are according to relative position calculation.
In embodiments of the present invention, having the beneficial effects that following two aspects, details are as follows:
1) analyze the construction features of FPGA binary file, FPGA binary file is divided into several certain types of data
District.Different coded system compression storages is used for different data fields, greatly reduces file storage；
2) using length, type, the mode of data value preserves, and for first compression, the application scenarios repeatedly decompressed is special
Effectively.Decompression speed is far longer than compression speed, improves decompression effect.
Embodiment two
Fig. 2 is the flowchart of FPGA binary file compression method step S102 that the embodiment of the present invention provides, in detail
State as follows:
In step s 201, the content of FPGA binary file is traveled through；
In step S202, according to content and the pre-configured data field decision-making function of traversal, content is classified,
Judge categorical data and the data field at categorical data place.
Embodiment three
The flowchart of the configuration data field decision-making function that the embodiment of the present invention describes, details are as follows:
Configuration data field decision-making function, described configuration data field decision-making function, specifically include:
Configuration repetition data field, sparse data district, the decision-making function in random data district:
With single byte for unit Data duplication, with double byte for unit Data duplication, with nybble for unit Data duplication
Data field, and the regional determination continuing the first set point attaches most importance to complex data district.
In units of nybble, 3 high-order bytes keep constant, the 4th byte data change, and continue in a big way
Regional determination be sparse data district；
There is no rule beyond both the above, or repeat data and the district of sparse data duration ranges the second set point
Territory, it is determined that for random data district；
Configuration sparse data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the sparse data setting quantity, preferentially according to the mode in sparse data district
Storage；
When the size in sparse data district is more than fixed value N, and being more than of sparse data district repeats the 30% of data, then
Sparse data district is not stored with repeating data separation；
Configuration random data district and the decision-making function in sparse data district:
Liang Ge sparse data district sandwich, less than the random data of setting quantity, is converted into sparse data random data
Mode store.
When the size in random data district is more than fixed value N, then random data district is stored with sparse data differentiation.
Configuration random data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the random data setting quantity, random data are converted into sparse data
Mode store.
When the size in random data district is more than fixed value N, then random data district is stored with repeating data separation.
Embodiment four
Fig. 3 is the flowchart of FPGA binary file compression method step S103 that the embodiment of the present invention provides, in detail
State as follows:
In step S301, when described data field is fixed data district, do not process；
In step s 302, when complex data district is attached most importance in described data field, repeat data field according to repetition flag mark
Position, length, and the data content repeated；
In step S303, when described data field is sparse data district, saves three bytes of beginning, only preserve last
Individual byte, according to sparse mark the mark position in sparse data district, length；
In step s 304, when described data field is random data district, according to random data mark, identify random data
Zone position, length.
Embodiment five
Fig. 4 is the flowchart of the FPGA binary file decompressing method that the embodiment of the present invention provides, and details are as follows:
In step S401, according to general decompression algorithm, to comentropy less than the categorical data of setting value, carry out global solution
Pressure；
In step S402, the code storage mode that described data field is corresponding, decoding is used to store in described data field
Data；
In step S403, according to categorical data and the data field at categorical data place, the content of classification is carried out also
Former, obtain traveling through the content of FPGA binary file；
In step s 404, according to the content obtained, reduction FPGA binary file.
Embodiment six
Fig. 5 is that the embodiment of the present invention describes FPGA binary file compression method, preferable enforcement in actual applications
Flow chart, details are as follows:
Read FPGA binary file；
Scanning file, to Block Sort；
Data block category merger and adjustment；
Each Block Sort code storage；
Newly-generated file calls the universal compressed compression algorithm of LZMA.
Embodiment seven
Fig. 6 is the structured flowchart of the FPGA binary file compressor that the embodiment of the present invention provides, and this device can be transported
Row is in electronic equipment.For convenience of description, illustrate only part related to the present embodiment.
FPGA binary file acquisition module 61, is used for obtaining FPGA binary file；
Determination module 62, for traveling through the content of FPGA binary file, classifies to content, it is determined that categorical data with
And the data field at categorical data place；
Code storage module 63, is used for the code storage mode using described data field corresponding, code storage categorical data；
Compression module 64, for according to universal compressed algorithm, to comentropy less than the categorical data of setting value, carrying out entirety
Compression.
As a kind of implementation of the present embodiment, in described FPGA binary file compressor, described judgement mould
Block, including:
Traversal Unit, for traveling through the content of FPGA binary file；
Identifying unit, for the content according to traversal and pre-configured data field decision-making function, classifies to content,
Judge categorical data and the data field at categorical data place.
As a kind of implementation of the present embodiment, in described FPGA binary file compressor, described drafting is controlled
Preparative layer transfer module, also includes:
Described FPGA binary file compression method, also includes:
Configuration data field decision-making function, described configuration data field decision-making function, specifically include:
Configuration repetition data field, sparse data district, the decision-making function in random data district:
With single byte for unit Data duplication, with double byte for unit Data duplication, with nybble for unit Data duplication
Data field, and the regional determination continuing the first set point attaches most importance to complex data district.
In units of nybble, 3 high-order bytes keep constant, the 4th byte data change, and continue in a big way
Regional determination be sparse data district；
There is no rule beyond both the above, or repeat data and the district of sparse data duration ranges the second set point
Territory, it is determined that for random data district；
Configuration sparse data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the sparse data setting quantity, preferentially according to the mode in sparse data district
Storage；
When the size in sparse data district is more than fixed value N, and being more than of sparse data district repeats the 30% of data, then
Sparse data district is not stored with repeating data separation；
Configuration random data district and the decision-making function in sparse data district:
Liang Ge sparse data district sandwich, less than the random data of setting quantity, is converted into sparse data random data
Mode store.
When the size in random data district is more than fixed value N, then random data district is stored with sparse data differentiation.
Configuration random data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the random data setting quantity, random data are converted into sparse data
Mode store.
When the size in random data district is more than fixed value N, then random data district is stored with repeating data separation.
As a kind of implementation of the present embodiment, in described FPGA binary file compressor, described coding is deposited
Storage module includes:
Fixed data district code storage unit, for when described data field is fixed data district, does not processes；
Repeat data field code storage unit, for when complex data district is attached most importance in described data field, according to repetition flag mark
The position in weight sensing complex data district, length, and the data content repeated；
Sparse data district code storage unit, for when described data field is sparse data district, saves three words of beginning
Joint, only preserves last byte, according to sparse mark the mark position in sparse data district, length；
Random data district code storage unit, for when described data field is random data district, according to random data mark
Will, identifies random data zone position, length.
The device that the embodiment of the present invention provides can be applied in the embodiment of the method for aforementioned correspondence, and implementation process details are joined
See the description of above-described embodiment, do not repeat them here.
Embodiment nine
Fig. 7 is the structured flowchart of the FPGA binary file decompression device that the embodiment of the present invention provides, and this device can be transported
Row is in electronic equipment.For convenience of description, illustrate only part related to the present embodiment.
Reference Fig. 7, this FPGA binary file decompression device, including:
Global solution die block 71, for according to general decompression algorithm, to comentropy less than the categorical data of setting value, carrying out
Overall decompression；
Decoder module 72, is used for the code storage mode using described data field corresponding, and decoding stores in described data field
Data；
Content recovery module 73, for according to categorical data and the data field at categorical data place, the content to classification
Reduce, obtain traveling through the content of FPGA binary file；
FPGA binary file recovery module 74, for according to the content obtained, reduction FPGA binary file.
The device that the embodiment of the present invention provides can be applied in the embodiment of the method for aforementioned correspondence, and implementation process details are joined
See the description of above-described embodiment, do not repeat them here.
Through the above description of the embodiments, those skilled in the art is it can be understood that can borrow to the present invention
The mode helping software to add required common hardware realizes.Described program can be stored in read/write memory medium, described
Storage medium, as random access memory, flash memory, read only memory, programmable read only memory, electrically erasable programmable storage
Device, depositor etc..This storage medium is positioned at memorizer, and processor reads the information in memorizer, performs this in conjunction with its hardware
Method described in each embodiment bright.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto, and any
Those familiar with the art in the technical scope that the invention discloses, the change that can readily occur in or replacement, all answer
Contain within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with scope of the claims.
Claims (10)
1. a FPGA binary file compression method, it is characterised in that including:
Obtain FPGA binary file；
The content of traversal FPGA binary file, classifies to content, it is determined that categorical data and the number at categorical data place
According to district；
Use the code storage mode that described data field is corresponding, code storage categorical data；
According to universal compressed algorithm, to comentropy less than the categorical data of setting value, carry out reduced overall.
2. FPGA binary file compression method as claimed in claim 1, it is characterised in that described traversal FPGA binary system literary composition
The content of part, classifies to content, it is determined that categorical data and the data field at categorical data place, particularly as follows:
The content of traversal FPGA binary file；
According to traversal content and pre-configured data field decision-making function, content is classified, it is determined that categorical data and
The data field at categorical data place.
3. the FPGA binary file compression method as described in claim 1 to 2 is arbitrary, it is characterised in that described FPGA bis-enters
File compression method processed, also includes:
Configuration data field decision-making function, described configuration data field decision-making function, specifically include:
Configuration repetition data field, sparse data district, the decision-making function in random data district:
With single byte for unit Data duplication, with double byte for unit Data duplication, the number being unit Data duplication with nybble
According to district, and the regional determination continuing the first set point is attached most importance to complex data district；
In units of nybble, 3 high-order bytes keep constant, the 4th byte data change, and continue large range of district
Territory is judged to sparse data district；
There is no rule beyond both the above, or repeat data and the region of sparse data duration ranges the second set point, sentence
It is set to random data district；
Configuration sparse data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the sparse data setting quantity, preferentially deposit according to the mode in sparse data district
Storage；
When the size in sparse data district is more than fixed value N, and being more than of sparse data district repeats the 30% of data, then dilute
Dredge data field and do not store with repeating data separation；
Configuration random data district and the decision-making function in sparse data district:
Liang Ge sparse data district sandwich, less than the random data of setting quantity, is converted into random data the side of sparse data
Formula stores；
When the size in random data district is more than fixed value N, then random data district is stored with sparse data differentiation；
Configuration random data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the random data setting quantity, random data are converted into the side of sparse data
Formula stores；
When the size in random data district is more than fixed value N, then random data district is stored with repeating data separation.
4. FPGA binary file compression method as claimed in claim 1, it is characterised in that the described data field pair of described employing
The code storage mode answered, code storage categorical data, particularly as follows:
When described data field is fixed data district, do not process；
When complex data district is attached most importance in described data field, repeat the position of data field, length according to repetition flag mark, and repeat
Data content；
When described data field is sparse data district, saves three bytes of beginning, only preserve last byte, according to sparse mark
Will the mark position in sparse data district, length；
When described data field is random data district, according to random data mark, identify random data zone position, length.
5. a FPGA binary file decompressing method, it is characterised in that including:
According to general decompression algorithm, to comentropy less than the categorical data of setting value, carry out overall decompression；
The code storage mode that described data field is corresponding, decoding is used to store the data in described data field；
According to categorical data and the data field at categorical data place, the content of classification is reduced, obtain traveling through FPGA bis-
The content of binary file；
According to the content obtained, reduction FPGA binary file.
6. a FPGA binary file compressor, it is characterised in that including:
FPGA binary file acquisition module, is used for obtaining FPGA binary file；
Determination module, for traveling through the content of FPGA binary file, classifies to content, it is determined that categorical data and classification
The data field at data place；
Code storage module, is used for the code storage mode using described data field corresponding, code storage categorical data；
Compression module, for according to universal compressed algorithm, to comentropy less than the categorical data of setting value, carrying out reduced overall.
7. FPGA binary file compressor as claimed in claim 6, it is characterised in that described determination module, including:
Traversal Unit, for traveling through the content of FPGA binary file；
Identifying unit, for the content according to traversal and pre-configured data field decision-making function, classifies to content, it is determined that
Categorical data and the data field at categorical data place.
8. FPGA binary file compressor as described in claim 6 to 7 is arbitrary, it is characterised in that described drafting key-course
Transfer module, also includes:
Described FPGA binary file compression method, also includes:
Configuration data field decision-making function, described configuration data field decision-making function, specifically include:
Configuration repetition data field, sparse data district, the decision-making function in random data district:
With single byte for unit Data duplication, with double byte for unit Data duplication, the number being unit Data duplication with nybble
According to district, and the regional determination continuing the first set point is attached most importance to complex data district；
In units of nybble, 3 high-order bytes keep constant, the 4th byte data change, and continue large range of district
Territory is judged to sparse data district；
There is no rule beyond both the above, or repeat data and the region of sparse data duration ranges the second set point, sentence
It is set to random data district；
Configuration sparse data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the sparse data setting quantity, preferentially deposit according to the mode in sparse data district
Storage；
When the size in sparse data district is more than fixed value N, and being more than of sparse data district repeats the 30% of data, then dilute
Dredge data field and do not store with repeating data separation；
Configuration random data district and the decision-making function in sparse data district:
Liang Ge sparse data district sandwich, less than the random data of setting quantity, is converted into random data the side of sparse data
Formula stores；
When the size in random data district is more than fixed value N, then random data district is stored with sparse data differentiation；
Configuration random data district and the decision-making function repeating data field:
Two are repeated data field sandwich less than the random data setting quantity, random data are converted into the side of sparse data
Formula stores；
When the size in random data district is more than fixed value N, then random data district is stored with repeating data separation.
9. FPGA binary file compressor as claimed in claim 6, it is characterised in that described code storage module includes:
Fixed data district code storage unit, for when described data field is fixed data district, does not processes；
Repeat data field code storage unit, for when complex data district is attached most importance in described data field, according to repetition flag mark weight
The position in complex data district, length, and the data content repeated；
Sparse data district code storage unit, for when described data field is sparse data district, saves three bytes of beginning, only
Preserve last byte, according to sparse mark the mark position in sparse data district, length；
Random data district code storage unit, for when described data field is random data district, according to random data mark, mark
Know random data zone position, length.
10. a FPGA binary file decompression device, it is characterised in that including:
Global solution die block, for according to general decompression algorithm, to comentropy less than the categorical data of setting value, carrying out global solution
Pressure；
Decoder module, is used for the code storage mode using described data field corresponding, and decoding stores the data in described data field；
Content recovery module, for according to categorical data and the data field at categorical data place, carrying out also the content of classification
Former, obtain traveling through the content of FPGA binary file；
FPGA binary file recovery module, for according to the content obtained, reduction FPGA binary file.
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| CN106909398A (en) * | 2017-03-10 | 2017-06-30 | 深圳创维－Rgb电子有限公司 | The compression method and device of a kind of executable file |
| CN110109896A (en) * | 2019-04-13 | 2019-08-09 | 成都飞机工业（集团）有限责任公司 | UAV flight parameter intelligence restoring method |
| CN110851409A (en) * | 2019-11-06 | 2020-02-28 | 南京星环智能科技有限公司 | Log compression and decompression method, device and storage medium |
| CN111427857A (en) * | 2020-04-01 | 2020-07-17 | 西安交通大学 | FPGA configuration file compression and decompression method based on partition reference technology |
| CN112260694A (en) * | 2020-09-21 | 2021-01-22 | 广州中望龙腾软件股份有限公司 | Data compression method of simulation file |
| CN113010355A (en) * | 2021-02-20 | 2021-06-22 | 山东英信计算机技术有限公司 | RISC-V system verification method and device based on FPGA and electronic equipment |
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| CN115499016A (en) * | 2022-11-15 | 2022-12-20 | 中科声龙科技发展（北京）有限公司 | Method, device and equipment for processing data based on binary system and storage medium |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106909398A (en) * | 2017-03-10 | 2017-06-30 | 深圳创维－Rgb电子有限公司 | The compression method and device of a kind of executable file |
| CN106909398B (en) * | 2017-03-10 | 2020-10-16 | 深圳创维－Rgb电子有限公司 | Compression method and device for executable file |
| CN110109896A (en) * | 2019-04-13 | 2019-08-09 | 成都飞机工业（集团）有限责任公司 | UAV flight parameter intelligence restoring method |
| CN110109896B (en) * | 2019-04-13 | 2021-12-10 | 成都飞机工业（集团）有限责任公司 | UAV flight parameter intelligent reduction method |
| CN110851409A (en) * | 2019-11-06 | 2020-02-28 | 南京星环智能科技有限公司 | Log compression and decompression method, device and storage medium |
| CN111427857A (en) * | 2020-04-01 | 2020-07-17 | 西安交通大学 | FPGA configuration file compression and decompression method based on partition reference technology |
| CN111427857B (en) * | 2020-04-01 | 2022-10-25 | 西安交通大学 | FPGA configuration file compression and decompression method based on partition reference technology |
| CN112260694A (en) * | 2020-09-21 | 2021-01-22 | 广州中望龙腾软件股份有限公司 | Data compression method of simulation file |
| CN113010355A (en) * | 2021-02-20 | 2021-06-22 | 山东英信计算机技术有限公司 | RISC-V system verification method and device based on FPGA and electronic equipment |
| CN114168085A (en) * | 2021-12-16 | 2022-03-11 | 潍柴动力股份有限公司 | Variable processing method, device, equipment and storage medium |
| CN114168085B (en) * | 2021-12-16 | 2024-02-20 | 潍柴动力股份有限公司 | Variable processing method, device, equipment and storage medium |
| CN115499016A (en) * | 2022-11-15 | 2022-12-20 | 中科声龙科技发展（北京）有限公司 | Method, device and equipment for processing data based on binary system and storage medium |
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