CN106200744A - The mu balanced circuit preventing startup electric voltage exception of power management chip - Google Patents
The mu balanced circuit preventing startup electric voltage exception of power management chip Download PDFInfo
- Publication number
- CN106200744A CN106200744A CN201610754567.7A CN201610754567A CN106200744A CN 106200744 A CN106200744 A CN 106200744A CN 201610754567 A CN201610754567 A CN 201610754567A CN 106200744 A CN106200744 A CN 106200744A
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- resistance
- comparator
- outfan
- balanced circuit
- circuit
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/562—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices with a threshold detection shunting the control path of the final control device
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
- Control Of Voltage And Current In General (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
nullThe present invention provides the mu balanced circuit preventing from starting electric voltage exception of a kind of power management chip，Mu balanced circuit includes OR circuit、Multiplexer、Operational amplifier、First comparator and the second comparator，The first input end of multiplexer is used for receiving startup voltage，The outfan of operational amplifier connects the normal phase input end of the first comparator by the first bleeder circuit，The inverting input of the first comparator receives the first reference voltage，The normal phase input end of the second comparator is for receiving one second reference voltage，The inverting input of the first comparator is also connected with the second input of multiplexer，First input end connects the inverting input of the second comparator，The selection that the outfan of described first comparator is connected described multiplexer with the outfan of described second comparator by described OR circuit controls end，The outfan of described multiplexer is for occurring extremely exporting described first reference voltage after being less than described second reference voltage at described startup voltage.
Description
Technical field
The present invention relates to field of power supplies, particularly relate to the voltage stabilizing electricity preventing from starting electric voltage exception of a kind of power management chip
Road.
Background technology
Power management chip is very important chip in electronic equipment, and power management chip is carried on a shoulder pole in electronic apparatus system
Shoulder the conversion to electric energy, distribute, detect and the responsibility of other electric energy management, but test before dispatching from the factory at some power supply chip
During there will be poor starting at low temperatures, trace it to its cause, be because under startup suppresses and can become at low temperatures, and start electricity
Pressing and connected a startup resistance by current source and produce, starting resistance resistance at low temperatures can diminish, and causes startup voltage
Diminish, thus the voltage causing power management chip to export does not reaches test request.
Summary of the invention
For overcoming the deficiencies in the prior art, the present invention provide a kind of power management chip prevent start electric voltage exception steady
Volt circuit.
The present invention provides the mu balanced circuit preventing from starting electric voltage exception of a kind of power management chip, described mu balanced circuit bag
Including an OR circuit, a multiplexer, an operational amplifier, one first comparator and one second comparator, described multichannel is multiple
With a first input end of device for receiving a startup voltage, the outfan of described multiplexer connects described operational amplifier
Normal phase input end, the outfan of described operational amplifier by one first bleeder circuit connect described first comparator positive
Input, the inverting input of described first comparator receives one first reference voltage, the positive input of described second comparator
End is for receiving one second reference voltage, and the inverting input of described first comparator is also connected with the one the of described multiplexer
Two inputs, described first input end connects the inverting input of described second comparator, the outfan of described first comparator
The selection being connected described multiplexer by described OR circuit with the outfan of described second comparator controls end, described many
The outfan of path multiplexer for described startup voltage occur abnormal and less than described second reference voltage after export described the
One reference voltage.
Further, described mu balanced circuit also includes a current source, and described current source is by a startup resistance eutral grounding, described
Start resistance and connect one end described first input end of connection of described current source to export described startup voltage.
Further, described mu balanced circuit also includes a band gap reference, and described band gap reference connects described first ratio
The inverting input of relatively device and be used for exporting described first reference voltage.
Further, the inverting input of described first comparator is compared by one second bleeder circuit connection described first
The normal phase input end of device, described second reference voltage is obtained by described first reference voltage dividing potential drop.
Further, described second bleeder circuit includes one first resistance and one second resistance, the one of described first resistance
End connects the inverting input of described first comparator, and the other end of described first resistance passes through described second resistance eutral grounding, institute
The other end stating the first resistance is also connected with the normal phase input end of described second comparator.
Further, described first resistance with the resistance ratio of described second resistance is: 1:9.
Further, the outfan of described operational amplifier passes through a capacity earth.
Further, the outfan of described operational amplifier connects the anti-phase of described operational amplifier by one first resistance
Input, the inverting input of described operational amplifier passes through one second resistance eutral grounding, described first resistance and described second electricity
The resistance ratio of resistance is 4:1.
Further, described first bleeder circuit includes the first resistance and one second resistance, one end of described first resistance
Connect the outfan of described operational amplifier, the other end of described first resistance pass through described second resistance eutral grounding, described first
The other end of resistance is also connected with the normal phase input end of described first comparator.
Further, described first resistance with the resistance ratio of described second resistance is: 2.8:1.
In the present invention, the outfan of described multiplexer is for occurring extremely being less than described at described startup voltage
Described first reference voltage is exported, so that op-amp output voltage is starting voltage appearance extremely after second reference voltage
Time can keep stable.
Accompanying drawing explanation
Fig. 1 is the circuit connection diagram preventing from starting the mu balanced circuit of electric voltage exception of power management chip of the present invention.
Detailed description of the invention
Below, in conjunction with accompanying drawing, various embodiments of the present invention will be described in detail.
Refer to Fig. 1, the mu balanced circuit better embodiment preventing startup electric voltage exception of power management chip of the present invention
Compare including OR circuit 10, multiplexer MUX, an operational amplifier OP, one first comparator COMP1 and one second
One first input end (0) of device COMP2, described multiplexer MUX is for receiving a startup voltage Vstarup, described multichannel is multiple
Connect the normal phase input end of described operational amplifier OP with the outfan of device MUX, the outfan of described operational amplifier OP passes through
One first bleeder circuit 70 connects the normal phase input end of described first comparator COMP1, and described first comparator COMP1's is anti-phase
Input receives one first reference voltage, and the normal phase input end of described second comparator COMP2 is for receiving one second with reference to electricity
Pressure, the inverting input of described first comparator COMP1 is also connected with one second input of described multiplexer MUX, described
First input end connects the inverting input of described second comparator COMP2, the outfan of described first comparator COMP1 and institute
The selection that the outfan stating the second comparator COMP2 connects described multiplexer MUX by described OR circuit 10 controls end.
Described first bleeder circuit 70 includes that one end of resistance R3 and resistance R4, described resistance R3 connects described computing and puts
The outfan of big device OP, the other end of described resistance R3 passes through described resistance R4 ground connection, and the other end of described resistance R3 is also connected with
The normal phase input end of described first comparator COMP1.Described resistance R3 with the resistance ratio of described resistance R4 is: 2.8:1.
Described mu balanced circuit also includes a current source 30, and described current source 30 is by a startup resistance RstarupGround connection is described
Start resistance RstarupThe one end connecting described current source 30 connects described first input end to export described startup voltage Vstarup。
Described mu balanced circuit also includes that a band gap reference 50, described band gap reference 50 connect described first comparator
The inverting input of COMP1 and be used for exporting described first reference voltage.In the present embodiment, described band gap reference 50 exports
The magnitude of voltage of the first reference voltage be 1.0V.
The inverting input of described first comparator COMP1 connects described first comparator by one second bleeder circuit 90
Normal phase input end, described second reference voltage is obtained by described first reference voltage dividing potential drop.
Described second bleeder circuit includes that one end of resistance R5 and resistance R6, described resistance R5 connects described first comparator
The inverting input of COMP1, the other end of described resistance R5 passes through described resistance R6 ground connection, and the other end of described resistance R5 also connects
Connect the normal phase input end of described second comparator COMP2.Described resistance R5 with the resistance ratio of described resistance R6 is: 1:9.
The outfan of described operational amplifier OP connects the inverting input of described operational amplifier OP, institute by resistance R1
The inverting input stating operational amplifier OP is 4 by the resistance ratio of resistance R2 ground connection, described resistance R1 and described resistance R2:
1。
Starting voltage VstarupUnder normal circumstances, voltage V is startedstarupMore than the second reference voltage (0.9V), the second ratio
Relatively device COMP2 output low level, the branch pressure voltage value of the voltage V1do of the outfan of described operational amplifier OP is more than the first ginseng
Examining voltage (1.0V), described first comparator COMP1 can export high level, after described OR circuit 10, and described multichannel
It is high level that the selection of multiplexer MUX controls end, and the voltage of described multiplexer MUX output is equal to the first reference voltage
(1.0V), the voltage V1do of the outfan of described operational amplifier OP is 5.0V, when described mu balanced circuit is positioned at low temperature, described
Start voltage VstarupLess than the second reference voltage (0.9V), after described OR circuit 10, described multiplexer MUX
Select that to control end be that described in high level, the voltage of multiplexer MUX output is equal to the first reference voltage (1.0V), therefore, nothing
It is the most abnormal that opinion starts voltage, and described mu balanced circuit can guarantee that the voltage V1do's of the outfan of described operational amplifier OP is steady
Qualitative.
Although illustrate and describing the present invention with reference to specific embodiment, but it should be appreciated by those skilled in the art that:
In the case of without departing from the spirit and scope of the present invention limited by claim and equivalent thereof, can carry out at this form and
Various changes in details.
Claims (10)
1. the mu balanced circuit preventing startup electric voltage exception of a power management chip, it is characterised in that: described circuit includes one
OR circuit, a multiplexer, an operational amplifier, one first comparator and one second comparator, described multiplexer
A first input end for receiving a startup voltage, the outfan of described multiplexer is just connecting described operational amplifier
Phase input, the positive that the outfan of described operational amplifier connects described first comparator by one first bleeder circuit inputs
End, the inverting input of described first comparator receives one first reference voltage, and the normal phase input end of described second comparator is used
In receiving one second reference voltage, it is one second defeated that the inverting input of described first comparator is also connected with described multiplexer
Entering end, described first input end connects the inverting input of described second comparator, the outfan of described first comparator and institute
The selection that the outfan stating the second comparator connects described multiplexer by described OR circuit controls end, and described multichannel is multiple
With the outfan of device for occurring extremely exporting described first ginseng after being less than described second reference voltage at described startup voltage
Examine voltage.
Mu balanced circuit the most according to claim 1, it is characterised in that described mu balanced circuit also includes a current source, described
Current source by one startup resistance eutral grounding, described startup resistance connect described current source one end connect described first input end with
Export described startup voltage.
Mu balanced circuit the most according to claim 1, it is characterised in that described mu balanced circuit also includes a band gap reference,
Described band gap reference connects the inverting input of described first comparator and is used for exporting described first reference voltage.
Mu balanced circuit the most according to claim 3, it is characterised in that the inverting input of described first comparator passes through one
Second bleeder circuit connects the normal phase input end of described first comparator, and described second reference voltage is by described first reference voltage
Dividing potential drop and obtain.
Mu balanced circuit the most according to claim 4, it is characterised in that described second bleeder circuit include one first resistance and
One second resistance, one end of described first resistance connects the inverting input of described first comparator, described first resistance another
Described second resistance eutral grounding is passed through in one end, and the other end of described first resistance is also connected with the positive input of described second comparator
End.
Mu balanced circuit the most according to claim 5, it is characterised in that described first resistance and the resistance of described second resistance
Ratio is: 1:9.
Mu balanced circuit the most according to claim 1, it is characterised in that the outfan of described operational amplifier passes through an electric capacity
Ground connection.
Mu balanced circuit the most according to claim 1, it is characterised in that the outfan of described operational amplifier passes through one first
Resistance connects the inverting input of described operational amplifier, and the inverting input of described operational amplifier is connect by one second resistance
Ground, described first resistance is 4:1 with the resistance ratio of described second resistance.
Mu balanced circuit the most according to claim 1, it is characterised in that described first bleeder circuit includes the first resistance and one
Second resistance, one end of described first resistance connects the outfan of described operational amplifier, and the other end of described first resistance leads to
Crossing described second resistance eutral grounding, the other end of described first resistance is also connected with the normal phase input end of described first comparator.
Mu balanced circuit the most according to claim 9, it is characterised in that described first resistance and the resistance of described second resistance
Value ratio is: 2.8:1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610754567.7A CN106200744B (en) | 2016-08-29 | 2016-08-29 | Power management chip prevent start electric voltage exception mu balanced circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610754567.7A CN106200744B (en) | 2016-08-29 | 2016-08-29 | Power management chip prevent start electric voltage exception mu balanced circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106200744A true CN106200744A (en) | 2016-12-07 |
| CN106200744B CN106200744B (en) | 2017-10-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610754567.7A Active CN106200744B (en) | 2016-08-29 | 2016-08-29 | Power management chip prevent start electric voltage exception mu balanced circuit |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102419608A (en) * | 2011-12-07 | 2012-04-18 | 西安启芯微电子有限公司 | Soft start circuit based on feedback voltage clamping soft start signal |
| US20130257403A1 (en) * | 2012-03-28 | 2013-10-03 | Anpec Electronics Corporation | Constant-On-Time Generation Circuit and Buck Converter |
| CN204031553U (en) * | 2014-08-21 | 2014-12-17 | 浙江东和电子科技有限公司 | A kind of LED drive circuit and soft starting circuit thereof |
| CN104821708A (en) * | 2015-05-13 | 2015-08-05 | 无锡芯朋微电子股份有限公司 | Circuit structure improving EFT noise immunity of primary-side feedback power supply system |
| CN104980012A (en) * | 2015-07-09 | 2015-10-14 | 成都智芯恒远电子科技有限公司 | Rapid soft-starting circuit |
-
2016
- 2016-08-29 CN CN201610754567.7A patent/CN106200744B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102419608A (en) * | 2011-12-07 | 2012-04-18 | 西安启芯微电子有限公司 | Soft start circuit based on feedback voltage clamping soft start signal |
| US20130257403A1 (en) * | 2012-03-28 | 2013-10-03 | Anpec Electronics Corporation | Constant-On-Time Generation Circuit and Buck Converter |
| CN204031553U (en) * | 2014-08-21 | 2014-12-17 | 浙江东和电子科技有限公司 | A kind of LED drive circuit and soft starting circuit thereof |
| CN104821708A (en) * | 2015-05-13 | 2015-08-05 | 无锡芯朋微电子股份有限公司 | Circuit structure improving EFT noise immunity of primary-side feedback power supply system |
| CN104980012A (en) * | 2015-07-09 | 2015-10-14 | 成都智芯恒远电子科技有限公司 | Rapid soft-starting circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106200744B (en) | 2017-10-27 |
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