CN106200055A - Array test circuit and liquid crystal display substrate - Google Patents

Array test circuit and liquid crystal display substrate Download PDF

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Publication number
CN106200055A
CN106200055A CN201610592389.2A CN201610592389A CN106200055A CN 106200055 A CN106200055 A CN 106200055A CN 201610592389 A CN201610592389 A CN 201610592389A CN 106200055 A CN106200055 A CN 106200055A
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CN
China
Prior art keywords
array test
holding wire
film transistor
tft
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610592389.2A
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Chinese (zh)
Inventor
洪光辉
龚强
陈归
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to CN201610592389.2A priority Critical patent/CN106200055A/en
Publication of CN106200055A publication Critical patent/CN106200055A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Liquid Crystal (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)

Abstract

The invention discloses a kind of array test circuit and liquid crystal display substrate, array test circuit includes: an array test enables signal pad, is electrically connected with array test and enables holding wire;One switching signal pad;Multiple switching tubes, first port of each switching tube is all electrically connected to array test and enables holding wire, second port of each switching tube is all electrically connected to switching signal pad, and the 3rd port of each switching tube is electrically connected with the multiplexer switch holding wire of display different colours pixel.By enabling signal as grid voltage with array test, and by the switching signal one point three of input, on the basis of not changing original layout cabling, only utilizing a switching signal pad just can realize simultaneously provides switching signal to MUX_R, MUX_G, MUX_B holding wire, reduce by two switching signal pads, save the space of upper side frame in panel, the quantity of input signal when the most effectively reducing array test.

Description

Array test circuit and liquid crystal display substrate
Technical field
The present invention relates to technical field of liquid crystal display, especially relate to one and can reduce array test circuit breaker in middle letter The array test circuit of number number of pads and liquid crystal display substrate.
Background technology
Liquid crystal display (Liquid Crystal Display, be called for short LCD) have that external form is light, thin, power consumption is few and The characteristics such as radiationless pollution, are therefore widely used in mobile phone, personal digital assistant (PDA), digital camera, notebook On the various portable electric appts such as computer, the trend of the even existing CRT monitor gradually replacing tradition desktop PC. Thin Film Transistor-LCD (Thin Film Transistor-Liquid Crystal Display is called for short TFT-LCD) Being the one of plurality of liquid crystals display, it uses thin-film transistor technologies to improve image quality.Array test (Array Test) Circuit, is a kind of circuit for the electrical situation in hot-wire array side in TFT-LCD array process, for the lifting of product yield Tool plays a very important role.Array test circuit is usually located at the top of display panels (Panel), by array test pad (Array Test pad) and multiplex accordingly selector (DEMUX) circuit composition.Switching signal pad (SW pad) is A part in array test pad, in the most conventional switching signal pad design scheme in array test circuit, be all Need three switching signal pads.
With reference to Fig. 1, existing array test circuit diagram.Three switching signal pads of needs in array test circuit SW1, SW2, SW3, array test pad also includes that array test enables signal pad ATP.When carrying out array test, by this Three switching signals pad SW1, SW2, SW3 give red pixel multiplexer switch holding wire MUX_R, green pixel multichannel respectively Multiplex switch holding wire MUX_G, blue pixel multiplexer switch holding wire MUX_B provide corresponding signal, and array test makes The holding wire ATEN corresponding signal of offer can be enabled by signal pad ATP to array test.Wherein, MUX_R refers to multichannel red The integrated a branch of red pixel multiplexer switch signal of pixel switch signal, MUX_G refers to multichannel green pixel switching signal Integrated a branch of green pixel multiplexer switch signal, MUX_B refers to integrated for multichannel blue pixel switching signal a branch of blueness Pixel multiplexer switch signal.Layout (Layout) space shared by each switching signal pad is relatively large, and During array test, the quantity of input signal is more, and in narrow frame panel designs, arrangement space is relatively limited.Therefore, battle array is reduced Row test circuit breaker in middle signal pad quantity is to save the space of upper side frame in display panels, it is achieved narrow frame design, It it is current problem demanding prompt solution.
Summary of the invention
It is an object of the invention to, it is provided that a kind of array test circuit and liquid crystal display substrate, survey by reducing array Examination circuit breaker in middle signal pad quantity is to save the space of upper side frame in display panels, it is achieved narrow frame design.
For achieving the above object, the invention provides a kind of array test circuit, including: an array test enables signal weldering Dish, is electrically connected with array test and enables holding wire;One switching signal pad;Multiple switching tubes, each described switching tube includes Single port, the second port and the 3rd port;First port of each described switching tube is all electrically connected to described array test to be made Energy holding wire, the second port of each described switching tube is all electrically connected to described switching signal pad, each described switching tube The 3rd port be electrically connected with display different colours pixel multiplexer switch holding wire.
For achieving the above object, present invention also offers a kind of liquid crystal display substrate, including at least one LCD Plate, described display panels is provided with array test circuit of the present invention.
It is an advantage of the current invention that by the enable signal inputted with array test enable signal pad as grid voltage, The switching signal one point three inputted by switching signal pad, on the basis of not changing original layout cabling, only utilizes one to open OFF signal pad just can realize providing switching signal to MUX_R, MUX_G, MUX_B holding wire simultaneously.Set compared to existing Meter, the circuit design that the present invention provides can reduce by two switching signal pads, save the space of upper side frame in panel, Improve the motility of panel peripheral circuits design, it is achieved narrow frame design;Simultaneously because during array test, it is only necessary to survey to array Examination enables signal pad ATP and switching signal pad SW input signal, the quantity of input signal when effectively reducing array test.
Accompanying drawing explanation
Fig. 1, existing array test circuit diagram;
Fig. 2, the circuit diagram shown in array test circuit one embodiment of the present invention.
Detailed description of the invention
The present invention proposes a kind of array test circuit that can reduce array test circuit breaker in middle signal pad quantity, On the premise of ensureing that array test normally works, it is possible to reduce two switching signal pads, save upper side frame in panel Space, improves the motility of panel peripheral circuits design, the quantity of input signal when simultaneously decreasing array test.This Bright described array test circuit includes: an array test enables signal pad, is electrically connected with array test and enables holding wire;One Switching signal pad;Multiple switching tubes, each switching tube includes the first port, the second port and the 3rd port;Each switching tube The first port be all electrically connected to array test enable holding wire, the second port of each switching tube all be electrically connected to switch Signal pad, the 3rd port of each switching tube is electrically connected with the multiplexer switch signal of display different colours pixel Line.
Wherein, when array test circuit works, it is that array test enable holding wire carries that array test enables signal pad For array test control signal, switching signal pad is respectively the multiplexing showing different colours pixel by multiple switching tubes Switch signal line provides array test switching signal.Particularly, array test control signal is constant voltage high level signal, and array is surveyed Runin OFF signal is constant voltage low level signal.
Owing to when array test, MUX_R, MUX_G, MUX_B holding wire is all to constant voltage low level (VGL), and ATEN letter Number line is always to constant voltage high level (VGH).Therefore, by enabling the enable signal of signal pad input with array test as grid Pole tension, the switching signal one point three that switching signal pad is inputted, thus can be at the base not changing original layout cabling On plinth, only utilizing a switching signal pad just can realize simultaneously provides switch letter to MUX_R, MUX_G, MUX_B holding wire Number (such as, VGL).Compared to existing design, this design can reduce by two switching signal pads, saves in panel The space of frame, improves the motility of panel peripheral circuits design, it is achieved narrow frame design.Simultaneously because during array test, Only need to enable signal pad and a switching signal pad input signal to an array test, when effectively reducing array test The quantity of input signal.
Particularly, multiple switching tubes of described array test circuit are multiple thin film transistor (TFT), the of each switching tube Single port is the grid of each thin film transistor (TFT).Multiple thin film transistor (TFT)s can be N-type TFT or p-type film crystal Pipe.
The array test circuit and the liquid crystal display substrate that there is provided the present invention below in conjunction with the accompanying drawings elaborate.
With reference to Fig. 2, the circuit diagram shown in array test circuit one embodiment of the present invention.In the present embodiment, originally Array test circuit described in invention includes: an array test enables signal pad ATP, is electrically connected with array test and enables signal Line ATEN;One switching signal pad SW;Described multiple switching tubes are multiple thin film transistor (TFT), and multiple thin film transistor (TFT)s include One thin film transistor (TFT) T1, the second thin film transistor (TFT) T2 and the 3rd thin film transistor (TFT) T3;First to the 3rd thin film transistor (TFT) T1-T3 Grid be all electrically connected to array test enable holding wire ATEN, the source electrode of the first to the 3rd thin film transistor (TFT) T1-T3 is the most electric Property is connected to the drain electrode of switching signal pad SW, the first film transistor T1, and to be electrically connected with the multichannel of display different colours pixel multiple With the red pixel multiplexer switch holding wire MUX_R in switch signal line, the drain electrode of the second thin film transistor (TFT) T2 electrically connects Meet the green pixel multiplexer switch holding wire MUX_G in the multiplexer switch holding wire of display different colours pixel, the The drain electrode of three thin film transistor (TFT) T3 is electrically connected with the blue pixel in the multiplexer switch holding wire of display different colours pixel Multiplexer switch holding wire MUX_B.Particularly, the first film transistor T1, the second thin film transistor (TFT) T2 and the 3rd thin film Transistor T3 is N-type TFT.
Wherein, when array test circuit works, it is that array test enables holding wire that array test enables signal pad ATP ATEN provides constant voltage high level VGH;Switching signal pad SW is that red pixel multiplexing is opened by the first film transistor T1 OFF signal line MUX_R provides constant voltage low level VGL, is green pixel multiplexer switch signal by the second thin film transistor (TFT) T2 Line MUX_G provides constant voltage low level VGL, is blue pixel multiplexer switch holding wire MUX_ by the 3rd thin film transistor (TFT) T3 B provides constant voltage low level VGL.
By with array test enable signal pad ATP input enable signal as grid voltage, by switching signal pad The switching signal one point three of SW input, thus can only utilize a switch on the basis of not changing original layout cabling Signal pad just can realize providing switching signal to MUX_R, MUX_G, MUX_B holding wire simultaneously.Compared to existing design, This design can reduce by two switching signal pads, saves the space of upper side frame in panel, improves panel peripheral circuits The motility of design, it is achieved narrow frame design.Simultaneously because during array test, it is only necessary to enable signal pad ATP to array test And switching signal pad SW input signal, the quantity of input signal when effectively reducing array test.
Present invention also offers a kind of liquid crystal display substrate, described liquid crystal display substrate includes at least one liquid crystal display Panel, described display panels is provided with array test circuit of the present invention.Use array test of the present invention The display panels of circuit, on the premise of ensureing that array test normally works, compared to existing design, it is possible to reduce two Individual switching signal pad, saves the space of upper side frame in panel, improves the motility of panel peripheral circuits design, it is achieved narrow Frame design, the quantity of input signal when simultaneously decreasing array test.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art Member, under the premise without departing from the principles of the invention, it is also possible to make some improvements and modifications, these improvements and modifications also should be regarded as Protection scope of the present invention.

Claims (6)

1. an array test circuit, it is characterised in that including:
An array test enables signal pad, is electrically connected with array test and enables holding wire;
One switching signal pad;
Multiple switching tubes, each described switching tube includes the first port, the second port and the 3rd port;Each described switching tube First port is all electrically connected to described array test and enables holding wire, and the second port of each described switching tube is all electrically connected with To described switching signal pad, the 3rd port of each described switching tube is electrically connected with the multichannel of display different colours pixel Multiplex switch holding wire.
2. array test circuit as claimed in claim 1, it is characterised in that when described array test circuit works, described Array test enables signal pad and enables holding wire offer array test control signal, described switching signal for described array test The multiplexer switch holding wire that pad is respectively described display different colours pixel by the plurality of switching tube provides array Test switching signal.
3. array test circuit as claimed in claim 2, it is characterised in that described array test control signal is constant voltage height electricity Ordinary mail number, described array test switching signal is constant voltage low level signal.
4. array test circuit as claimed in claim 1, it is characterised in that the plurality of switching tube is multiple film crystal Pipe, the first port of each described switching tube is the grid of each described thin film transistor (TFT).
5. array test circuit as claimed in claim 1, it is characterised in that the plurality of switching tube is multiple film crystal Pipe, the plurality of thin film transistor (TFT) includes the first film transistor, the second thin film transistor (TFT) and the 3rd thin film transistor (TFT), described The grid of the first film transistor, the second thin film transistor (TFT) and the 3rd thin film transistor (TFT) is all electrically connected to described array test Enabling holding wire, the source electrode of described the first film transistor, the second thin film transistor (TFT) and the 3rd thin film transistor (TFT) the most electrically connects Being connected to described switching signal pad, it is many that the drain electrode of described the first film transistor is electrically connected with described display different colours pixel Red pixel multiplexer switch holding wire in the multiplex switch holding wire of road, the drain electrode of described second thin film transistor (TFT) electrically connects Connect the green pixel multiplexer switch holding wire in the multiplexer switch holding wire of described display different colours pixel, described The drain electrode of the 3rd thin film transistor (TFT) is electrically connected with the blueness in the multiplexer switch holding wire of described display different colours pixel Pixel multiplexer switch holding wire.
6. a liquid crystal display substrate, it is characterised in that include at least one display panels, on described display panels It is provided with the array test circuit as described in claim 1-5 any one.
CN201610592389.2A 2016-07-25 2016-07-25 Array test circuit and liquid crystal display substrate Pending CN106200055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
CN201610592389.2A CN106200055A (en) 2016-07-25 2016-07-25 Array test circuit and liquid crystal display substrate

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CN106200055A true CN106200055A (en) 2016-12-07

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108550338A (en) * 2018-06-26 2018-09-18 信利半导体有限公司 A kind of Pad detection devices
CN109584760A (en) * 2017-09-29 2019-04-05 上海和辉光电有限公司 AMOLED panel tests circuit and test method
CN110867139A (en) * 2019-11-28 2020-03-06 上海中航光电子有限公司 Array substrate, display panel and display device
WO2020155408A1 (en) * 2019-01-30 2020-08-06 武汉华星光电半导体显示技术有限公司 Display panel having lower narrow bezel
CN114026489A (en) * 2020-05-12 2022-02-08 京东方科技集团股份有限公司 Display substrate and display device

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Publication number Priority date Publication date Assignee Title
CN101963709A (en) * 2009-07-21 2011-02-02 乐金显示有限公司 Chip on glass type LCD device and detection method of the same
CN102012595A (en) * 2010-10-08 2011-04-13 友达光电股份有限公司 Liquid crystal display
CN104217671A (en) * 2013-06-03 2014-12-17 三星显示有限公司 Organic light emitting display panel
CN104505371A (en) * 2014-12-10 2015-04-08 深圳市华星光电技术有限公司 Method for forming test pads and method for performing array test by utilizing test pads

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101963709A (en) * 2009-07-21 2011-02-02 乐金显示有限公司 Chip on glass type LCD device and detection method of the same
CN102012595A (en) * 2010-10-08 2011-04-13 友达光电股份有限公司 Liquid crystal display
CN104217671A (en) * 2013-06-03 2014-12-17 三星显示有限公司 Organic light emitting display panel
CN104505371A (en) * 2014-12-10 2015-04-08 深圳市华星光电技术有限公司 Method for forming test pads and method for performing array test by utilizing test pads

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109584760A (en) * 2017-09-29 2019-04-05 上海和辉光电有限公司 AMOLED panel tests circuit and test method
CN108550338A (en) * 2018-06-26 2018-09-18 信利半导体有限公司 A kind of Pad detection devices
WO2020155408A1 (en) * 2019-01-30 2020-08-06 武汉华星光电半导体显示技术有限公司 Display panel having lower narrow bezel
US11373564B2 (en) 2019-01-30 2022-06-28 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Lower narrow border display panel
CN110867139A (en) * 2019-11-28 2020-03-06 上海中航光电子有限公司 Array substrate, display panel and display device
CN114026489A (en) * 2020-05-12 2022-02-08 京东方科技集团股份有限公司 Display substrate and display device
CN114026489B (en) * 2020-05-12 2023-10-13 京东方科技集团股份有限公司 Display substrate and display device

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Application publication date: 20161207