CN106161306A - A kind of Fast Frequency Offset method of adjustment and device - Google Patents
A kind of Fast Frequency Offset method of adjustment and device Download PDFInfo
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- CN106161306A CN106161306A CN201610523712.0A CN201610523712A CN106161306A CN 106161306 A CN106161306 A CN 106161306A CN 201610523712 A CN201610523712 A CN 201610523712A CN 106161306 A CN106161306 A CN 106161306A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0024—Carrier regulation at the receiver end
- H04L2027/0026—Correction of carrier offset
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
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Abstract
The open a kind of Fast Frequency Offset method of adjustment of the present invention and device, said method comprising the steps of: first travel through all of footpath, obtain every I LUSHEN number corresponding to footpath and Q LUSHEN number；Then in each chip set, calculate every energy value corresponding to footpath and drift value respectively with Q LUSHEN number according to I LUSHEN number corresponding to every footpath；Then at the end of the chip set of preset numbers, energy value and drift value to current all footpaths add up respectively, obtain energy accumulation value and drift accumulated value；Energy accumulation value is divided by with drift accumulated value, obtains arcsine coefficient, according to the corresponding relation of arcsine coefficient Yu angle, obtain deviation angle；According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain frequency deviation adjusted value, and with frequency deviation adjusted value, crystal oscillator frequency deviation is adjusted.This method ensures can quickly adjust frequency deviation within the frequency deviation adjustment cycle by repeatedly adjusting, and saves the wakeup time of terminal sleeping state, reaches the purpose of province's power consumption.
Description
Technical field
The present invention relates to broadband CDMA system field, particularly relate to a kind of Fast Frequency Offset method of adjustment and device.
Background technology
WCDMA (WCDMA, Wideband Code Division Multiple Access) technology is current
A kind of width wireless access technology that in 3G communication, power of influence is maximum.Terminal is under CELL_PCH state, can periodically start reception
PICH, issues the paging information of this terminal to be confirmed whether to have.In order to save power consumption, agreement prescribed terminal is carrying out DRX reception
Time (i.e. discontinuous reception), in the place of non-reception PICH (Page Indication Channel), can enter resting state, needs connect by the time
Again terminal is waken up up when receiving PICH.Waking up terminal up when, wakeup time is the longest, then power consumption is the highest；Wakeup time is more
Short, power consumption is the lowest.WCDMA system uses DCXO crystal oscillator, and this crystal oscillator is the most sensitive for temperature, and at DRX rest period, frequency deviation swings
Very big, need fast quick-recovery.
Existing frequency offset regulation method calculates frequency deviation generally according to the phase place rotation of adjacent twice, and this method calculates multiple
Miscellaneous, frequency deviation is regulated the speed slowly, causes power consumption to increase.
Summary of the invention
For this reason, it may be necessary to provide the technical scheme that a kind of Fast Frequency Offset adjusts, adjust in order to solve existing frequency offset regulation method
Speed is slow, terminal wake-up time length, cause the problems such as power consumption of terminal increase.
For achieving the above object, inventor providing a kind of Fast Frequency Offset method of adjustment, described method adjusts week in frequency deviation
Completing in phase, the described frequency deviation adjustment cycle includes several chip set, and is numbered each chip set, described chip set bag
Include some chips；Said method comprising the steps of:
Travel through all of footpath, obtain every I LUSHEN number corresponding to footpath and Q LUSHEN number；
In each chip set, calculate every energy corresponding to footpath respectively with Q LUSHEN number according to I LUSHEN number corresponding to every footpath
Value and drift value；
At the end of the chip set of preset numbers, energy value and drift value to current all footpaths add up respectively,
To energy accumulation value and drift accumulated value；Energy accumulation value is divided by with drift accumulated value, obtains arcsine coefficient, according to anyway
String coefficient and the corresponding relation of angle, obtain deviation angle；According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain frequency deviation and adjust
Whole value, and with frequency deviation adjusted value, crystal oscillator frequency deviation is adjusted.
Further, described drift value includes the first drift value and the second drift value, and described second drift value passes through first
Drift value carries out IIR filtering and obtains, and described drift accumulated value is the accumulated value of the second drift value.
Further, certain root footpath the first drift value in current chip group is: this footpath is on Q road corresponding to current chip group
Parameter and this footpath at the product of the I LUSHEN number of a upper chip set, deduct this footpath I LUSHEN number corresponding to current chip group with should
Footpath is at the product of the Q LUSHEN number of a upper chip set.
Further, described energy value includes the first energy value and the second energy value, and described second energy value passes through first
Energy value carries out IIR filtering and obtains, and described energy accumulation value is the accumulated value of the second energy value.
Further, certain root footpath at the first energy value of current chip group is: this footpath is put down at the I LUSHEN number of current chip group
Side, add this footpath current chip group Q LUSHEN number square.
Further, at the end of the chip set of different preset numbers, the filter factor carrying out IIR filtering is different.
Further, the chip set quantity that described frequency deviation is comprised in adjusting the cycle is 35, and each chip set comprises 256
Individual chip.
Further, the chip set of described preset numbers is followed successively by the numbered chip set of 5,10,15,25,35.
Inventor additionally provides a kind of Fast Frequency Offset adjusting apparatus, described device within the frequency deviation adjustment cycle to crystal oscillator frequency deviation
Being adjusted, the described frequency deviation adjustment cycle includes several chip set, and is numbered each chip set, described chip set bag
Include 256 some chips；It is single that described device includes that parameter acquiring unit, computing unit, frequency deviation adjusted value acquiring unit, frequency deviation adjust
Unit；Described computing unit includes the first computing unit, the second computing unit and the 3rd computing unit；
Described parameter acquiring unit is used for traveling through all of footpath, obtains every I LUSHEN number corresponding to footpath and Q LUSHEN number；
Described first computing unit in each chip set, the I LUSHEN number corresponding according to every footpath and Q LUSHEN number meter
Calculating every energy value corresponding to footpath, described second computing unit is in each chip set, according to the I LUSHEN that every footpath is corresponding
Number calculates every drift value corresponding to footpath with Q LUSHEN number；
Described 3rd computing unit is used at the end of the chip set of preset numbers, the energy value to current all footpaths respectively
Add up with drift value, obtain energy accumulation value and drift accumulated value, and energy accumulation value is divided by with drift accumulated value,
To arcsine coefficient；
Described frequency deviation adjusted value acquiring unit, for the corresponding relation according to arcsine coefficient Yu angle, obtains deviation angle,
Then according to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain frequency deviation adjusted value；
Described frequency deviation adjustment unit is used for using described frequency deviation adjusted value to be adjusted crystal oscillator frequency deviation.
Further, described drift value includes the first drift value and the second drift value, and described second drift value passes through first
Drift value carries out IIR filtering and obtains, and described drift accumulated value is the accumulated value of the second drift value.
Further, certain root footpath the first drift value in current chip group is: this footpath is on Q road corresponding to current chip group
Parameter and this footpath at the product of the I LUSHEN number of a upper chip set, deduct this footpath I LUSHEN number corresponding to current chip group with should
Footpath is at the product of the Q LUSHEN number of a upper chip set.
Further, described energy value includes the first energy value and the second energy value, and described second energy value passes through first
Energy value carries out IIR filtering and obtains, and described energy accumulation value is the accumulated value of the second energy value.
Further, certain root footpath at the first energy value of current chip group is: this footpath is put down at the I LUSHEN number of current chip group
Side, add this footpath current chip group Q LUSHEN number square.
Further, at the end of the chip set of different preset numbers, the filter factor carrying out IIR filtering is different.
Further, the chip set quantity that described frequency deviation is comprised in adjusting the cycle is 35, and each chip set comprises 256
Individual chip.
Further, the chip set of described preset numbers is followed successively by the numbered chip set of 5,10,15,25,35.
Fast Frequency Offset method of adjustment described in technique scheme and device, described method is complete within the frequency deviation adjustment cycle
Becoming, the described frequency deviation adjustment cycle includes several chip set, and is numbered each chip set, and described chip set includes some
Chip；Said method comprising the steps of: first travel through all of footpath, obtain every I LUSHEN number corresponding to footpath and Q LUSHEN number；
Then in each chip set, calculate every energy value corresponding to footpath respectively with Q LUSHEN number according to I LUSHEN number corresponding to every footpath
With drift value；Then at the end of the chip set of preset numbers, energy value and drift value to current all footpaths tire out respectively
Add, obtain energy accumulation value and drift accumulated value；Energy accumulation value is divided by with drift accumulated value, obtains arcsine coefficient, root
According to the corresponding relation of arcsine coefficient Yu angle, obtain deviation angle；According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain
Frequency deviation adjusted value, and with frequency deviation adjusted value, crystal oscillator frequency deviation is adjusted.So, after the chip set at each pre-arranged code terminates
Frequency deviation is once adjusted, ensures can quickly adjust frequency deviation within the frequency deviation adjustment cycle by repeatedly adjusting, save terminal
The wakeup time of resting state, reaches the purpose of province's power consumption.
Accompanying drawing explanation
Fig. 1 is the flow chart of the Fast Frequency Offset method of adjustment that one embodiment of the invention relates to；
Fig. 2 is the schematic diagram of the Fast Frequency Offset adjusting apparatus that one embodiment of the invention relates to；
Description of reference numerals:
101, parameter acquiring unit；
102, computing unit；121, the first computing unit；122, the second computing unit；123, the 3rd computing unit；
103, frequency deviation adjusted value acquiring unit；
104, frequency deviation adjustment unit.
Detailed description of the invention
By describing the technology contents of technical scheme, structural feature in detail, being realized purpose and effect, below in conjunction with concrete real
Execute example and coordinate accompanying drawing to be explained in detail.
Refer to Fig. 1, for the flow chart of the Fast Frequency Offset method of adjustment that one embodiment of the invention relates to.Described method is at frequency
Partially completing in the adjustment cycle, the described frequency deviation adjustment cycle includes several chip set, and is numbered each chip set, described
Chip set includes some chips.Chip and chip set are the unit characterizing the time cycle, it is preferred that in the present embodiment,
Described chip set is symbol (symbol), 1symbol=256chip (chip).In other embodiments, described chip set bag
Quantity containing chip can also take other values according to actual needs.Said method comprising the steps of:
Initially enter step S101 and travel through all of footpath, obtain every I LUSHEN number corresponding to footpath and Q LUSHEN number.Same letter
Number diffraction can occur after running into barrier, form many footpaths, travel through all of footpath and refer to the peak of RAKE receiver search signal
The process of value point (finger), including search peak point, adjusts peak point position, locking peak point etc..Meanwhile, receiver can be by
Analogue signal is converted to digital signal, and obtains the I in each footpath in each chip (unit of time, 10ms=38400chip)
LUSHEN number and Q LUSHEN number.I LUSHEN number and Q LUSHEN number are to adjust two parameters needed for frequency deviation.In the present embodiment, described
I LUSHEN number corresponding to every footpath and Q LUSHEN number are every footpath at I LUSHEN number corresponding to CPICH Common Pilot Channel symbol and Q LUSHEN number.
Then entering step S102 in each chip set, the I LUSHEN number corresponding according to every footpath and Q LUSHEN number are counted respectively
Calculate every energy value corresponding to footpath and drift value.In the present embodiment, described drift value includes that the first drift value and second is waftd
Shifting value, described second drift value carries out IIR filtering by an IIR filtering drift value and obtains.Certain root footpath is in current chip group
The first drift value be: this footpath is taking advantage of at the I LUSHEN number of a upper chip set in Q LUSHEN number corresponding to current chip group and this footpath
Long-pending, deduct this footpath in I LUSHEN number corresponding to current chip group and this footpath the product at the Q LUSHEN number of a upper chip set.Such as
Now with two adjacent chip set: the first chip set and the second chip set, certain root footpath is at the I LUSHEN number of the first chip set and Q
LUSHEN number uses I1 and Q1 respectively, and this footpath is respectively I2 and Q2 at I LUSHEN number and the Q LUSHEN number of the second chip set, then the second chip
First drift value fre2=I1Q2-I2Q1 in this footpath in group.Second drift value carries out IIR filtering by the first drift value and obtains,
Specifically, if the second drift value in the first chip set is IIRfre1, the first drift value in the second chip set is fre2, then
The second drift value IIRfre2=IIRfre1+ (fre2-IIRfre1) * cof in second chip set, wherein, cof is filtering ginseng
Number, * represents multiplication sign.
In the present embodiment, described energy value includes the first energy value and the second energy value, and described second energy value leads to
Cross the first energy value IIR filter value and current energy value to carry out IIR filtering and obtain.Certain root footpath is at the first energy of current chip group
Value is: this footpath at the I LUSHEN number square of current chip group, add this footpath current chip group Q LUSHEN number square.Such as certain root
I and Q is used respectively at I LUSHEN number and the Q LUSHEN number of certain chip set in footpath, then this footpath the first energy value in this chip set is En=
I2+Q2, the second energy value (IIREn) computing formula is as follows: IIREn=IIREn-1+(En-IIREn-1) * cof wherein, IIREn-1For
Second energy value of a upper chip set of current chip group, cof is filter factor.
Then enter step S103 at the end of the chip set of preset numbers, respectively to the energy value in current all footpaths with waft
Shifting value adds up, and obtains energy accumulation value and drift accumulated value, energy accumulation value is divided by with drift accumulated value, obtains anyway
String system.In the present embodiment, described drift accumulated value is the accumulated value of the second drift value, described energy accumulation value is second
The accumulated value of energy value.In the present embodiment, the chip set quantity that described frequency deviation is comprised in adjusting the cycle is 35, each
Chip set comprises 256 chips.The chip set of described preset numbers is followed successively by the numbered chip set of 5,10,15,25,35.I.e.
It is that a whole frequency deviation adjusts the cycle with 35 symbols (256 chip), within each frequency deviation adjustment cycle, frequency deviation is carried out 5 times and adjusts
Whole, the time every time adjusted is respectively after the numbered sign-off of 5,10,15,25,35.In the present embodiment, not
At the end of the chip set of preset numbers, the filter factor carrying out IIR filtering is different.Specifically, at the code of preset numbers 5 to 15
Use bigger filter factor to carry out IIR filtering in sheet group, and in the chip set of preset numbers 25 to 35, use bigger filter
Wave system number carries out IIR filtering.So, when 3 times frequency deviation adjusts, frequency deviation can be adjusted greatly, finally
When adjusting for twice, then the amplitude adjusted is less so that frequency deviation adjusts and more prepares.In other embodiments, described frequency deviation adjusts
The chip set quantity comprised in cycle can select other any amount according to actual needs, and the preset numbers of chip set also may be used
With self-defined decision.The most each frequency deviation adjustment cycle includes 100 symbols, then can every 10 codes in front 60 chip set
Sheet group carries out a frequency deviation and adjusts, and in rear 40 chip set, every 20 chip set carry out a frequency deviation adjustment, i.e. preset numbers
The numbering of chip set is followed successively by 10,20,30,40,50,60,80,100, it is preferred that in the chip set of numbered 1 to 60
IIR filtering can use relatively large numerical value, to ensure the speed that frequency deviation adjusts, shortens the adjustment time, at the code of 60 to 100
IIR filtering in sheet group can use relatively small numerical value, to ensure the precision that frequency deviation adjusts, it is ensured that it is accurate that frequency deviation adjusts
Property.
Then entrance step S104 is according to the corresponding relation of arcsine coefficient Yu angle, obtains deviation angle, according to deviation angle
With the corresponding relation of frequency deviation adjusted value, obtain frequency deviation adjusted value.The relation of arcsine coefficient (arcsin value) and angle can be with thing
It is first stored in a table, when the arcsine coefficient calculated in learning a certain chip set, can be obtained this by meter reading anti-
The deviation angle that sinusoidal coefficients is corresponding.In like manner, after learning deviation angle, frequency deviation corresponding to this deviation angle can be obtained by meter reading and adjust
Whole value.
Then enter step S105 frequency deviation adjusted value crystal oscillator frequency deviation is adjusted.Preferably, terminate in frequency deviation adjustment
After, described method also includes emptying that this calculates is data cached, the energy accumulation value that such as calculates, drift accumulated value etc.
Deng.Pass through such scheme so that crystal oscillator frequency deviation quickly can be adjusted in place within a frequency deviation adjustment cycle, save merit
Consumption.
Refer to Fig. 2, for the schematic diagram of the Fast Frequency Offset adjusting apparatus that one embodiment of the invention relates to.Described device is at frequency
Partially in the adjustment cycle being adjusted crystal oscillator frequency deviation, the described frequency deviation adjustment cycle includes several chip set, and to each chip
Group is numbered, and described chip set includes some chips；Described device includes parameter acquiring unit 101, computing unit 102, frequently
Adjusted value acquiring unit 103, frequency deviation adjustment unit 104 partially；Described computing unit includes that the first computing unit 101, second calculates
Unit 102 and the 3rd computing unit 103；
Described parameter acquiring unit 101 is used for traveling through all of footpath, obtains every I LUSHEN number corresponding to footpath and Q LUSHEN number；
Described first computing unit 121 in each chip set, the I LUSHEN number corresponding according to every footpath and Q LUSHEN
Number calculates the energy value that every footpath is corresponding, and described second computing unit 122 is in each chip set, according to every footpath correspondence
I LUSHEN number calculate every drift value corresponding to footpath with Q LUSHEN number；
Described 3rd computing unit 123 is used at the end of the chip set of preset numbers, the energy to current all footpaths respectively
Value and drift value add up, and obtain energy accumulation value and drift accumulated value, and by energy accumulation value and drift accumulated value phase
Remove, obtain arcsine coefficient；
Described frequency deviation adjusted value acquiring unit 103, for the corresponding relation according to arcsine coefficient Yu angle, is offset
Angle, then according to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtains frequency deviation adjusted value；
Described frequency deviation adjustment unit 104 is used for using described frequency deviation adjusted value to be adjusted crystal oscillator frequency deviation.
When using Fast Frequency Offset adjusting apparatus, first parameter acquiring unit 101 travels through all of footpath, obtains every footpath pair
The I LUSHEN number answered and Q LUSHEN number.Same signal can occur diffraction after running into barrier, forms many footpaths, travels through all of footpath
Refer to the process of the peak point (finger) of RAKE receiver search signal, including search peak point, adjust peak point position, lock
Determine peak point etc..Meanwhile, receiver can convert analog signals into digital signal, and obtain each chip (unit of time,
The I LUSHEN number in each footpath and Q LUSHEN number in 10ms=38400chip).I LUSHEN number and Q LUSHEN number are to adjust two needed for frequency deviation
Individual parameter.
Then the first computing unit 121 is in each chip set, the I LUSHEN number corresponding according to every footpath and Q LUSHEN number meter
Calculating every energy value corresponding to footpath, then the second computing unit 122 is in each chip set, according to the I LUSHEN that every footpath is corresponding
Number calculates every drift value corresponding to footpath with Q LUSHEN number.In the present embodiment, described drift value includes the first drift value and
Two drift values, described second drift value carries out IIR filtering by an IIR filtering drift value and obtains.Certain root footpath is at current chip
The first drift value in group is: this footpath in Q LUSHEN number corresponding to current chip group and this footpath at the I LUSHEN number of a upper chip set
Product, deduct this footpath in I LUSHEN number corresponding to current chip group and this footpath the product at the Q LUSHEN number of a upper chip set.
Such as now with two adjacent chip set: the first chip set and the second chip set, certain root footpath is at the I LUSHEN number of the first chip set
Use I1 and Q1 respectively with Q LUSHEN number, this footpath is respectively I2 and Q2 at I LUSHEN number and the Q LUSHEN number of the second chip set, then second code
First drift value fre2=I1Q2-I2Q1 in this footpath in sheet group.Second drift value carries out IIR by the first drift value and filters
Arriving, specifically, if the second drift value in the first chip set is IIRfre1, the first drift value in the second chip set is fre2,
Then the second drift value IIRfre2=IIRfre1+ (fre2-IIRfre1) * cof in the second chip set, wherein, cof is filtering
Parameter, * represents multiplication sign.
In the present embodiment, described energy value includes the first energy value and the second energy value, and described second energy value leads to
Cross the first energy value IIR filter value and current energy value to carry out IIR filtering and obtain.Certain root footpath is at the first energy of current chip group
Value is: this footpath at the I LUSHEN number square of current chip group, add this footpath current chip group Q LUSHEN number square.Such as certain root
I and Q is used respectively at I LUSHEN number and the Q LUSHEN number of certain chip set in footpath, then this footpath the first energy value in this chip set is En=
I2+Q2, the second energy value (IIREn) computing formula is as follows: IIREn=IIREn-1+(En-IIREn-1) * cof wherein, IIREn-1For
Second energy value of a upper chip set of current chip group, cof is filter factor.
Then the 3rd computing unit 123 is at the end of the chip set of preset numbers, respectively the energy value to current all footpaths
Add up with drift value, obtain energy accumulation value and drift accumulated value, energy accumulation value is divided by with drift accumulated value, obtains
Arcsine system.In the present embodiment, described drift accumulated value is the accumulated value of the second drift value, described energy accumulation value is
The accumulated value of the second energy value.In the present embodiment, the chip set quantity that described frequency deviation is comprised in adjusting the cycle is 35,
Each chip set comprises 256 chips.The chip set of described preset numbers is followed successively by the numbered chip of 5,10,15,25,35
Group.I.e. with 35 symbols (256 chip) be one whole frequency deviation adjust the cycle, within each frequency deviation adjustment cycle, frequency deviation is carried out
Adjusting for 5 times, the time every time adjusted is respectively after the numbered sign-off of 5,10,15,25,35.In the present embodiment,
At the end of the chip set of different preset numbers, the filter factor carrying out IIR filtering is different.Specifically, in preset numbers 5 to 15
Chip set in use bigger filter factor to carry out IIR filtering, and use bigger in the chip set of preset numbers 25 to 35
Filter factor carry out IIR filtering.So, when 3 times frequency deviation adjusts, frequency deviation can be adjusted greatly,
When adjusting for last twice, then the amplitude adjusted is less so that frequency deviation adjusts and more prepares.In other embodiments, described frequency deviation
The chip set quantity comprised in the adjustment cycle can select other any amount, the preset numbers of chip set according to actual needs
Can also self-defined determine.The most each frequency deviation adjusts the cycle and includes 100 symbols, then can every 10 in front 60 chip set
Individual chip set carries out a frequency deviation and adjusts, and in rear 40 chip set, every 20 chip set carry out a frequency deviation adjustment, i.e. preset and compile
Number the numbering of chip set be followed successively by 10,20,30,40,50,60,80,100, it is preferred that in the chip set of numbered 1 to 60
IIR filtering can use relatively large numerical value, to ensure the speed that frequency deviation adjusts, shortening the adjustment time, 60 to 100
IIR filtering in chip set can use relatively small numerical value, to ensure the precision that frequency deviation adjusts, it is ensured that the standard that frequency deviation adjusts
Really property.
Then frequency deviation adjusted value acquiring unit 103 is according to the corresponding relation of arcsine coefficient Yu angle, obtains deviation angle, root
According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain frequency deviation adjusted value.Arcsine coefficient (arcsin value) and the pass of angle
System can be previously stored in a table, when the arcsine coefficient calculated in learning a certain chip set, by meter reading
Obtain the deviation angle that this arcsine coefficient is corresponding.In like manner, after learning deviation angle, this deviation angle can be obtained by meter reading corresponding
Frequency deviation adjusted value.
Then crystal oscillator frequency deviation is adjusted by frequency deviation adjustment unit 104 frequency deviation adjusted value.Preferably, knot is adjusted in frequency deviation
Shu Hou, described method also includes emptying that this calculates is data cached, the energy accumulation value that such as calculates, drift accumulated value etc.
Deng.Pass through such scheme so that crystal oscillator frequency deviation quickly can be adjusted in place within a frequency deviation adjustment cycle, save merit
Consumption.
Fast Frequency Offset method of adjustment described in technique scheme and device, described method is complete within the frequency deviation adjustment cycle
Becoming, the described frequency deviation adjustment cycle includes several chip set, and is numbered each chip set, and described chip set includes some
Chip；Said method comprising the steps of: first travel through all of footpath, obtain every I LUSHEN number corresponding to footpath and Q LUSHEN number；
Then in each chip set, calculate every energy value corresponding to footpath respectively with Q LUSHEN number according to I LUSHEN number corresponding to every footpath
With drift value；Then at the end of the chip set of preset numbers, energy value and drift value to current all footpaths tire out respectively
Add, obtain energy accumulation value and drift accumulated value；Energy accumulation value is divided by with drift accumulated value, obtains arcsine coefficient, root
According to the corresponding relation of arcsine coefficient Yu angle, obtain deviation angle；According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain
Frequency deviation adjusted value, and with frequency deviation adjusted value, crystal oscillator frequency deviation is adjusted.So, after the chip set at each pre-arranged code terminates
Frequency deviation is once adjusted, ensures can quickly adjust frequency deviation within the frequency deviation adjustment cycle by repeatedly adjusting, save terminal
The wakeup time of resting state, reaches the purpose of province's power consumption.
It should be noted that in this article, the relational terms of such as first and second or the like is used merely to a reality
Body or operation separate with another entity or operating space, and deposit between not necessarily requiring or imply these entities or operating
Relation or order in any this reality.And, term " includes ", " comprising " or its any other variant are intended to
Comprising of nonexcludability, so that include that the process of a series of key element, method, article or terminal unit not only include those
Key element, but also include other key elements being not expressly set out, or also include for this process, method, article or end
The key element that end equipment is intrinsic.In the case of there is no more restriction, statement " including ... " or " comprising ... " limit
Key element, it is not excluded that there is also other key element in including the process of described key element, method, article or terminal unit.This
Outward, in this article, " be more than ", " being less than ", " exceeding " etc. are interpreted as not including this number；More than " ", " below ", " within " etc. understand
For including this number.
Those skilled in the art are it should be appreciated that the various embodiments described above can be provided as method, device or computer program product
Product.These embodiments can use complete hardware embodiment, complete software implementation or combine software and hardware in terms of embodiment
Form.All or part of step in the method that the various embodiments described above relate to can instruct relevant hardware by program
Completing, described program can be stored in the storage medium that computer equipment can read, and is used for performing the various embodiments described above side
All or part of step described in method.Described computer equipment, includes but not limited to: personal computer, server, general-purpose computations
Machine, special-purpose computer, the network equipment, embedded device, programmable device, intelligent mobile terminal, intelligent home device, Wearable
Smart machine, vehicle intelligent equipment etc.；Described storage medium, includes but not limited to: RAM, ROM, magnetic disc, tape, CD, sudden strain of a muscle
Deposit, the storage of USB flash disk, portable hard drive, storage card, memory stick, the webserver, network cloud storage etc..
The various embodiments described above are with reference to according to the method described in embodiment, equipment (system) and computer program
Flow chart and/or block diagram describe.It should be understood that can every by computer program instructions flowchart and/or block diagram
Flow process in one flow process and/or square frame and flow chart and/or block diagram and/or the combination of square frame.These computers can be provided
Programmed instruction to the processor of computer equipment to produce a machine so that the finger performed by the processor of computer equipment
Order produces for realizing specifying in one flow process of flow chart or multiple flow process and/or one square frame of block diagram or multiple square frame
The device of function.
These computer program instructions may be alternatively stored in the computer that computer equipment can be guided to work in a specific way and set
In standby readable memory so that the instruction being stored in this computer equipment readable memory produces the manufacture including command device
Product, this command device realizes at one flow process of flow chart or multiple flow process and/or one square frame of block diagram or multiple square frame middle finger
Fixed function.
These computer program instructions also can be loaded on computer equipment so that performs a series of on a computing device
Operating procedure is to produce computer implemented process, thus the instruction performed on a computing device provides for realizing in flow process
The step of the function specified in one flow process of figure or multiple flow process and/or one square frame of block diagram or multiple square frame.
Although being described the various embodiments described above, but those skilled in the art once know basic wound
The property made concept, then can make other change and amendment to these embodiments, so the foregoing is only embodiments of the invention,
Not thereby the scope of patent protection of the present invention, every equivalent structure utilizing description of the invention and accompanying drawing content to be made are limited
Or equivalence flow process conversion, or directly or indirectly it is used in other relevant technical fields, the most in like manner it is included in the patent of the present invention
Within protection domain.
Claims (16)
1. a Fast Frequency Offset method of adjustment, described method completed within the frequency deviation adjustment cycle, and the described frequency deviation adjustment cycle includes
Several chip set, and each chip set is numbered, described chip set includes some chips；It is characterized in that, described side
Method comprises the following steps:
Travel through all of footpath, obtain every I LUSHEN number corresponding to footpath and Q LUSHEN number；
In each chip set, calculate every energy value corresponding to footpath respectively with Q LUSHEN number according to I LUSHEN number corresponding to every footpath
With drift value；
At the end of the chip set of preset numbers, energy value and drift value to current all footpaths add up respectively, obtain energy
Amount accumulated value and drift accumulated value；Energy accumulation value is divided by with drift accumulated value, obtains arcsine coefficient, according to arcsine system
Number and the corresponding relation of angle, obtain deviation angle；According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain frequency deviation and adjust
Value, and with frequency deviation adjusted value, crystal oscillator frequency deviation is adjusted.
Fast Frequency Offset method of adjustment the most according to claim 1, it is characterised in that described drift value includes the first drift value
With the second drift value, described second drift value carries out IIR filtering by the first drift value and obtains, and described drift accumulated value is second
The accumulated value of drift value.
Fast Frequency Offset method of adjustment the most according to claim 2, it is characterised in that certain root footpath in current chip group
One drift value is: this footpath in Q LUSHEN number corresponding to current chip group and this footpath at the product of the I LUSHEN number of a upper chip set,
Deduct this footpath in I LUSHEN number corresponding to current chip group and this footpath the product at the Q LUSHEN number of a upper chip set.
Fast Frequency Offset method of adjustment the most according to claim 1, it is characterised in that described energy value includes the first energy value
With the second energy value, described second energy value carries out IIR filtering by the first energy value and obtains, and described energy accumulation value is second
The accumulated value of energy value.
Fast Frequency Offset method of adjustment the most according to claim 4, it is characterised in that certain root footpath is in the first of current chip group
Energy value is: this footpath at the I LUSHEN number square of current chip group, add this footpath current chip group Q LUSHEN number square.
6. according to the Fast Frequency Offset method of adjustment described in claim 2 or 4, it is characterised in that at the chip of different preset numbers
At the end of group, the filter factor carrying out IIR filtering is different.
Fast Frequency Offset method of adjustment the most according to claim 1, it is characterised in that described frequency deviation is comprised in adjusting the cycle
Chip set quantity be 35, each chip set comprises 256 chips.
Fast Frequency Offset method of adjustment the most according to claim 7, it is characterised in that the chip set of described preset numbers is successively
For the numbered chip set of 5,10,15,25,35.
9. a Fast Frequency Offset adjusting apparatus, crystal oscillator frequency deviation was adjusted within the frequency deviation adjustment cycle by described device, described frequency
The adjustment cycle partially includes several chip set, and is numbered each chip set, and described chip set includes some chips；It is special
Levying and be, described device includes parameter acquiring unit, computing unit, frequency deviation adjusted value acquiring unit, frequency deviation adjustment unit；Described
Computing unit includes the first computing unit, the second computing unit and the 3rd computing unit；
Described parameter acquiring unit is used for traveling through all of footpath, obtains every I LUSHEN number corresponding to footpath and Q LUSHEN number；
Described first computing unit is in each chip set, and the I LUSHEN number corresponding according to every footpath and Q LUSHEN number calculate every
The energy value that root footpath is corresponding, described second computing unit in each chip set, the I LUSHEN number corresponding according to every footpath and
Q LUSHEN number calculates every drift value corresponding to footpath；
Described 3rd computing unit is at the end of the chip set of preset numbers, respectively to the energy value in current all footpaths with waft
Shifting value adds up, and obtains energy accumulation value and drift accumulated value, and energy accumulation value is divided by with drift accumulated value, obtains anti-
Sinusoidal coefficients；
Described frequency deviation adjusted value acquiring unit, for the corresponding relation according to arcsine coefficient Yu angle, obtains deviation angle, then
According to the corresponding relation of deviation angle Yu frequency deviation adjusted value, obtain frequency deviation adjusted value；
Described frequency deviation adjustment unit is used for using described frequency deviation adjusted value to be adjusted crystal oscillator frequency deviation.
Fast Frequency Offset adjusting apparatus the most according to claim 9, it is characterised in that described drift value includes the first drift
Value and the second drift value, described second drift value carries out IIR by the first drift value and filters and obtain, and described drift accumulated value is the
The accumulated value of two drift values.
11. Fast Frequency Offset adjusting apparatus according to claim 10, it is characterised in that certain root footpath is in current chip group
First drift value is: this footpath is taking advantage of at the I LUSHEN number of a upper chip set in Q LUSHEN number corresponding to current chip group and this footpath
Long-pending, deduct this footpath in I LUSHEN number corresponding to current chip group and this footpath the product at the Q LUSHEN number of a upper chip set.
12. Fast Frequency Offset adjusting apparatus according to claim 9, it is characterised in that described energy value includes the first energy
Value and the second energy value, described second energy value carries out IIR by the first energy value and filters and obtain, and described energy accumulation value is the
The accumulated value of two energy values.
13. Fast Frequency Offset adjusting apparatus according to claim 12, it is characterised in that certain root footpath is the of current chip group
One energy value is: this footpath at the I LUSHEN number square of current chip group, add this footpath current chip group Q LUSHEN number square.
14. according to the Fast Frequency Offset adjusting apparatus described in claim 10 or 12, it is characterised in that at the code of different preset numbers
At the end of sheet group, the filter factor carrying out IIR filtering is different.
15. Fast Frequency Offset adjusting apparatus according to claim 9, it is characterised in that described frequency deviation is wrapped in adjusting the cycle
The chip set quantity contained is 35, and each chip set comprises 256 chips.
16. Fast Frequency Offset adjusting apparatus according to claim 15, it is characterised in that the chip set of described preset numbers depends on
Secondary for the numbered chip set of 5,10,15,25,35.
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Cited By (1)
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| CN115831032A (en) * | 2023-02-20 | 2023-03-21 | 深圳曦华科技有限公司 | Chip temperature drift processing method and device |
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| US20020013131A1 (en) * | 1998-11-24 | 2002-01-31 | Markus Doetsch | Frequency-stabilized transmitting/receiving configuration |
| CN1264228A (en) * | 2000-02-01 | 2000-08-23 | 深圳市中兴通讯股份有限公司 | Automatic frequency control method and device in broadband CDMA system |
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Address after: 350003 building, No. 89, software Avenue, Gulou District, Fujian, Fuzhou 18, China Patentee after: Ruixin Microelectronics Co., Ltd Address before: 350003 building, No. 89, software Avenue, Gulou District, Fujian, Fuzhou 18, China Patentee before: Fuzhou Rockchips Electronics Co.,Ltd. |