CN106127672B - Image texture characteristic extraction algorithm based on FPGA - Google Patents
Image texture characteristic extraction algorithm based on FPGA Download PDFInfo
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- CN106127672B CN106127672B CN201610449983.6A CN201610449983A CN106127672B CN 106127672 B CN106127672 B CN 106127672B CN 201610449983 A CN201610449983 A CN 201610449983A CN 106127672 B CN106127672 B CN 106127672B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/60—Memory management
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2200/00—Indexing scheme for image data processing or generation, in general
- G06T2200/28—Indexing scheme for image data processing or generation, in general involving image processing hardware
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/10—Image acquisition modality
- G06T2207/10004—Still image; Photographic image
Abstract
The invention discloses a kind of image texture characteristic extraction algorithm based on FPGA passes through rapid image texture feature extraction system of the building based on FPGA, Lai Zhihang image texture characteristic extraction algorithm, to realize the extraction of primary image feature；Described image Texture Segmentation Algorithm, includes the following steps, 1) seven kinds of different textural characteristics are obtained using the filter response space of six Gaussian derivative filters compositions；2) convolution module for establishing multi-stage pipeline arrangement calculates Gaussian filter response, and calculated result is standardized, and obtains convolution results；3) classification function is utilized, the primary image feature of convolution results is successively calculated.Image texture characteristic extraction algorithm provided by the invention based on FPGA can greatly improve the extraction rate of image texture characteristic, solve demand of the extraction algorithm to performance；Low power dissipation design can be embedded into micromodule equipment, so that the technologies such as extraction algorithm and pattern-recognition obtain wider practical application.
Description
Technical field
The present invention relates to a kind of image characteristic extracting methods, mention more particularly to a kind of image texture characteristic based on FPGA
Algorithm is taken, technical field of image processing is belonged to.
Background technique
Image procossing and image recognition technology are current most popular one of fields, especially to the extraction of characteristics of image
Work is the premise of currently advanced pattern-recognition and artificial intelligence system.The development of these technologies will be in civilian, military project and boat
The key areas such as its science obtain qualitative leap.One important branch of characteristics of image is exactly textural characteristics, it embodies difference
The important parameters such as the form of image and object, size, distribution, direction play deciding factor to characteristics of image identification.But line
The process of reason feature extraction is sufficiently complex and calculation amount is huge, such as the full HD image of a 1080p, using classics
Basic Image Features algorithm needs to carry out hundred million operations up to more than 400.This is one for traditional CPU
Very difficult task.Since operation time is too long, so seriously limiting the practical application of algorithm.
Summary of the invention
It is a primary object of the present invention to overcome deficiency in the prior art, provide a kind of image texture based on FPGA
Feature extraction algorithm can greatly improve the extraction rate of image texture characteristic, solve demand of the extraction algorithm to performance；
The design of its low-power consumption simultaneously, can be embedded into micromodule equipment, so that the technologies such as extraction algorithm and pattern-recognition obtain more extensively
General practical application.
In order to achieve the above object, the technical scheme adopted by the invention is that:
A kind of image texture characteristic extraction algorithm based on FPGA, by constructing the rapid image textural characteristics based on FPGA
Extraction system, Lai Zhihang image texture characteristic extraction algorithm, to realize the extraction of primary image feature.
Wherein, the rapid image texture feature extraction system based on FPGA includes instruction control unit, is controlled with instruction
Image processor, network controller and the double mode dma controller that device processed unidirectionally connects, and it is mutual with double mode dma controller
The DDR2 controller of connection and power module for power supply；Described image processor and network controller are controlled with double mode DMA
Device interconnection processed；The network controller, for receiving the order from control terminal and the data flow of transmitting-receiving image to be processed；Institute
Instruction control unit is stated, for parsing the order of control terminal, completes control and scheduling to each module；The DDR2 controller is used
According to having ordered paired data stream to be kept in；The double mode dma controller, for autonomously carrying out stream mode and memory
The data conversion of mode；Described image processor, for using the complete paired data of image texture characteristic extraction algorithm according to order
Stream carries out processing and back delivery operations.
Moreover, described image Texture Segmentation Algorithm, includes the following steps,
1) seven kinds of different textural characteristics are obtained using the filter response space of six Gaussian derivative filter compositions；
2) convolution module for establishing multi-stage pipeline arrangement calculates Gaussian filter response, and calculated result is standardized,
Obtain convolution results；
The convolution module includes the stream mode receiving module being sequentially connected, pixel computing module, window generation module, multiplies
Musical instruments used in a Buddhist or Taoist mass matrix, parallel adder, both-end FIFO caching and stream mode sending module, and generated with pixel computing module, window
The connected image line caching of module；
2-1) stream mode receiving module receives image to be processed using stream mode transmission mode, and by image transmitting to be processed
Give pixel computing module；
The coordinate that each pixel 2-2) is obtained through pixel computing module, using MUX splitter by the seat of each pixel
Mark write-in image line caching；
The data cached of corresponding position 2-3) is read through window generation module, and is combined into convolution window using shift register
Mouthful；
2-4) calculate convolution kernel through multiplier matrix, using multiple fixed-point multiplication devices, by convolution window and convolution kernel into
Row dot product, and added up to obtain convolution results using result of the parallel adder to dot product；
Convolution results 2-5) are buffered into both-end FIFO caching, and are sent by stream mode sending module with data-stream form
It goes out；
3) classification function is utilized, the primary image feature of convolution results is successively calculated；
Wherein, classification function includes fixed point addition, fixed-point multiplication and Cordic algorithm, and primary image feature includes intermediate becomes
Amount and 7 parameter values, 7 parameter values are respectively flat type Flat, shelving Slop, dim spot type Dark Blob, bright point-type Light
Blob, concealed wire type Dark Line, open-wire line type Light Line and saddle Saddle；
Modulo operation is carried out using the vector pattern of Cordic algorithm, by comparing the size of 7 parameter values, selection parameter
It is worth maximum type as the textural characteristics for describing the pixel, and textural characteristics classification is completed using data flow control, realizes
The extraction of primary image feature.
The present invention is further arranged to: the convolution module pre-generates value parameter and mistake using Matlab software tool
Poor control parameter.
The present invention is further arranged to: the network controller uses gigabit Ethernet PHY.
The present invention is further arranged to: the network controller further includes transformer, and the transformer is for cooperating gigabit
Ethernet PHY work, the power module are powered by transformer to gigabit Ethernet PHY.
The present invention is further arranged to: the power module uses AX3102 Switching Power Supply.
The present invention is further arranged to: the power module further includes AMS1085CM linear voltage regulator, and the AX3102 is opened
Powered-down source is powered by AMS1085CM linear voltage regulator.
The present invention is further arranged to: the DDR2 controller uses the DDR2 memory modules of KVR667D2S5/1G.
Compared with prior art, the invention has the advantages that:
By constructing the rapid image texture feature extraction system based on FPGA, Lai Zhihang image texture characteristic, which extracts, to be calculated
Method, to realize the extraction of primary image feature, wherein image texture characteristic extraction algorithm, filters first with six Gaussian derivatives
The filter response space of device composition obtains seven kinds of different textural characteristics；Then set up the convolution module of multi-stage pipeline arrangement
Gaussian filter response is calculated, and calculated result is standardized, obtains convolution results；Classification function is finally utilized, is successively calculated
The primary image feature of convolution results out.The extraction rate of image texture characteristic can be not only greatlyd improve, solves to extract and calculate
Demand of the method to performance；And the design of low-power consumption, it can be embedded into micromodule equipment, under same consumption conditions, Ke Yida
To the performance for decupling traditional CPU, the purpose of rapidly extracting image texture characteristic is realized.
Above content is only the general introduction of technical solution of the present invention, in order to better understand technological means of the invention, under
In conjunction with attached drawing, the invention will be further described in face.
Detailed description of the invention
Fig. 1 is the structural block diagram of the rapid image texture feature extraction system of the invention based on FPGA；
Fig. 2 is the structural block diagram of the convolution module of multi-stage pipeline arrangement of the invention；
Fig. 3 is the implementation flow chart of Cordic algorithm of the invention；
Fig. 4 is the extraction effect figure of primary image feature of the invention.
Specific embodiment
With reference to the accompanying drawings of the specification, the present invention is further illustrated.
The present invention provides a kind of image texture characteristic extraction algorithm based on FPGA, by constructing the quick figure based on FPGA
As texture feature extraction system, Lai Zhihang image texture characteristic extraction algorithm, to realize the extraction of primary image feature.
As shown in Figure 1, the rapid image texture feature extraction system based on FPGA includes instruction control unit 1, with
Image processor 2, network controller 3 and the double mode dma controller 4 that instruction control unit 1 unidirectionally connects, and and double mode
The DDR2 controller 5 that dma controller 4 interconnects and the power module for power supply；Described image processor 2 and network controller 3
Interconnected with double mode dma controller 4.
The network controller 3 uses gigabit Ethernet PHY, and traffic rate is high.
The network controller 3 further includes transformer, and the transformer is described for cooperating gigabit Ethernet PHY to work
Power module is powered by transformer to gigabit Ethernet PHY.
The advantages that power module uses AX3102 Switching Power Supply, has output electric current big, high-efficient, and ripple is small.Institute
Stating power module further includes AMS1085CM linear voltage regulator, and the AX3102 Switching Power Supply passes through AMS1085CM linear voltage regulator
It is powered, power supply noise can be reduced.
The DDR2 controller 5 provides high speed, a large capacity using the DDR2 memory modules of KVR667D2S5/1G
Image and data buffering.
The network controller 3, for receiving the order from control terminal and the data flow of transmitting-receiving image to be processed；Institute
Instruction control unit 1 is stated, for parsing the order of control terminal, completes control and scheduling to each module；The DDR2 controller 5,
For according to having ordered paired data stream to be kept in；The double mode dma controller 4, for autonomously carry out stream mode with
The data conversion of memorymodel；Described image processor 2, for using the completion pair of image texture characteristic extraction algorithm according to order
Data flow carries out processing and back delivery operations.Double mode dma controller 4 autonomously carries out stream mode and the data of memorymodel turn
It changes, is the transmission bridge between image controller 2 and DDR2 controller 5 and network controller 3.Wherein DDR2 controller 5 accesses
Using memorymodel, i.e., using read-write enabled, address and data-signal come the access module completed.But since image is one group
Continuously, direction is single and the data of enormous amount, so present invention employs the schemes of stream mode, i.e., using packaging beginning, inclusion
Beam is surrounded by effect and data-signal to access, and reaches maximum read or write speed.
Image texture characteristic extraction algorithm of the invention, includes the following steps,
1) seven kinds of different textural characteristics are obtained using the filter response space of six Gaussian derivative filter compositions.
2) convolution module for establishing multi-stage pipeline arrangement calculates Gaussian filter response, and calculated result is standardized,
Obtain convolution results；
As shown in Fig. 2, the convolution module includes the stream mode receiving module being sequentially connected, pixel computing module, window
Generation module, multiplier matrix, parallel adder, both-end FIFO caching and stream mode sending module, and mould is calculated with pixel
The connected image line caching of block, window generation module；The value ginseng of convolution module is pre-generated using Matlab software tool
Several and control errors parameter.
Convolution module the specific steps are,
2-1) stream mode receiving module receives image to be processed using stream mode transmission mode, and by image transmitting to be processed
Give pixel computing module；
The coordinate that each pixel 2-2) is obtained through pixel computing module, using MUX splitter by the seat of each pixel
Mark write-in image line caching；
The data cached of corresponding position 2-3) is read through window generation module, and is combined into convolution window using shift register
Mouthful；
2-4) calculate convolution kernel through multiplier matrix, using multiple fixed-point multiplication devices, by convolution window and convolution kernel into
Row dot product, and added up to obtain convolution results using result of the parallel adder to dot product；
Convolution results 2-5) are buffered into both-end FIFO caching, and are sent by stream mode sending module with data-stream form
It goes out.
3) classification function is utilized, the primary image feature of convolution results is successively calculated；
Wherein, classification function includes fixed point addition, fixed-point multiplication and Cordic algorithm, and primary image feature includes intermediate becomes
Amount and 7 parameter values, 7 parameter values are respectively flat type Flat, shelving Slop, dim spot type Dark Blob, bright point-type Light
Blob, concealed wire type Dark Line, open-wire line type Light Line and saddle Saddle；
Modulo operation is carried out using the vector pattern of Cordic algorithm, by comparing the size of 7 parameter values, selection parameter
It is worth maximum type as the textural characteristics for describing the pixel, and textural characteristics classification is completed using data flow control, realizes
The extraction of primary image feature.
Cordic algorithm is a kind of fast method that binary mode calculates trigonometric function, while can also be by appropriate
Deformation is to realize modulo operation.As shown in figure 3, Cordic algorithm is implemented as, using rotary module by the rotation of rotation angle
Cheng Jinhang decomposition is turned over, i.e., rotating decomposition is concurrently set into each rotation angle at multiple linear combinations, it can for FPGA
To calculate multiplication using simple displacement.Passed through according to the symbol of each rotation results to determine the direction rotated next time
After multiple rotary, result will approach modulus result.Wherein rotary module compares symbol and the calculating of upper level value, provides this
Rotation as a result, final be multiplied using multiplier with definite value K, obtain mould result.
Actual test is carried out using the host computer that C# writes, test results are shown in figure 4, realizes rapidly extracting image line
Manage the purpose of feature and low-power consumption.
Basic principles and main features and advantage of the invention have been shown and described above.The technical staff of the industry should
Understand, the present invention is not limited to the above embodiments, and the above embodiments and description only describe originals of the invention
Reason, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these changes and improvements
It all fall within the protetion scope of the claimed invention.The claimed scope of the invention is by appended claims and its equivalent circle
It is fixed.
Claims (7)
1. a kind of image texture characteristic extraction algorithm based on FPGA, it is characterised in that: by constructing the quick figure based on FPGA
As texture feature extraction system, Lai Zhihang image texture characteristic extraction algorithm, to realize the extraction of primary image feature；
The rapid image texture feature extraction system based on FPGA includes instruction control unit, is unidirectionally connected with instruction control unit
Image processor, network controller and the double mode dma controller connect, and controlled with the DDR2 of double mode dma controller interconnection
Device processed and power module for power supply；Described image processor and network controller are interconnected with double mode dma controller；
The network controller, for receiving the order from control terminal and the data flow of transmitting-receiving image to be processed；The finger
Controller is enabled, for parsing the order of control terminal, completes control and scheduling to each module；The DDR2 controller is used for root
According to having ordered paired data stream to be kept in；The double mode dma controller, for autonomously carrying out stream mode and memorymodel
Data conversion；Described image processor, for being flowed into according to order using the complete paired data of image texture characteristic extraction algorithm
Row processing and back delivery operations；
Described image Texture Segmentation Algorithm, includes the following steps,
1) seven kinds of different textural characteristics are obtained using the filter response space of six Gaussian derivative filter compositions；
2) convolution module for establishing multi-stage pipeline arrangement calculates Gaussian filter response, and calculated result is standardized, and obtains
Convolution results；
The convolution module includes the stream mode receiving module, pixel computing module, window generation module, multiplier being sequentially connected
Matrix, parallel adder, both-end FIFO caching and stream mode sending module, and with pixel computing module, window generation module
Connected image line caching；
2-1) stream mode receiving module receives image to be processed using stream mode transmission mode, and by image transmitting to be processed to picture
Plain computing module；
The coordinate that each pixel 2-2) is obtained through pixel computing module is write the coordinate of each pixel using MUX splitter
Enter image line caching；
The data cached of corresponding position 2-3) is read through window generation module, and is combined into convolution window using shift register；
Convolution kernel 2-4) is calculated through multiplier matrix, using multiple fixed-point multiplication devices, convolution window and convolution kernel are carried out a little
Product, and added up to obtain convolution results using result of the parallel adder to dot product；
Convolution results 2-5) are buffered into both-end FIFO caching, and are sent out by stream mode sending module with data-stream form
It goes；
3) classification function is utilized, the primary image feature of convolution results is successively calculated；
Wherein, classification function includes fixed point addition, fixed-point multiplication and Cordic algorithm, primary image feature include intermediate variable and
7 parameter values, the corresponding value type of 7 parameter values is respectively flat type Flat, shelving Slop, dim spot type Dark Blob, bright
Point-type Light Blob, concealed wire type Dark Line, open-wire line type Light Line and saddle Saddle；
Modulo operation is carried out using the vector pattern of Cordic algorithm, by comparing the size of 7 parameter values, selection parameter value is most
Big type completes textural characteristics classification as the textural characteristics for describing the pixel, and using data flow control, realizes basic
The extraction of characteristics of image.
2. the image texture characteristic extraction algorithm according to claim 1 based on FPGA, it is characterised in that: the convolution mould
Block pre-generates value parameter and control errors parameter using Matlab software tool.
3. the image texture characteristic extraction algorithm according to claim 1 based on FPGA, it is characterised in that: the network control
Device processed uses gigabit Ethernet PHY.
4. the image texture characteristic extraction algorithm according to claim 3 based on FPGA, it is characterised in that: the network control
Device processed further includes transformer, and the transformer for cooperating gigabit Ethernet PHY to work, given by transformer by the power module
Gigabit Ethernet PHY is powered.
5. the image texture characteristic extraction algorithm according to claim 1 based on FPGA, it is characterised in that: the power supply mould
Block uses AX3102 Switching Power Supply.
6. the image texture characteristic extraction algorithm according to claim 5 based on FPGA, it is characterised in that: the power supply mould
Block further includes AMS1085CM linear voltage regulator, and the AX3102 Switching Power Supply is supplied by AMS1085CM linear voltage regulator
Electricity.
7. the image texture characteristic extraction algorithm according to claim 1 based on FPGA, it is characterised in that: the DDR2 control
Device processed uses the DDR2 memory modules of KVR667D2S5/1G.
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| CN107506773A (en) * | 2017-09-25 | 2017-12-22 | 郑州云海信息技术有限公司 | A kind of feature extracting method, apparatus and system |
| CN109726806A (en) | 2017-10-30 | 2019-05-07 | 上海寒武纪信息科技有限公司 | Information processing method and terminal device |
| CN108198125B (en) * | 2017-12-29 | 2021-10-08 | 深圳云天励飞技术有限公司 | Image processing method and device |
| CN110766128A (en) * | 2018-07-26 | 2020-02-07 | 北京深鉴智能科技有限公司 | Convolution calculation unit, calculation method and neural network calculation platform |
| CN109461125A (en) * | 2018-09-30 | 2019-03-12 | 南京信息工程大学 | Point 2-d gaussian filters device and image processing method based on FPGA |
| CN114202071B (en) * | 2022-02-17 | 2022-05-27 | 浙江光珀智能科技有限公司 | Deep convolutional neural network reasoning acceleration method based on data stream mode |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102496034A (en) * | 2011-11-29 | 2012-06-13 | 南京师范大学 | High-spatial resolution remote-sensing image bag-of-word classification method based on linear words |
| CN104798105A (en) * | 2012-11-20 | 2015-07-22 | 皇家飞利浦有限公司 | Integrated phenotyping employing image texture features. |
| CN105005786A (en) * | 2015-06-19 | 2015-10-28 | 南京航空航天大学 | Texture image classification method based on BoF and multi-feature fusion |
| CN105005781A (en) * | 2015-06-29 | 2015-10-28 | 中国人民解放军国防科学技术大学 | Robust extended local binary pattern texture feature extracting method |
-
2016
- 2016-06-21 CN CN201610449983.6A patent/CN106127672B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102496034A (en) * | 2011-11-29 | 2012-06-13 | 南京师范大学 | High-spatial resolution remote-sensing image bag-of-word classification method based on linear words |
| CN104798105A (en) * | 2012-11-20 | 2015-07-22 | 皇家飞利浦有限公司 | Integrated phenotyping employing image texture features. |
| CN105005786A (en) * | 2015-06-19 | 2015-10-28 | 南京航空航天大学 | Texture image classification method based on BoF and multi-feature fusion |
| CN105005781A (en) * | 2015-06-29 | 2015-10-28 | 中国人民解放军国防科学技术大学 | Robust extended local binary pattern texture feature extracting method |
Non-Patent Citations (2)
| Title |
|---|
| "基于FPGA的SAR图像快速纹理特征提取方法";郁锦锦 等;《天津理工大学学报》;20130831;第29卷(第4期);第22-27页 |
| "基于FPGA的遥感图像纹理特征取算法实现技术";段咏龙 等;《科学技术与工程》;20130531;第13卷(第13期);第3635-3641页 |
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