CN106100627B - But impulse response's switching on and shutting down branch puts control circuit - Google Patents
But impulse response's switching on and shutting down branch puts control circuit Download PDFInfo
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- CN106100627B CN106100627B CN201610548754.XA CN201610548754A CN106100627B CN 106100627 B CN106100627 B CN 106100627B CN 201610548754 A CN201610548754 A CN 201610548754A CN 106100627 B CN106100627 B CN 106100627B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
- H03K17/795—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar transistors
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Abstract
The invention relates to a startup and shutdown split control circuit with pulse response, which comprises a first input signal filter circuit, a first level voltage division circuit, a first interference isolation circuit and a first level conversion and filter circuit, wherein the input end of the first input signal filter circuit receives a startup signal; the input end of the second input signal filter circuit receives a shutdown signal, and the second input signal filter circuit, the second level voltage division circuit, the second interference isolation circuit and the second level conversion and filter circuit are connected in series; the output ends of the first and second level conversion and filter circuits are connected with the input end of the digital logic operation circuit, and the output end of the digital logic operation circuit is used as the output end of the switching on/off split control circuit. The invention has simple circuit, convenient realization, clear state and high reliability, prevents misoperation and repeated operation, and is very suitable for dangerous and complex electronic equipment and systems needing remote control.
Description
Technical Field
The invention relates to the technical field of startup and shutdown control circuits, in particular to a startup and shutdown split control circuit capable of responding to pulses.
Background
All electronic equipment needs a startup and shutdown control circuit, so that people can control the equipment at will, and the method is also a guarantee measure for equipment and personnel safety. The control voltage is divided into high and low, and strong current and weak current are controlled; the control circuit is divided into a mechanical switch and an electronic switch according to the structural form of the control circuit; the control signal form is divided into level control and pulse control. From the use point of view, the most common is a knife double-throw mechanical switch control circuit, which belongs to the level control type, is simple and practical, can control the on-off of any electronic equipment by directly switching on or off an input power circuit, and has the defects of low safety, short service life and poor reliability. The switch control circuit that a lot of operating voltage are weak current has appeared afterwards, realize electronic equipment's on & off control through indirect mode, for example keyboard switch, a key cycle switch, operating personnel security has improved greatly, owing to avoided the rigid switching of heavy current, switch circuit's life-span has also improved a lot greatly, but because the switch need be closed all the time, the electric current flows through the switch contact always, maintain a level output, the time is of a specified duration, contact failure appears easily in the switch contact, perhaps can't maintain the closure state, the reliability reduces.
The development of the electronic technology not only enables the volume of the on-off control circuit to be smaller and the quality to be lighter, but also enables the integration level of the on-off control circuit to be higher and the function to be stronger, and the on-off control circuit is more suitable for the special requirements of some electronic equipment. The development of technology has made some intelligent household appliances and facilities used by more and more families, and it is necessary to remotely control these intelligent terminals in order to make it possible to provide people with higher quality and safer lives. On one hand, the development dynamics can gradually meet the requirements of people on-off of a control circuit and various working states, rapid digital computation and data storage, and on the other hand, the on-off logic of the electronic equipment can be more reasonable, misoperation is prevented, and personnel and equipment are more effectively protected. Although the on-off control of most electronic equipment is more and more simple and more intelligent, the reliability is reduced, and the on-off state is somewhat disordered and is not easy to clearly distinguish. For some important, complex and high-risk devices and systems, their on-off control needs to be safer, more reliable and clearer.
Disclosure of Invention
The invention aims to provide a switching on/off split control circuit which can respond to pulses and control switching on/off respectively, so that equipment is safer and more reliable in working, and the switching on/off state is clearer.
In order to achieve the purpose, the invention adopts the following technical scheme: a startup and shutdown split control circuit with pulse response comprises a first input signal filter circuit, a first level voltage division circuit, a first interference isolation circuit, a first level conversion and filter circuit, a second input signal filter circuit, a second level voltage division circuit, a second interference isolation circuit, a second level conversion and filter circuit and a digital logic operation circuit, wherein the first input signal filter circuit, the first level voltage division circuit, the first interference isolation circuit, the first level conversion and filter circuit are used for processing startup signals; the input end of the first input signal filter circuit receives a starting-up signal, the output end of the first input signal filter circuit is connected with the input end of the first level voltage division circuit, the output end of the first level voltage division circuit is connected with the input end of the first interference isolation circuit, and the output end of the first interference isolation circuit is connected with the input end of the first level conversion and filter circuit; the input end of the second input signal filter circuit receives a shutdown signal, the output end of the second input signal filter circuit is connected with the input end of a second level voltage division circuit, the output end of the second level voltage division circuit is connected with the input end of a second interference isolation circuit, and the output end of the second interference isolation circuit is connected with the input end of a second level conversion and filter circuit; the output ends of the first level conversion and filter circuit and the second level conversion and filter circuit are connected with the input end of the digital logic operation circuit, and the output end of the digital logic operation circuit is used as the output end of the switching on/off split control circuit.
The first input signal filter circuit is composed of a diode V1, a resistor R2 and a capacitor C1, wherein the anode of the diode V1 receives a starting signal, the cathode of the diode V1 is respectively connected with one ends of the resistor R1 and the resistor R2, the other end of the resistor R1 is respectively connected with one end of the capacitor C1, one end of the resistor R3 and the input end of the first interference isolation circuit, the other end of the resistor R2, the other end of the capacitor C1 and the other end of the resistor R3 are grounded, and the resistor R1 and the resistor R3 form a first level voltage division circuit.
The second input signal filter circuit is composed of a diode V4, a resistor R7, a resistor R8 and a capacitor C3, the anode of the diode V4 receives a shutdown signal, the cathode of the diode V4 is respectively connected with one ends of the resistor R7 and the resistor R8, the other end of the resistor R7 is respectively connected with one end of the capacitor C3, one end of the resistor R9 and the input end of the second interference isolation circuit, the other end of the resistor R8, the other end of the capacitor C3 and the other end of the resistor R9 are grounded, and the resistor R7 and the resistor R9 form a second level voltage division circuit.
The first interference isolation circuit is composed of a resistor R1, an optocoupler N1A, a first independent power supply and a resistor R4, the optocoupler N1A adopts a TLP281-4 chip, the resistor R3 is bridged on a pin 1 and a pin 2 of the optocoupler N1A, a pin 16 of the optocoupler N1A is connected with the first independent power supply, and a pin 15 of the optocoupler N1A is connected with one end of the resistor R4 and the input end of the first level conversion and filter circuit respectively.
The second interference isolation circuit is composed of a resistor R7, an optocoupler N1B, a second independent power supply and a resistor R10, the optocoupler N1B adopts a TLP281-4 chip, the resistor R9 is bridged on pins 3 and 4 of the optocoupler N1B, a pin 14 of the optocoupler N1B is connected with the second independent power supply, and a pin 13 of the optocoupler N1B is connected with one end of the resistor R10 and the input end of the second level conversion and filter circuit respectively.
The first level conversion and filtering circuit is composed of a first independent power supply, an optocoupler N1A, a resistor R4, a diode V2, a resistor R5, a capacitor C2 and a resistor R6, wherein the optocoupler N1A adopts a TLP281-4 chip, 15 pins of the optocoupler N1A are respectively connected with one end of the resistor R4 and the anode of the diode V2, the other end of the resistor R4 is grounded, the cathode of the diode V2 is connected with one end of the resistor R5, the other end of the resistor R5 is respectively connected with the capacitor C2, the resistor R6 and a first input end of the digital logic operation circuit, and the capacitor C2 and the resistor R6 are grounded.
The second level conversion and filtering circuit is composed of a second independent power supply, an optocoupler N1B, a resistor R10, a diode V5, a resistor R11, a capacitor C4 and a resistor R12, the optocoupler N1B adopts a TLP281-4 chip, a pin 13 of the optocoupler N1B is respectively connected with one end of the resistor R10 and an anode of the diode V5, the other end of the resistor R10 is grounded, a cathode of the diode V5 is connected with one end of the resistor R11, the other end of the resistor R11 is respectively connected with the capacitor C4, the resistor R12 and a second input end of the digital logic operation circuit, and the capacitor C4 and the resistor R12 are grounded.
The digital logic operation circuit comprises a first double-input AND gate integrated circuit D1A, a first four in-phase/reverse-phase buffer integrated circuit D2A, a diode V3, a second double-input AND gate integrated circuit D1B, a second four in-phase/reverse-phase buffer integrated circuit D2B and a diode V6, wherein the first input end of the first double-input AND gate integrated circuit D1A is connected with the output end of a first level conversion and filter circuit, the second input end of the first double-input AND gate integrated circuit D1B is connected with the reverse-phase output end of the second four in-phase/reverse-phase buffer integrated circuit D2B, the output ends of the first double-input AND gate integrated circuit D1A are respectively connected with the anode of the diode V3 and the input end of the first four in-phase/reverse-phase buffer integrated circuit D2A, the cathode of the diode V3 is respectively connected with the output end of the first level conversion and filter circuit and the first input end of the first double-input AND gate integrated circuit D1A, and the output end of the first four in-phase/reverse-phase buffer integrated circuit D2A is used as the output end of the switching machine split control circuit; the first and second input ends of the second double-input and gate integrated circuit D1B are connected and then respectively connected with the output end of the second level conversion and filter circuit and the cathode of the diode V6, the anode of the diode V6 is connected with the in-phase output end of the second four in-phase/reverse-phase buffer integrated circuit D2B, and the output end of the second double-input and gate integrated circuit D1B is connected with the input end of the second four in-phase/reverse-phase buffer integrated circuit D2B; the first double-input and gate integrated circuit D1A and the second double-input and gate integrated circuit D1B employ IC chips 4081, and the first four in-phase/reverse-phase buffer integrated circuit D2A and the second four in-phase/reverse-phase buffer integrated circuit D2B employ IC chips 4041.
According to the technical scheme, the invention has the following advantages: firstly, the invention utilizes the effective combination of basic analog electronic circuits and digital logic circuits, processes input startup signals and shutdown signals by filtering, voltage division, isolation, level conversion filtering and the like, then utilizes a logic operation circuit to carry out logic control, combines the startup and shutdown operation condition of the last step to determine whether to respond to the current startup and shutdown operation, and outputs correct startup signals or shutdown signals; secondly, the circuit of the invention is simple, the realization is convenient, the state is clear, the reliability is high, the misoperation and the repeated operation are prevented, and the invention is very suitable for dangerous and complex electronic equipment and systems which need remote control.
Drawings
FIG. 1 is a block diagram of the circuit of the present invention;
fig. 2 is a schematic circuit diagram of the present invention.
Detailed Description
As shown in fig. 1, a power on/off separate control circuit with impulse response includes a first input signal filter circuit, a first level voltage divider circuit, a first interference isolation circuit, a first level conversion and filter circuit for processing a power on signal, a second input signal filter circuit, a second level voltage divider circuit, a second interference isolation circuit, a second level conversion and filter circuit for processing a power off signal, and a digital logic operation circuit; the input end of the first input signal filter circuit receives a starting-up signal, the output end of the first input signal filter circuit is connected with the input end of the first level voltage division circuit, the output end of the first level voltage division circuit is connected with the input end of the first interference isolation circuit, and the output end of the first interference isolation circuit is connected with the input end of the first level conversion and filter circuit; the input end of the second input signal filter circuit receives a shutdown signal, the output end of the second input signal filter circuit is connected with the input end of a second level voltage division circuit, the output end of the second level voltage division circuit is connected with the input end of a second interference isolation circuit, and the output end of the second interference isolation circuit is connected with the input end of a second level conversion and filter circuit; the output ends of the first level conversion and filter circuit and the second level conversion and filter circuit are connected with the input end of the digital logic operation circuit, and the output end of the digital logic operation circuit is used as the output end of the switching on/off split control circuit.
As shown in fig. 2, the first input signal filter circuit is composed of a diode V1, a resistor R2, and a capacitor C1, an anode of the diode V1 receives a startup signal, a cathode of the diode V1 is connected to one ends of the resistor R1 and the resistor R2, the other end of the resistor R1 is connected to one end of the capacitor C1, one end of the resistor R3, and an input end of the first interference isolation circuit, and the other end of the resistor R2, the other end of the capacitor C1, and the other end of the resistor R3 are grounded, where the diode V1 and the resistor R1 ensure that forward signals are valid, and simultaneously filter out interference noise with low levels, and the resistor R2 and the capacitor C1 filter some interference pulse signals with narrow pulse widths. The resistor R1 and the resistor R3 form a first level voltage division circuit, and necessary voltage division is carried out on input effective signals by changing the resistance values of the resistor R1 and the resistor R3, so that the amplitude of signals entering a post-stage circuit is ensured to be within a reasonable range.
As shown in fig. 2, the second input signal filter circuit is composed of a diode V4, a resistor R7, a resistor R8, and a capacitor C3, an anode of the diode V4 receives a shutdown signal, a cathode of the diode V4 is connected to one ends of the resistor R7 and the resistor R8, the other end of the resistor R7 is connected to one end of the capacitor C3, one end of the resistor R9, and an input end of the second interference isolation circuit, and the other end of the resistor R8, the other end of the capacitor C3, and the other end of the resistor R9 are grounded, where the diode V2 and the resistor R7 ensure that forward signals are valid, and simultaneously filter out interference noise with relatively low levels, and the resistor R8 and the capacitor C3 filter some interference pulse signals with relatively narrow pulse widths. The resistor R7 and the resistor R9 form a second level voltage division circuit, and necessary voltage division is carried out on the input effective signal by changing the resistance values of the resistor R7 and the resistor R9, so that the signal amplitude entering a post-stage circuit is ensured to be within a reasonable range. The voltage division ratio of the two series circuits of the first level voltage division circuit and the second level voltage division circuit can be adjusted according to the amplitude of the input signal.
As shown in fig. 2, the first interference isolation circuit is composed of a resistor R1, an optocoupler N1A, a first independent power supply and a resistor R4, the optocoupler N1A employs a TLP281-4 chip, the resistor R3 is bridged over a pin 1 and a pin 2 of the optocoupler N1A, a pin 16 of the optocoupler N1A is connected to the first independent power supply, and a pin 15 of the optocoupler N1A is connected to one end of the resistor R4 and an input end of the first level conversion and filter circuit, respectively. The second interference isolation circuit is composed of a resistor R7, an optocoupler N1B, a second independent power supply and a resistor R10, the optocoupler N1B adopts a TLP281-4 chip, the resistor R9 is bridged on pins 3 and 4 of the optocoupler N1B, a pin 14 of the optocoupler N1B is connected with the second independent power supply, and a pin 13 of the optocoupler N1B is connected with one end of the resistor R10 and the input end of the second level conversion and filter circuit respectively. The optocoupler N1A and the optocoupler N1B are optoelectronic couplers, signal isolation is mainly completed by the optocoupler N1A and the optocoupler N1B, the resistor R1 and the resistor R7 limit input current flowing through the optoelectronic couplers, and the resistor R4 and the resistor R10 limit output current flowing through the optoelectronic couplers, so that the optoelectronic couplers are protected from reliable work.
As shown in fig. 2, the first level conversion and filtering circuit is composed of a first independent power supply, an optocoupler N1A, a resistor R4, a diode V2, a resistor R5, a capacitor C2, and a resistor R6, the optocoupler N1A employs a TLP281-4 chip, 15 pins of the optocoupler N1A are respectively connected to one end of the resistor R4 and an anode of the diode V2, the other end of the resistor R4 is grounded, a cathode of the diode V2 is connected to one end of the resistor R5, the other end of the resistor R5 is respectively connected to the capacitor C2, the resistor R6, and a first input end of the digital logic operation circuit, and the capacitor C2 and the resistor R6 are grounded. The level of a starting signal is converted into a +15V level by the first independent power supply, the optocoupler N1A and the resistor R4, and the level-converted signal enters a signal filter circuit consisting of a diode V2, a resistor R5, a capacitor C2 and a resistor R6, so that interference possibly caused by the power supply is filtered, and the requirement of a rear-stage logic operation circuit is met.
As shown in fig. 2, the second level conversion and filtering circuit is composed of a second independent power supply, an optocoupler N1B, a resistor R10, a diode V5, a resistor R11, a capacitor C4, and a resistor R12, the optocoupler N1B employs a TLP281-4 chip, pins 13 of the optocoupler N1B are respectively connected with one end of the resistor R10 and an anode of the diode V5, the other end of the resistor R10 is grounded, a cathode of the diode V5 is connected with one end of the resistor R11, the other end of the resistor R11 is respectively connected with the capacitor C4, the resistor R12, and a second input end of the digital logic operation circuit, and the capacitor C4 and the resistor R12 are grounded. The level of a shutdown signal is converted into a +15V level by a second independent power supply, an optocoupler N1B and a resistor R10, and the level-converted signal enters a signal filter circuit consisting of a diode V5, a resistor R11, a capacitor C4 and a resistor R12, so that interference possibly caused by the power supply is filtered, and the requirement of a rear-stage logic operation circuit is met.
As shown in fig. 2, the digital logic operation circuit includes a first double-input and gate integrated circuit D1A, a first four in-phase/reverse-phase buffer integrated circuit D2A, a diode V3, a second double-input and gate integrated circuit D1B, a second four in-phase/reverse-phase buffer integrated circuit D2B, and a diode V6, wherein a first input end of the first double-input and gate integrated circuit D1A is connected to an output end of the first level shifter and filter circuit, a second input end thereof is connected to a reverse-phase output end of the second four in-phase/reverse-phase buffer integrated circuit D2B, an output end thereof is connected to an anode of the diode V3 and an input end of the first four in-phase/reverse-phase buffer integrated circuit D2A, a cathode of the diode V3 is connected to an output end of the first level shifter and filter circuit and a first input end of the first double-input and gate integrated circuit D1A, and an output end of the first four in-phase/reverse-phase buffer integrated circuit D2A is used as an output end of the switch separate control circuit; the first input end and the second input end of the second double-input AND gate integrated circuit D1B are connected and then respectively connected with the output end of the second level conversion and filter circuit and the cathode of the diode V6, the anode of the diode V6 is connected with the in-phase output end of the second four in-phase/reverse-phase buffer integrated circuit D2B, and the output end of the second double-input AND gate integrated circuit D1B is connected with the input end of the second four in-phase/reverse-phase buffer integrated circuit D2B; the first double-input and gate integrated circuit D1A and the second double-input and gate integrated circuit D1B adopt an IC chip 4081, and the first four in-phase/reverse-phase buffer integrated circuit D2A and the second four in-phase/reverse-phase buffer integrated circuit D2B adopt an IC chip 4041. The power on/off signal generated by the preceding stage enters a digital logic operation circuit for logic control, and a correct power on signal or a power off signal or an invalid power on/off signal is output without response.
The present invention is further described below with reference to fig. 1 and 2.
The on and off signals are respectively generated by two different keys, namely, direct current level signals or pulse signals, and are sent to an input signal filter circuit, a level voltage division circuit and an interference isolation circuit for anti-interference processing, then enter a level conversion and filter circuit and then are sent to a digital logic operation circuit for processing, and corresponding on and off control signals are generated.
The system consists of an analog signal processing part and a digital logic operation part, wherein the analog signal processing part comprises 2 input signal filter circuits, 2 level conversion circuits, 2 interference isolation circuits and 2 level conversion and filter circuits, the start-up signals and the shutdown signals are respectively processed and then uniformly sent to the second part, namely, the rear stage 1 digital logic operation circuit is used for processing, and according to the result of the logic operation, three conditions exist: and outputting a corresponding power-on signal, or a power-off signal, or not responding to the input signal.
The first and second level voltage-dividing circuits are shown in fig. 2, the proportional relation between the resistor R1 and the resistor R3 and the resistors R7 and R9 can be adjusted according to the input signal amplitude, so as to perform necessary voltage division on the input effective signal amplitude, and ensure that the signal amplitude entering the post-stage circuit is within a reasonable range.
Assuming that the amplitude of the input signal Ui is, after the voltage division, the amplitude of the output signal Uo is:
boot signal Uo = Ui × (R1/(R1 + R3))
Shutdown signal Uo = Ui × (R7/(R7 + R9))
The first interference isolation circuit is shown in fig. 2, values of the resistor R1 and the resistor R7 may be adjusted according to an amplitude of an input signal, and then the resistor R3 and the resistor R9 are matched to achieve a proper voltage division proportional relationship, but when the resistance values of the resistor R1 and the resistor R7 are determined, an input current flowing through the optoelectronic coupler is also considered at the same time, so that the resistance values of the resistor R1 and the resistor R7 need to be determined first, and then the resistance values of the resistor R3 and the resistor R9 are determined according to the required proportional relationship, the resistor R4 and the resistor R10 may limit an output current flowing through the optoelectronic coupler, thereby protecting the reliable operation of the optoelectronic coupler, the resistance values of the resistor R4 and the resistor R10 cannot be too small, otherwise, the load of a power supply may be increased.
The digital logic operation circuit is shown in figure 2, and only has one independent circuit, and consists of D1A, D2A, V3, D1B, D2B and V6, a starting signal generated by a preceding stage is sent to a D1A:1 end, a shutdown signal is sent to a D1A:5 end, after the two signals enter the logic operation circuit, the logic operation control is carried out by combining the initial starting and shutdown states of the circuit, and then the D12A:1 end outputs a correct starting signal or a shutdown signal or considers that the currently sent starting and shutdown signals are invalid, does not respond, and maintains the state of the original output signal unchanged. D1 is a double-input AND gate integrated circuit, which comprises 4 units of D1A, D1B, D1C and D1D, and the circuit uses two units of D1A and D1B. D2 is a four-in-phase/reverse-phase buffer integrated circuit, which comprises 4 units of D1A, D1B, D1C and D1D, and the circuit uses two units of D1A and D1B.
The starting signal or the shutdown signal sent by a console or a remote control system, no matter a direct current level signal or a pulse signal, is respectively sent into two links with the same working principle to carry out a series of processing, the processing links comprise interference filtering, amplitude voltage division, signal isolation, level conversion, secondary interference filtering and the like, the processed signal is sent into a general digital logic operation circuit, logic operation is carried out by combining the previous starting and shutdown states of the circuit, and according to the result of the logic operation, the output control signal has three possibilities: the first case is to output the correct boot signal; the second case is to output the correct shutdown signal; the third condition is that the current sent signals are invalid on and off signals, which belong to improper operation or misoperation, do not respond, and maintain the original state of the output signals.
In summary, the present invention includes a first input signal filter circuit, an input terminal of which receives a power-on signal, the first input signal filter circuit, a first level divider circuit, an output terminal of the first interference isolation circuit, and a first level shifter and filter circuit being connected in series; the input end of the second input signal filter circuit receives a shutdown signal, and the second input signal filter circuit, the second level voltage division circuit, the second interference isolation circuit and the second level conversion and filter circuit are connected in series; the output ends of the first and second level conversion and filter circuits are connected with the input end of the digital logic operation circuit, and the output end of the digital logic operation circuit is used as the output end of the switching on/off split control circuit. The invention utilizes the effective combination of the analog circuit and the digital logic circuit, carries out necessary processing on the input power-on and power-off signals, utilizes the logic circuit, combines the power-on and power-off operation condition of the previous step, carries out signal logic operation control, judges whether the current operation is effective or not, and determines whether to respond to the current power-on and power-off operation or not. The invention has simple circuit, convenient realization, clear state and high reliability, prevents misoperation and repeated operation, and is very suitable for dangerous and complex electronic equipment and systems needing remote control.
Claims (1)
1. A but impulse response's switching on and shutting down branch puts control circuit which characterized in that: the system comprises a first input signal filter circuit, a first level voltage division circuit, a first interference isolation circuit, a first level conversion and filter circuit, a second input signal filter circuit, a second level voltage division circuit, a second interference isolation circuit, a second level conversion and filter circuit and a digital logic operation circuit, wherein the first input signal filter circuit is used for processing a starting signal; the input end of the first input signal filter circuit receives a starting signal, the output end of the first input signal filter circuit is connected with the input end of the first level voltage division circuit, the output end of the first level voltage division circuit is connected with the input end of the first interference isolation circuit, and the output end of the first interference isolation circuit is connected with the input end of the first level conversion and filter circuit; the input end of the second input signal filter circuit receives a shutdown signal, the output end of the second input signal filter circuit is connected with the input end of the second level voltage division circuit, the output end of the second level voltage division circuit is connected with the input end of the second interference isolation circuit, and the output end of the second interference isolation circuit is connected with the input end of the second level conversion and filter circuit; the output ends of the first level conversion and filter circuit and the second level conversion and filter circuit are connected with the input end of the digital logic operation circuit, and the output end of the digital logic operation circuit is used as the output end of the on-off split control circuit;
the first input signal filter circuit is composed of a diode V1, a resistor R2 and a capacitor C1, wherein the anode of the diode V1 receives a starting signal, the cathode of the diode V1 is respectively connected with one ends of the resistor R1 and the resistor R2, the other end of the resistor R1 is respectively connected with one end of the capacitor C1, one end of the resistor R3 and the input end of the first interference isolation circuit, the other end of the resistor R2, the other end of the capacitor C1 and the other end of the resistor R3 are grounded, and the resistor R1 and the resistor R3 form a first level voltage division circuit;
the second input signal filter circuit is composed of a diode V4, a resistor R7, a resistor R8 and a capacitor C3, the anode of the diode V4 receives a shutdown signal, the cathode of the diode V4 is respectively connected with one ends of the resistor R7 and the resistor R8, the other end of the resistor R7 is respectively connected with one end of the capacitor C3, one end of the resistor R9 and the input end of the second interference isolation circuit, the other end of the resistor R8, the other end of the capacitor C3 and the other end of the resistor R9 are grounded, and the resistor R7 and the resistor R9 form a second level voltage division circuit;
the first interference isolation circuit is composed of a resistor R1, an optocoupler N1A, a first independent power supply and a resistor R4, the optocoupler N1A adopts a TLP281-4 chip, the resistor R3 is bridged on a pin 1 and a pin 2 of the optocoupler N1A, a pin 16 of the optocoupler N1A is connected with the first independent power supply, and a pin 15 of the optocoupler N1A is respectively connected with one end of the resistor R4 and the input end of the first level conversion and filter circuit;
the second interference isolation circuit is composed of a resistor R7, an optocoupler N1B, a second independent power supply and a resistor R10, the optocoupler N1B adopts a TLP281-4 chip, the resistor R9 is bridged on pins 3 and 4 of the optocoupler N1B, a pin 14 of the optocoupler N1B is connected with the second independent power supply, and a pin 13 of the optocoupler N1B is respectively connected with one end of the resistor R10 and the input end of the second level conversion and filter circuit;
the first level conversion and filtering circuit comprises a first independent power supply, an optocoupler N1A, a resistor R4, a diode V2, a resistor R5, a capacitor C2 and a resistor R6, wherein the optocoupler N1A adopts a TLP281-4 chip, a pin 15 of the optocoupler N1A is respectively connected with one end of the resistor R4 and an anode of the diode V2, the other end of the resistor R4 is grounded, a cathode of the diode V2 is connected with one end of the resistor R5, the other end of the resistor R5 is respectively connected with the capacitor C2, the resistor R6 and a first input end of the digital logic operation circuit, and the capacitor C2 and the resistor R6 are grounded;
the second level conversion and filtering circuit comprises a second independent power supply, an optocoupler N1B, a resistor R10, a diode V5, a resistor R11, a capacitor C4 and a resistor R12, wherein the optocoupler N1B adopts a TLP281-4 chip, a pin 13 of the optocoupler N1B is respectively connected with one end of the resistor R10 and an anode of the diode V5, the other end of the resistor R10 is grounded, a cathode of the diode V5 is connected with one end of the resistor R11, the other end of the resistor R11 is respectively connected with the capacitor C4, the resistor R12 and a second input end of the digital logic operation circuit, and the capacitor C4 and the resistor R12 are grounded;
the digital logic operation circuit comprises a first double-input AND gate integrated circuit D1A, a first four in-phase/reverse-phase buffer integrated circuit D2A, a diode V3, a second double-input AND gate integrated circuit D1B, a second four in-phase/reverse-phase buffer integrated circuit D2B and a diode V6, wherein the first input end of the first double-input AND gate integrated circuit D1A is connected with the output end of a first level conversion and filter circuit, the second input end of the first double-input AND gate integrated circuit D1B is connected with the reverse-phase output end of the second four in-phase/reverse-phase buffer integrated circuit D2B, the output ends of the first double-input AND gate integrated circuit D1A are respectively connected with the anode of the diode V3 and the input end of the first four in-phase/reverse-phase buffer integrated circuit D2A, the cathode of the diode V3 is respectively connected with the output end of the first level conversion and filter circuit and the first input end of the first double-input AND gate integrated circuit D1A, and the output end of the first four in-phase/reverse-phase buffer integrated circuit D2A is used as the output end of the switching machine split control circuit; the first input end and the second input end of the second double-input AND gate integrated circuit D1B are connected and then respectively connected with the output end of the second level conversion and filter circuit and the cathode of the diode V6, the anode of the diode V6 is connected with the in-phase output end of the second four in-phase/reverse-phase buffer integrated circuit D2B, and the output end of the second double-input AND gate integrated circuit D1B is connected with the input end of the second four in-phase/reverse-phase buffer integrated circuit D2B; the first double-input and gate integrated circuit D1A and the second double-input and gate integrated circuit D1B employ IC chips 4081, and the first four in-phase/reverse-phase buffer integrated circuit D2A and the second four in-phase/reverse-phase buffer integrated circuit D2B employ IC chips 4041.
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