CN106100394A - A kind of commutator - Google Patents
A kind of commutator Download PDFInfo
- Publication number
- CN106100394A CN106100394A CN201610589530.3A CN201610589530A CN106100394A CN 106100394 A CN106100394 A CN 106100394A CN 201610589530 A CN201610589530 A CN 201610589530A CN 106100394 A CN106100394 A CN 106100394A
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- Prior art keywords
- striding capacitance
- nmos tube
- electrically connected
- substrate
- grid
- Prior art date
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/23—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only arranged for operation in parallel
Abstract
The invention discloses a kind of commutator, at least include single stage power conversion circuit；Single stage power conversion circuit includes the first striding capacitance, the second striding capacitance, the first NMOS tube, the second NMOS tube, the first PMOS, the second PMOS and output capacitance；The substrate of the first NMOS tube and source electrode are electrically connected to the second outfan of front stage circuits, and with the first outfan insulation of front stage circuits；The substrate of the second NMOS tube and source electrode are electrically connected to the first outfan of front stage circuits, and with the second outfan insulation of front stage circuits；The anode of the second end electrical connection signal source of the first striding capacitance, the negative terminal of the second end electrical connection signal source of the second striding capacitance；As the outfan of single stage power conversion circuit after the substrate of the first PMOS and source electrode, and the substrate of the second PMOS and source electrode electrical connection.Present invention reduces minimum input voltage, improve the commutator power-conversion efficiencies when extra low voltage inputs.
Description
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of commutator.
Background technology
Commutator is widely used in radio RF recognition technology, wireless charging, supply chain management and wireless sensor network.
Wherein power conversion efficiency (Power Conversion Efficiency, PCE) and minimum input voltage are largely fixed
The quality of commutator performance.
Traditional single stage power conversion device is as it is shown in figure 1, be positive voltage when inputting anode, when input negative terminal is negative voltage, and metal
In oxide semiconductor field effect transistor, i.e. metal-oxide-semiconductor, P1 and N2 turns on, P2 and N1 turns off, and Vx point is high level, and Vy point
Being charged to ground, forward conduction electric current exports through P1.When input negative terminal is positive voltage, input anode is when being negative voltage, P2 and
N1 turns on, P1 and N2 turns off, and Vy point is high level, and Vx point is charged to ground, and forward conduction electric current exports through P2.
Traditional multi-stage rectifying device forms multi-stage rectifying device as in figure 2 it is shown, utilize single stage power conversion device to connect, upper level
Direct current inputs the direct-flow input end into next stage, and improves final output voltage by accumulation.When input anode is positive voltage,
When input negative terminal is negative voltage, in metal-oxide-semiconductor, N4, P3, N6, P5, N2 and P1 turn on, and electric current flows into next stage by P3, P5, P1
Or load.And when input anode be negative voltage, input negative terminal be positive voltage time, N3, P4, N5, P6, N1 and P2 turn on, electric current lead to
Cross P4, P6, P2 and flow into next stage or load.
Owing to the commutator of traditional structure could can only turn on Vy-Vx is more than threshold voltage when, thus minimum defeated
Enter voltage the highest.Meanwhile, because under the situation of low-voltage, the commutator of traditional structure is difficult to be biased into saturation region, because of
This limits the working range of RF identification or sensor network dramatically.
Summary of the invention
In view of this, the purpose of the present invention is to propose to a kind of commutator, to reduce minimum input voltage, improve commutator and exist
Power-conversion efficiencies during extra low voltage input.
For achieving the above object, the present invention adopts the following technical scheme that
Embodiments provide a kind of commutator, at least include single stage power conversion circuit；
Described single stage power conversion circuit include the first striding capacitance, the second striding capacitance, the first NMOS tube, the second NMOS tube,
First PMOS, the second PMOS and output capacitance；
The substrate of described first NMOS tube and source electrode are electrically connected to the second outfan of front stage circuits, and electric with described prime
The first outfan insulation on road, grid is electrically connected to the first of described second striding capacitance with the grid of described first PMOS
End, the drain electrode of drain electrode and described first PMOS is electrically connected to the first end of described first striding capacitance；
The substrate of described second NMOS tube and source electrode are electrically connected to the first outfan of described front stage circuits, and with described before
Second outfan insulation of level circuit, the grid of grid and described second PMOS is electrically connected to the of described first striding capacitance
One end, the drain electrode of drain electrode and described second PMOS is electrically connected to the first end of described second striding capacitance；
The anode of the second end electrical connection signal source of described first striding capacitance, the second end electricity of described second striding capacitance
Connect the negative terminal of described signal source；
The substrate of described first PMOS and source electrode, and the substrate of described second PMOS and source electrode electrical connection after conduct
The outfan of described single stage power conversion circuit；
Described output capacitance is electrically connected between described outfan and ground.
Further, when described commutator is single stage power conversion device, substrate and the source electrode of described first NMOS tube are electrically connected to
The negative terminal of described signal source；
The substrate of described second NMOS tube and source electrode are electrically connected to the anode of described signal source.
Further, when described commutator is multi-stage rectifying device, described commutator also includes multistage AC boosting circuit；
Described front stage circuits is the final stage AC boosting circuit in described multistage AC boosting circuit.
Further, described multistage AC boosting circuit includes first order AC boosting circuit and second level AC boosting electricity
Road；
Described first order AC boosting circuit includes the 3rd striding capacitance, the 4th striding capacitance, the 3rd NMOS tube and the 4th
NMOS tube；Described second level AC boosting circuit includes the 5th striding capacitance, the 6th striding capacitance, the 5th NMOS tube and the 6th
NMOS tube；
The substrate of described 3rd NMOS tube and source electrode are electrically connected to the negative terminal of described signal source, and grid is electrically connected to described
First end of four striding capacitances, drain electrode is electrically connected to described 3rd striding capacitance with substrate and the grid of described 6th NMOS tube
First end；
The substrate of described 4th NMOS tube and source electrode are electrically connected to the anode of described signal source, and grid is electrically connected to described
First end of three striding capacitances, drain electrode is electrically connected to described 4th striding capacitance with substrate and the grid of described 5th NMOS tube
First end；
The grid of described 5th NMOS tube is electrically connected to the first end of described 6th striding capacitance, drain electrode and described second
The substrate of NMOS tube and grid are electrically connected to the first end of described 5th striding capacitance；
The grid of described 6th NMOS tube is electrically connected to the first end of described 5th striding capacitance, drain electrode and described first
The substrate of NMOS tube and grid are electrically connected to the first end of described 6th striding capacitance；
Second end of described 3rd striding capacitance and the second end of described 5th striding capacitance electrically connect described signal source
Anode, the second end of described 4th striding capacitance and the second end of described 6th striding capacitance electrically connect the negative of described signal source
End.
Further, described 3rd NMOS tube, the 4th NMOS tube, the 5th NMOS tube and the channel width-over-length ratio of the 6th NMOS tube
Identical, the size of the 3rd striding capacitance, the 4th striding capacitance, the 5th striding capacitance and the 6th striding capacitance is identical.
Further, described first NMOS tube is identical with the channel width-over-length ratio of described second NMOS tube, a described PMOS
Manage identical with the channel width-over-length ratio of described second PMOS, described first striding capacitance and the size phase of described second striding capacitance
With.
The invention has the beneficial effects as follows: the commutator that the present invention provides, utilize the prime of single stage power conversion circuit in commutator
The substrate of the output signal debiasing metal-oxide-semiconductor of circuit, increases the bulk effect of metal-oxide-semiconductor, effectively reduces the threshold voltage of metal-oxide-semiconductor
And resistance, and then reduce the minimum input voltage of commutator, meanwhile, rectification can be effectively improved by reducing threshold voltage
The device power-conversion efficiencies when extra low voltage inputs.
Accompanying drawing explanation
Below by describing the exemplary embodiment of the present invention in detail by referring to accompanying drawing, make those of ordinary skill in the art
Become apparent from the above-mentioned and other feature and advantage of the present invention, in accompanying drawing:
Fig. 1 is the circuit diagram of traditional single stage power conversion device；
Fig. 2 is the circuit diagram of traditional multi-stage rectifying device；
Fig. 3 is the circuit diagram of the single stage power conversion device that the embodiment of the present invention one provides；
Fig. 4 is the efficiency curve diagram of the single stage power conversion device that the embodiment of the present invention one provides；
Fig. 5 is the output voltage curve chart of the single stage power conversion device that the embodiment of the present invention one provides；
Fig. 6 is the circuit diagram of the multi-stage rectifying device that the embodiment of the present invention two provides.
Detailed description of the invention
Further illustrate technical scheme below in conjunction with the accompanying drawings and by detailed description of the invention.May be appreciated
It is that specific embodiment described herein is used only for explaining the present invention, rather than limitation of the invention.Further need exist for explanation
, for the ease of describing, accompanying drawing illustrate only part related to the present invention rather than entire infrastructure.
Embodiment one
A kind of commutator that the present invention provides, can be single stage power conversion device or multi-stage rectifying device, it is adaptable to low input
Situation, it is possible to decrease the minimum input voltage of commutator, improve the commutator power-conversion efficiencies when extra low voltage inputs.
Concrete, the commutator of the present invention at least includes single stage power conversion circuit.
Wherein, single stage power conversion circuit include the first striding capacitance, the second striding capacitance, the first NMOS tube, the second NMOS tube,
First PMOS, the second PMOS and output capacitance；
The substrate of the first NMOS tube and source electrode are electrically connected to the second outfan of front stage circuits, and with the first of front stage circuits
Outfan insulate, and the grid of grid and the first PMOS is electrically connected to the first end of the second striding capacitance, drain electrode and a PMOS
The drain electrode of pipe is electrically connected to the first end of the first striding capacitance；
The substrate of the second NMOS tube and source electrode are electrically connected to the first outfan of front stage circuits, and with the second of front stage circuits
Outfan insulate, and the grid of grid and the second PMOS is electrically connected to the first end of the first striding capacitance, drain electrode and the 2nd PMOS
The drain electrode of pipe is electrically connected to the first end of the second striding capacitance；
The anode of the second end electrical connection signal source of the first striding capacitance, the second end electrical connection signal of the second striding capacitance
The negative terminal in source；
The substrate of the first PMOS and source electrode, and the substrate of the second PMOS and source electrode electrical connection after as single stage power conversion
The outfan of circuit；
Output capacitance is electrically connected between outfan and ground.
Exemplary, Fig. 3 is the circuit diagram of the single stage power conversion device that the embodiment of the present invention one provides.As it is shown on figure 3, this single-stage
Commutator includes single stage power conversion circuit, this single stage power conversion circuit include the first striding capacitance FC1, the second striding capacitance FC2, first
NMOS tube N1, the second NMOS tube N2, the first PMOS P1, the second PMOS P2 and output capacitance Cout；Wherein, the substrate of N1 and
Source electrode is electrically connected to the negative terminal of signal source, and the grid of grid and P1 is electrically connected to first end of FC2, and the drain electrode with P1 that drains is electrically connected
It is connected to first end of FC1；The substrate of N2 and source electrode are electrically connected to the anode of signal source, and grid is electrically connected to FC1 with the grid of P2
The first end, drain electrode and the drain electrode of P2 are electrically connected to first end of FC2；The anode of the second end electrical connection signal source of FC1, FC2
Second end electrical connection signal source negative terminal；The substrate of P1 and source electrode, and the substrate of P2 and source electrode electrical connection after as single-stage
The outfan of rectification circuit；Cout is electrically connected between outfan and ground.
Wherein, the channel width-over-length ratio of N1 with N2 is identical, and the channel width-over-length ratio of P1 with P2 is identical, the size phase of FC1 and FC2
With.
In the present embodiment, when the anode of signal source is positive voltage, and when the negative terminal of signal source is negative voltage, FC1 can be electrically charged,
And Vx point becomes high level, Vy point becomes low level.The grid of N1 and P1 is connected to Vy, so P1 conducting, electric current is by FC1
Flow to load Rload, and N1 turns off, and prevents leakage current from flowing out.The grid of N2 and P2 is connected to Vx, therefore N2 conducting, electricity
Flow and flowed into Vy by the anode of signal source, FC2 is charged.And next cycle, when the anode of signal source is negative voltage, signal
When the negative terminal in source is positive voltage, FC2 is electrically charged, and Vy is high level, and Vx is low level.N2 and P2 is biased by low level, therefore
P2 turns on, and electric current is flowed to load Rload by FC2, and N2 turns off, and prevents leakage current from flowing out.N1 and P1 is biased by high level, therefore
N1 turns on, and the negative terminal of signal source charges to FC1.
Owing to when N1 and N2 turns on, traditional structure is to be charged to FC1 and FC2 by ground, and the present invention is defeated by signal source
The positive level entered is FC1 and FC2 charging, and therefore striding capacitance can accumulate more charge, for the release in next cycle.And due to
The substrate of metal-oxide-semiconductor is biased bigger, so metal-oxide-semiconductor threshold voltage is less, and then can be under conditions of lower input voltage
Work.
With reference to Fig. 4, solid line is the efficiency curve of single stage power conversion device of the present invention, and dotted line is the efficiency of traditional single stage power conversion device
Curve.In figure, the coordinate of A, B, C and D point respectively (276.0824,34.3842), (276.0824,20.1995),
(327.3796,57.5576) and (327.3796,48.0714), i.e. when input voltage is 276.0824mV, the list of the present invention
The efficiency of level commutator is 34.3842%, and the efficiency of traditional single stage power conversion device is 20.1995%, when input voltage is
During 327.3796mV, the efficiency of the single stage power conversion device of the present invention is 57.5576%, and the efficiency of traditional single stage power conversion device is
48.0714%.
With reference to Fig. 5, solid line is the output voltage curve of single stage power conversion device of the present invention, and dotted line is traditional single stage power conversion device
Output voltage curve.In figure, the coordinate of a, b, c and d point respectively (281.8584,297.2797), (281.8584,
116.1994), (327.0,578.275) and (327.0,279.0926), i.e. when input voltage is 281.8584mV, the present invention
The output voltage of single stage power conversion device be 297.2797mV, the output voltage of traditional single stage power conversion device is 116.1994mV, when
When input voltage is 327.0mV, the output voltage of the single stage power conversion device of the present invention is 578.275mV, traditional single stage power conversion device
Output voltage be 279.0926mV.
To sum up, when extra low voltage inputs, the power conversion efficiency of the single stage power conversion device of the present invention is significantly increased.
The single stage power conversion device that the embodiment of the present invention one provides, utilizes the defeated of the front stage circuits of single stage power conversion circuit in commutator
Go out the substrate of signal debiasing metal-oxide-semiconductor, increase the bulk effect of metal-oxide-semiconductor, effectively reduce threshold voltage and the resistance of metal-oxide-semiconductor,
And then reduce the minimum input voltage of commutator, meanwhile, commutator can be effectively improved super by reducing threshold voltage
Power-conversion efficiencies during low-voltage input.
Embodiment two
Fig. 6 is the circuit diagram of the multi-stage rectifying device that the embodiment of the present invention two provides.The present embodiment is different from embodiment one
It is that the commutator of the present embodiment is multi-stage rectifying device.As shown in Figure 6, this multi-stage rectifying device can include that single stage power conversion circuit is with many
Level AC boosting circuit.In the present embodiment, front stage circuits is the final stage AC boosting circuit in multistage AC boosting circuit.
Wherein, the single stage power conversion circuit in the present embodiment is identical with embodiment one, and multistage AC boosting circuit can wrap
Include first order AC boosting circuit and second level AC boosting circuit.
First order AC boosting circuit include the 3rd striding capacitance FC3, the 4th striding capacitance FC4, the 3rd NMOS tube N3 and
4th NMOS tube N4；Second level AC boosting circuit includes the 5th striding capacitance FC5, the 6th striding capacitance FC6, the 5th NMOS tube
N5 and the 6th NMOS tube N6；
The substrate of N3 and source electrode are electrically connected to the negative terminal of signal source, and grid is electrically connected to first end of FC4, and drain electrode is with N6's
Substrate and grid are electrically connected to first end of FC3；
The substrate of N4 and source electrode are electrically connected to the anode of signal source, and grid is electrically connected to first end of FC3, and drain electrode is with N5's
Substrate and grid are electrically connected to first end of FC4；
The grid of N5 is electrically connected to first end of FC6, and the substrate of drain electrode and N2 and grid are electrically connected to first end of FC5；
The grid of N6 is electrically connected to first end of FC5, and the substrate of drain electrode and N1 and grid are electrically connected to first end of FC6；
Second end of FC3 and the anode of the second end electrical connection signal source of FC5, second end of FC4 and the second end electricity of FC6
The negative terminal of connecting signal source.
In such scheme, N3, N4, N5 are identical with the channel width-over-length ratio of N6, and FC3, FC4, FC5 are identical with the size of FC6.
In the present embodiment, when the anode of signal source is positive voltage, when the negative terminal of signal source is negative voltage, N4 turns on, electric current
FC4 is flowed into by the anode of signal source.And owing to N6 and N2 turns on, the electric charge of FC3 and FC5 separately flows into FC6 and FC2.And when letter
The anode in number source is negative voltage, and when the negative terminal of signal source is positive voltage, N3 turns on, and electric current is flowed into FC3 by the negative terminal of signal source.And
Owing to N3 and N5 turns on, the electric charge of FC4 and FC6 separately flows in FC5 and FC1, and eventually through P1 and P2 rectification.
Due to the multi-stage rectifying device of the present embodiment than traditional structure few 4 PMOS, reduce the consumption on MOS.With
Time, the scheme of the present embodiment reduces the threshold voltage of all NMOS tube, makes NMOS tube to work at a lower voltage.
The multi-stage rectifying device that the present embodiment two provides, utilizes the output of the front stage circuits of single stage power conversion circuit in commutator to believe
The substrate of number debiasing metal-oxide-semiconductor, increases the bulk effect of metal-oxide-semiconductor, effectively reduces threshold voltage and the resistance of metal-oxide-semiconductor, and then
Reduce the minimum input voltage of commutator, meanwhile, use multistage AC boosting circuit, carry out rectification at afterbody, reduce
The pressure drop of metal-oxide-semiconductor, and few 4 PMOS than traditional structure, reduce the consumption on MOS, be effectively improved commutator
Power-conversion efficiencies when extra low voltage inputs.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although by above example, the present invention is carried out
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other Equivalent embodiments more can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (6)
1. a commutator, it is characterised in that at least include single stage power conversion circuit；
Described single stage power conversion circuit include the first striding capacitance, the second striding capacitance, the first NMOS tube, the second NMOS tube, first
PMOS, the second PMOS and output capacitance；
The substrate of described first NMOS tube and source electrode are electrically connected to the second outfan of front stage circuits, and with described front stage circuits
First outfan insulation, the grid of grid and described first PMOS is electrically connected to the first end of described second striding capacitance, leakage
The drain electrode of pole and described first PMOS is electrically connected to the first end of described first striding capacitance；
The substrate of described second NMOS tube and source electrode are electrically connected to the first outfan of described front stage circuits, and electric with described prime
The second outfan insulation on road, grid is electrically connected to the first of described first striding capacitance with the grid of described second PMOS
End, the drain electrode of drain electrode and described second PMOS is electrically connected to the first end of described second striding capacitance；
The anode of the second end electrical connection signal source of described first striding capacitance, the second end electrical connection of described second striding capacitance
The negative terminal of described signal source；
The substrate of described first PMOS and source electrode, and the substrate of described second PMOS and source electrode electrical connection after as described
The outfan of single stage power conversion circuit；
Described output capacitance is electrically connected between described outfan and ground.
Commutator the most according to claim 1, it is characterised in that when described commutator is single stage power conversion device, described first
The substrate of NMOS tube and source electrode are electrically connected to the negative terminal of described signal source；
The substrate of described second NMOS tube and source electrode are electrically connected to the anode of described signal source.
Commutator the most according to claim 1, it is characterised in that when described commutator is multi-stage rectifying device, described rectification
Device also includes multistage AC boosting circuit；
Described front stage circuits is the final stage AC boosting circuit in described multistage AC boosting circuit.
Commutator the most according to claim 3, it is characterised in that described multistage AC boosting circuit includes that the first order exchanges
Booster circuit and second level AC boosting circuit；
Described first order AC boosting circuit includes the 3rd striding capacitance, the 4th striding capacitance, the 3rd NMOS tube and the 4th NMOS
Pipe；Described second level AC boosting circuit includes the 5th striding capacitance, the 6th striding capacitance, the 5th NMOS tube and the 6th NMOS
Pipe；
The substrate of described 3rd NMOS tube and source electrode are electrically connected to the negative terminal of described signal source, and grid is electrically connected to the described 4th and flies
Across the first end of electric capacity, drain electrode is electrically connected to the first of described 3rd striding capacitance with substrate and the grid of described 6th NMOS tube
End；
The substrate of described 4th NMOS tube and source electrode are electrically connected to the anode of described signal source, and grid is electrically connected to the described 3rd and flies
Across the first end of electric capacity, drain electrode is electrically connected to the first of described 4th striding capacitance with substrate and the grid of described 5th NMOS tube
End；
The grid of described 5th NMOS tube is electrically connected to the first end of described 6th striding capacitance, drain electrode and described second NMOS tube
Substrate and grid be electrically connected to the first end of described 5th striding capacitance；
The grid of described 6th NMOS tube is electrically connected to the first end of described 5th striding capacitance, drain electrode and described first NMOS tube
Substrate and grid be electrically connected to the first end of described 6th striding capacitance；
Second end of described 3rd striding capacitance and the second end of described 5th striding capacitance electrically connect the anode of described signal source,
Second end of described 4th striding capacitance and the second end of described 6th striding capacitance electrically connect the negative terminal of described signal source.
Commutator the most according to claim 4, it is characterised in that described 3rd NMOS tube, the 4th NMOS tube, the 5th NMOS
Managing identical with the channel width-over-length ratio of the 6th NMOS tube, the 3rd striding capacitance, the 4th striding capacitance, the 5th striding capacitance and the 6th fly
Identical across the size of electric capacity.
6. according to the commutator described in any one of claim 1-5, it is characterised in that described first NMOS tube and described second
The channel width-over-length ratio of NMOS tube is identical, and described first PMOS is identical with the channel width-over-length ratio of described second PMOS, and described
One striding capacitance is identical with the size of described second striding capacitance.
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| CN109756107A (en) * | 2019-01-31 | 2019-05-14 | 深圳市爱协生科技有限公司 | A kind of efficient charge pump circuit structure |
| CN110350810A (en) * | 2019-05-24 | 2019-10-18 | 广东工业大学 | A kind of elimination threshold voltage intersection multidiameter delay output full-wave rectifying circuit |
| CN110995026A (en) * | 2019-12-30 | 2020-04-10 | 南方科技大学 | Active rectifier |
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| ATSUSHI SASAKI: "Differential-Drive CMOS Rectifier for UHF RFIDs with 66% PCE at -12 dBm Input", 《IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107482934A (en) * | 2017-10-09 | 2017-12-15 | 郑州云海信息技术有限公司 | A kind of rectifier |
| CN109756107A (en) * | 2019-01-31 | 2019-05-14 | 深圳市爱协生科技有限公司 | A kind of efficient charge pump circuit structure |
| CN110350810A (en) * | 2019-05-24 | 2019-10-18 | 广东工业大学 | A kind of elimination threshold voltage intersection multidiameter delay output full-wave rectifying circuit |
| CN110995026A (en) * | 2019-12-30 | 2020-04-10 | 南方科技大学 | Active rectifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106100394B (en) | 2019-04-05 |
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Application publication date: 20161109 Assignee: ZHEJIANG JOHAR TECHNOLOGY Co.,Ltd. Assignor: SOUTH University OF SCIENCE AND TECHNOLOGY OF CHINA Contract record no.: X2021980002117 Denomination of invention: A rectifier Granted publication date: 20190405 License type: Common License Record date: 20210325 |
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