CN106095604A - The communication method between cores of a kind of polycaryon processor and device - Google Patents
The communication method between cores of a kind of polycaryon processor and device Download PDFInfo
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- CN106095604A CN106095604A CN201610466333.2A CN201610466333A CN106095604A CN 106095604 A CN106095604 A CN 106095604A CN 201610466333 A CN201610466333 A CN 201610466333A CN 106095604 A CN106095604 A CN 106095604A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/546—Message passing systems or structures, e.g. queues
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/544—Buffers; Shared memory; Pipes
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Abstract
The present invention relates to communication technical field, particularly relate to communication method between cores and the device of a kind of polycaryon processor, process the ability of task and the problem that resource utilization is relatively low in order to solve CPU present in prior art；The method that the embodiment of the present invention provides includes: sends core and reads value A of the message sink rear of queue pointer receiving core；The message sink queue receiving core is to receive the message sink queue that core is special；Value A receiving the message sink rear of queue pointer of core is revised as A+M；Wherein M is positive integer, represents the bar number of current message to be sent；By in message sink queue pointer value A+1 of the memory address write reception core of current message to be sent to the queue position pointed by pointer value A+M.
Description
Technical field
The present invention relates to communication technical field, particularly relate to communication method between cores and the device of a kind of polycaryon processor.
Background technology
Existing computer operating system is required for processing multiple operation task substantially simultaneously, and this just requires central processing unit
(Central Processing Unit, CPU) processes the ability of task and improves the most accordingly.Along with the arrival of big data age, meter
Calculation machine operating system is required for processing magnanimity information quickly and accurately all the time, therefore improves the ability of CPU process task
Demand is more urgent.In this case, polycaryon processor is undoubtedly a good selection, this relate to multiprocessing core it
Between communication issue.
First in first out (First Input First it is mostly based between existing computer operating system multiprocessing core
Output, FIFO) queue communicates.Use and between this technology computer operating system multiprocessing core, share a FIFO team
Row, message is written in fifo queue by message sender, and message receiver reads message from fifo queue.When multiprocessing core
Between when communicating more frequent, often occur that multiple sender is simultaneously written message or multiple recipient reads message simultaneously
Situation.Now, in order to ensure that transmitting data in communication process is uncovered, it will usually synchronization is only to use lock mechanism to ensure
There is one to process core and send/reception information.This results in other process core needs to wait that currently processed core completes to send/receive letter
Breath task just can continue with other task, therefore reduces CPU and processes the ability of task.And, lock mechanism can force other
Do not obtain the process blocking of this shared fifo queue, CPU need to preserve the relevant information of described process and redistribute task,
Scheduling process, this also can waste the process resource of CPU, affect the performance of CPU.
Visible, in prior art, between computer operating system multiprocessing core, utilize lock mechanism to share a fifo queue
Communicate, cause the ability of CPU process task and resource utilization relatively low.
Summary of the invention
The present invention provides the communication method between cores of a kind of polycaryon processor, processes task in order to solve CPU in prior art
Ability and the relatively low problem of resource utilization.
The method of the intercore communication of a kind of polycaryon processor that the embodiment of the present invention provides, including:
Send core and read value A of the message sink rear of queue pointer receiving core；Receive the message sink queue of core for receiving
The message sink queue that core is special；
Value A receiving the message sink rear of queue pointer of core is revised as A+M；Wherein M is positive integer, represents the most pending
Send the bar number of message；
The memory address of current message to be sent is write and receives message sink queue pointer value A+1 of core to pointer value
In queue position pointed by A+M；
Alternatively, before sending value A that core reads the message sink rear of queue pointer receiving core, also include:
Determine and the message sink queue of reception core exists idle element；The most each idle element is treated for storage one
Send the memory address of message；
Alternatively, the bar number M of current message to be sent is determined according to following steps:
Need total quantity N1 being sent to receive the message of core more than or equal to the message sink team receiving core when sending core
During idle number of elements N2 in row, determine that the bar number M of current message to be sent is equal to N2；Wherein N1, N2 are positive integer；
Need in total quantity N1 being sent to receive the message of the core message sink queue less than reception core when sending core
During idle number of elements N2, determine that the bar number M of current message to be sent is equal to N1；
Alternatively, it is more than or equal to the message of reception core when total quantity N1 sending the message that core needs are sent to reception core
During idle number of elements N2 in receiving queue, the N1-N2 bar message in addition to current message to be sent is stored in and sends core
First sends in buffer queue, and first sends buffer queue is exclusively used in what storage described transmission core needs sent to described reception core
The memory address of message；
After the message sink queue receiving core exists idle element, return and read the message sink queue receiving core
The step of value A of tail pointer, and the memory address extracting current message to be sent buffer queue is sent from first；
Alternatively, the first transmission that the N1-N2 bar message in addition to current message to be sent is stored in transmission core buffers team
After in row, determine before the message sink queue receiving core exists idle element, also include:
N1-N2 bar message in addition to current message to be sent is stored in the first transmission buffer queue of transmission core it
After, open the first timer sending core；First timer is that described transmission core is special to described reception core transmission message
Timer；
After the message sink queue receiving core exists idle element, return and read the message sink queue receiving core
The step of value A of tail pointer, including:
After terminating when sending the first timer of core, it is judged that receive in the message sink queue of core whether there is sky
Not busy element, if existing, then returns the step sending value A that core reads the message sink rear of queue pointer receiving core；
Alternatively, however, it is determined that receive and the message sink queue of core does not exist idle element, then reopen and send core
First timer；
Alternatively, before terminating when sending the first timer of core, it is sent to the needs of generation receive treating of core
The memory address sending message is stored in the first transmission buffer queue；
The embodiment of the present invention also provides for the method for the intercore communication of a kind of polycaryon processor, including:
Receive core and receive the memory address sending the message that core sends based on self special message sink queue；
Receive core and read the message in the internal memory that described memory address is corresponding, and process.
The device of the intercore communication of a kind of polycaryon processor that the embodiment of the present invention provides, including:
Read module, for reading value A of the message sink rear of queue pointer receiving core；The message sink team of this reception core
It is classified as the message sink queue that this reception core is special；
Modified module, for being revised as A+M by value A of tail pointer；Wherein M is positive integer, represents current message to be sent
Bar number；
Writing module, for writing the message sink queue pointer receiving core by the memory address of current message to be sent
Value A+1 is in the queue position pointed by pointer value A+M.
Alternatively, read module specifically for:
After there is idle element in determining the message sink queue receiving core, read the message sink rear of queue receiving core
Value A of pointer；The most each idle element is for the memory address of one message to be sent of storage.
Alternatively, modified module specifically for determining the bar number of current message to be sent according to following steps:
When described device needs total quantity N1 being sent to receive the message of core more than or equal to the message sink receiving core
During idle number of elements N2 in queue, determine that the bar number M of current message to be sent is equal to N2；Wherein N1, N2 are positive integer；
In described device needs total quantity N1 being sent to receive the message of core less than the message sink queue receiving core
Idle number of elements N2 time, determine that the bar number M of current message to be sent is equal to N1.
Alternatively, writing module is additionally operable to:
When described device needs total quantity N1 being sent to receive the message of core more than or equal to the message sink receiving core
During idle number of elements N2 in queue, the N1-N2 bar message in addition to current message to be sent is stored in the first of this device
Sending in buffer queue, this first transmission buffer queue is exclusively used in and stores described device needs in receiving the message that core sends
Deposit address；
Alternatively, read module is additionally operable to:
When determining that in the message sink queue receiving core after the idle element of existence, the message sink receiving core is read in return
Value A of rear of queue pointer, and the memory address extracting current message to be sent buffer queue is sent from first.
Alternatively, read module specifically for:
At writing module, the N1-N2 bar message in addition to current message to be sent is stored in the first transmission buffering of this device
After queue, open the first timer of this device；This first timer is that this device sends message institute specially to described reception core
Timer；After terminating when the first timer of this device, it is judged that receive in the message sink queue of core and whether deposit
At idle element, if existing, return value A reading the message sink rear of queue pointer receiving core.
Alternatively, read module is additionally operable to:
If it is determined that receive, the message sink queue of core does not exist idle element, then reopen the first timing of this device
Device.
Alternatively, writing module is additionally operable to:
Before terminating when the first timer of this device, the needs of generation are sent to receive the message to be sent of core
Memory address be stored in the first transmission buffer queue.
The embodiment of the present invention also provides for the device of the intercore communication of a kind of polycaryon processor, including:
Receiver module, receives the internal memory ground sending the message that core sends for the message sink queue special based on self
Location；
Processing module, for reading the message in the internal memory that described memory address is corresponding, and processes.
In the embodiment of the present invention, on the one hand, read value A of the message sink rear of queue pointer receiving core, by tail pointer
Value A is revised as A+M, and the memory address of the M bar message of current message to be sent finally writes the message sink queue receiving core
In.So, when other sends the message sink rear of queue pointer value that core reads this reception core, tail pointer value has been modified to A+
M, namely other sends core and A+M can perform as the value of tail pointer the write operation of memory address, thus avoids multiple
Send the message covering problem that core produces when sending message in a message sink queue receiving core simultaneously, and, this side
Formula allow multiple transmission cores be written in parallel to operation, improve CPU process task ability.On the other hand, for each process core
Configure a special message sink queue, it is to avoid clash when multiple process cores receive message at the same time, decrease CPU
Waiting time, improve the resource utilization of CPU.
Accompanying drawing explanation
The communication method between cores flow chart of a kind of polycaryon processor that Fig. 1 provides for the embodiment of the present invention；
A kind of schematic diagram sending buffer queue processing core that Fig. 2 provides for the embodiment of the present invention；
A kind of core that processes that Fig. 3 provides for the embodiment of the present invention sends the flow chart of message；
A kind of core that processes that Fig. 4 provides for the embodiment of the present invention receives the schematic diagram of message；
Fig. 5 sends the schematic diagram of message for a kind of polycaryon processor that the embodiment of the present invention provides；
The intercore communication schematic diagram of a kind of polycaryon processor that Fig. 6 provides for the embodiment of the present invention；
Fig. 7 sends the flow chart of message for another process core that the embodiment of the present invention provides；
A kind of core that processes that Fig. 8 provides for the embodiment of the present invention receives the flow chart of message；
The intercore communication structure drawing of device of a kind of polycaryon processor that Fig. 9 provides for the embodiment of the present invention；
The intercore communication structure drawing of device of another polycaryon processor that Figure 10 provides for the embodiment of the present invention.
Detailed description of the invention
In the embodiment of the present invention, read value A of the message sink rear of queue pointer receiving core, value A of tail pointer is revised
For A+M, finally the memory address of the M bar message of current message to be sent is write in the message sink queue receiving core.So,
When other sends the message sink rear of queue pointer value that core reads this reception core, tail pointer value has been modified to A+M, Ye Jiqi
It sends core can perform the write operation of memory address using A+M as the value of tail pointer, thus avoids multiple transmission core simultaneously
The message covering problem produced when sending message in a message sink queue receiving core, and, this mode allows many
Individual transmission core be written in parallel to operation, improve CPU process task ability.Additionally, the embodiment of the present invention is each process core
Configure a special message sink queue, it is to avoid clash when multiple process cores receive message at the same time, decrease CPU
Waiting time, improve the resource utilization of CPU.
Below in conjunction with Figure of description, the embodiment of the present invention is described in further detail.
It should be noted that each in the embodiment of the present application processes core, both can use as sending core, it is also possible to
Use as receiving core, namely each processes core and both can perform to send the operation of core, it is also possible to perform to receive the operation of core.
For purposes of illustration only, following example are mainly described from the angle sending core and reception core.
As it is shown in figure 1, the communication method between cores flow chart of a kind of polycaryon processor provided for the embodiment of the present invention, including
Following steps:
S101: send core and read value A of the message sink rear of queue pointer receiving core；The message sink team of described reception core
It is classified as and receives the message sink queue that core is special.
Here, the message sink queue receiving core is fifo queue, and the element in described fifo queue is used for storing transmission
Core is sent to receive the memory address at the message content place of core.
In being embodied as, the size that can arrange the message sink queue receiving core according to the actual requirements (i.e. carries
Element number, each element is for storing the memory address of a piece of news), the size of message sink queue can also be at the beginning of system
Default setting during beginningization.
In being embodied as, before sending value A that core reads the message sink rear of queue pointer receiving core, can first sentence
Whether the message sink queue of disconnecting receipts core exists idle element, in determining the message sink queue receiving core, there is the free time
After element, then perform S101.Specifically, can be according to receiving the size of message sink queue of core and the current core that receives
Element number in message sink queue, it is judged that whether there is idle element in the message sink queue of described reception core.
S102: send core and value A of described tail pointer is revised as A+M.
Here it is possible to determine the bar number M of current message to be sent according to following steps, wherein M is positive integer:
Need total quantity N1 being sent to receive the message of core more than or equal to the message sink team receiving core when sending core
During idle number of elements N2 in row, determine that the bar number M of current message to be sent is equal to N2；Wherein N1, N2 are positive integer；When sending out
Core is sent to need total quantity N1 being sent to receive the message of core less than the idle number of elements in the message sink queue receiving core
During N2, determine that the bar number M of current message to be sent is equal to N1.
In being embodied as, before value A of tail pointer is revised as A+M, can first read the value of described tail pointer and sentence
Whether the value of docking pointer remains as A, if it is, A is revised as A+M, otherwise, redefines the message sink team receiving core
Whether row exist idle element.Here, read, decision instruction completed within a process cycle, was can not to split again
Little operating procedure.
S103: send core and the memory address of current message to be sent is write the message sink queue pointer value receiving core
A+1 is in the queue position pointed by pointer value A+M.
In being embodied as, the memory address write of the M bar message the most to be sent determined in above-mentioned steps is received
Message sink queue pointer value A+1 of core is to the position pointed by pointer value A+M.In the process, if there being other to send
Core sends the most available free element in message, and the message sink queue of described reception core to described reception core, the most now its
It sends core can continue to read the value of the message sink rear of queue pointer receiving core.The message sink rear of queue now read refers to
The value of pin is the most no longer A, but the A+M after being modified, follow-up other sends the core message sink rear of queue again to this reception core
When pointer is modified, modifying based on A+M, such as, the message bar number current to be sent that other transmission core determines is
L, the value of the most amended tail pointer becomes A+M+L.
Above-mentioned steps is more than or equal to receive core when total quantity N1 sending the message that core needs are sent to reception core
During idle number of elements N2 in message sink queue, the N1-N2 bar message in addition to current message to be sent can be stored in
Sending in the first transmission buffer queue of core, this first transmission buffer queue is exclusively used in the described transmission core of storage to be needed to connect to described
Receive the memory address of the message that core sends；Through after a while, receive the message sink queue of core exists idle element it
After, return S101, send the memory address extracting current message to be sent buffer queue from first.
Here it is possible to put T-1 (T is the sum processing core in system) individual transmission buffer queue, the most often for sending caryogamy
One sends corresponding one of buffer queue and receives core, needs the internal memory of the message sent to this reception core for storing this transmission core
Address.As in figure 2 it is shown, such as, have 4 and process core in system, then these 4 process cores can serve as transmission process core and connect
Receipts process core and use.Such as, when processing core 0 and using as transmission process core, system distributes 3 transmission bufferings for processing core 0
Queue, is respectively and sends buffer queue 0-1, send buffer queue 0-2 and send buffer queue 0-3.Send buffer queue 0-1 to use
It is sent to process the memory address of the message of core 1 in caching process core 0, sends buffer queue 0-2 and send for caching process core 0
Give the memory address of the message processing core 2, send buffer queue 0-3 to be sent to process in the message of core 3 for caching process core 0
Deposit address.
In being embodied as, the N1-N2 bar message in addition to current message to be sent is stored in the first transmission sending core
After in buffer queue, send core and can ceaselessly access the message sink queue receiving core, it is judged that receive the message sink of core
The most available free element of queue, but in this manner, send core and be in blindly waiting state, and can not be processed other
Business, therefore wastes the process resource of CPU.
As a kind of optimal way, send the of core N1-N2 article of message in addition to current message to be sent being stored in
After one sends in buffer queue, the first timer sending core can be opened；This first timer is for sending core to receiving core
Send the timer that message is special；Before terminating when sending the timer of core, it is not necessary to judge that the message receiving core connects
Receive and whether queue exists idle element, after terminating when sending the timer of core, then judge to receive the message sink of core
Whether queue exists idle element, after determining the idle element of existence, then returns transmission core and read the message sink receiving core
The step of value A of rear of queue pointer, however, it is determined that there is not idle element, reopen the first timer sending core.
Specifically, as it is shown on figure 3, said process can be carried out according to following flow process:
S301a: the N1-N2 bar message in addition to current message to be sent is stored in the first transmission buffer queue sending core
In.
S302a: open the first timer sending core.
Here, the first timer is to send core to send, to receiving core, the timer that message is special.Open at the first timer
Qi Hou, before timing arrives, the memory address that the needs of generation are sent to receive the message to be sent of core is stored in first
Send in buffer queue, it is not necessary to judge whether the message sink queue of reception core exists idle element again.
In being embodied as, each transmission processes core can arrange multiple timer, such as, has 4 process in system
Core, then distribute 3 timers for process core 0, respectively timer 0-1, timer 0-2 and timer 0-3.Need when processing core 0
To send message to processing core 1, and when the message sink queue processing core 1 does not exist idle element, to start timer 0-1, its
Timing is the time that process core 0 needed to wait when process core 1 sends message, needs to send to process core 2 when processing core 0
Message, and when the message sink queue processing core 2 does not exist idle element, start timer 0-2, its timing is for processing core
0 to processing the time needing to wait when core 2 sends message, needs to send message to process core 3 when processing core 0, and processes core 3
When message sink queue does not exist free time element, starting timer 0-3, its timing disappears to processing core 3 transmission for processing core 0
The time waited is needed during breath.
In being embodied as, a numerical range (such as 0～100ms), the first timing can be generated according to user instruction
The timing of device is randomly generated in above-mentioned numerical range by system.
After terminating during the S303a: the first timer, it is judged that receive and whether the message sink queue of core exists idle unit
Element.If there is no idle element, then enter S304a；If there is idle element, then enter S305a.
S304a: reopen the first timer sending core.
Here, the timing arranged after reopening the first timer is at the above-mentioned numerical value model pre-set by system
Randomly generate in enclosing, unrelated with the timing before the first timer.
S305a: re-read value A of the message sink rear of queue pointer receiving core, namely return S101.
Alternatively, in being embodied as, whether transmission core, before receiving core transmission message, can first judge the first timer
Open.If this first timer open, then message to be sent is stored in send core first transmission buffer queue in, if this first
Timer is not turned on, then rejudge and whether there is idle element in the message sink queue receiving core.
S104: receive core and receive the memory address sending the message that core sends based on self special message sink queue,
Read the message in the internal memory that described memory address is corresponding, and process.
In being embodied as, each process core receives message by the most special message sink queue.As shown in Figure 4,
Process core 0 from the message sink queue that self is special, receive message, process core 1 and connect from the message sink queue that self is special
Receive message ... process core n from the message sink queue that self is special, receive message.
In being embodied as, receive core from special message sink queue, receive the message that multiple transmission core sends.As
Shown in Fig. 5, when computer operating system initializes, distribute a special message sink team for each process core in system
Row.When there being multiple process core to send message to same process core, these multiple process cores are successively by the internal memory of message to be sent
Address writes in the message sink queue that this same process core is special.Receive message processes the message that nuclear inspection self is special
Receiving queue, is found to have message to be received, starts to read respective element from self special message sink queue heads afterwards, carry out
Process.
As shown in Figure 6, when processing core 0 and sending message to process core 1: first, process core 0 message place to be sent
Memory address is saved in the tail of the queue element processing the special message sink queue of core 1；Secondly, process core 1 and check that self is special
Message sink queue, find that this message sink queue has message to be received；Then, core 1 is processed from this message sink team
Team's head of row starts to read corresponding element, obtains processing the memory address of the message that core 0 sends；Finally, process core 1 and access institute
Stating memory address, acquisition processes the particular content of the message that core 0 sends.Similarly, message is sent when process core 1 to processing core 0
Time: first, the memory address processing core 1 message place to be sent is saved in the team processing the special message sink queue of core 0
In tail element；Secondly, process core 0 and check self special message sink queue, find this message sink queue has to be received
Message；Then, process core 0 and start to read corresponding element from team's head of this message sink queue, obtain processing what core 1 sent
The memory address of message；Finally, processing core 0 and access described memory address, acquisition processes the particular content of the message that core 1 sends.
In the embodiment of the present invention, read value A of the message sink rear of queue pointer receiving core, value A of tail pointer is revised
For A+M, finally the memory address of the M bar message of current message to be sent is write in the message sink queue receiving core.So,
When other sends the message sink rear of queue pointer value that core reads this reception core, tail pointer value has been modified to A+M, Ye Jiqi
It sends core can perform the write operation of memory address using A+M as the value of tail pointer, thus avoids multiple transmission core simultaneously
The message covering problem produced when sending message in a message sink queue receiving core, and, this mode allows many
Individual transmission core be written in parallel to operation, improve CPU process task ability.Additionally, the embodiment of the present invention is each process core
Configure a special message sink queue, it is to avoid clash when multiple process cores receive message at the same time, decrease CPU
Waiting time, improve the resource utilization of CPU.
Below by a concrete example, inventive concept is described further.
Embodiment two
As it is shown in fig. 7, the communication method between cores flow chart of the polycaryon processor provided for the embodiment of the present invention two, including:
S701: send core and determine that needs send message to receiving core.
In being embodied as, send core and message to be sent be saved in certain internal storage location of computer operating system,
Transmission process transmits the first address of described internal storage location.
S702: judge to send whether the timer sending core corresponding when core communicates with reception core is opened.If opening, then
Enter S703, otherwise, enter S704.
S703: message to be sent is stored in the first transmission buffer queue of described transmission core, waits the timing of core to be sent
Device timing terminates.
S704: judge to receive the most available free element of message sink queue of core.If nothing, then entering S705, if having, then entering
Enter S706.
S705: open and send the timer sending core corresponding when core communicates with reception core.
S706: determine the bar number M of current message to be sent.
Here it is possible to determine the bar number M of current message to be sent according to procedure below: assume that sending core determines that needs are to connecing
The total message bar number receiving core transmission is N1, and receiving idle number of elements in the message sink queue of core is N2.So, if N1 is big
In or equal to N2, it is determined that the bar number M=N2 of current message to be sent；If N1 is less than N2, it is determined that the most to be sent disappear
The bar number M=N1 of breath.
In being embodied as, however, it is determined that the bar number M=N2 of current message to be sent, can be by except M (M the most to be sent
=N2) N1-N2 bar message outside bar message is stored in the first transmission buffer queue sending core.Open afterwards and send the of core
One timer；Before terminating when sending the timer of core, the first transmission that message to be sent is stored in transmission core buffers team
In row；After terminating when sending the timer of core, return S704.
S707: send core and read value A of the message sink rear of queue pointer receiving core, value A of tail pointer is revised as A+
M。
Here, before value A of tail pointer is revised as A+M, reads the value of described tail pointer and judge described tail pointer
Whether value remains as A.The most then enter S708, otherwise, return S704.Here, read, decision instruction processes the cycle at one
Inside complete, be the minimum operation step that can not split again.
S708: the memory address of M bar message the most to be sent is write message sink queue pointer value A receiving core
+ 1 in the queue position pointed by pointer value A+M.
In being embodied as, receive core and receive the flow process of the message sending core transmission as shown in Figure 8.
S801: the message receiving nuclear inspection self special connects whether there is message to be received in queue.The most then enter
S802, performs S801 the most again.
S802: receive core and start to read that this message stores this queue is corresponding from the head of the queue of described message sink queue
Element.
S803: receive core and obtain the memory address of this message, read message.
Based on same inventive concept, the embodiment of the present invention additionally provides the side of a kind of intercore communication with polycaryon processor
The device of the intercore communication of the polycaryon processor that method is corresponding, owing to this device solves principle and the embodiment of the present invention multinuclear of problem
The method of the intercore communication of processor is similar, and therefore the enforcement of this device may refer to the enforcement of method, the most superfluous in place of repetition
State.
As it is shown in figure 9, the apparatus structure for the intercore communication of a kind of polycaryon processor of embodiment of the present invention offer illustrates
It is intended to, including:
Read module 901, for reading value A of the message sink rear of queue pointer receiving core；The message of this reception core connects
Receipts queue is the message sink queue that this reception core is special；
Modified module 902, for being revised as A+M by value A of tail pointer；Wherein M is positive integer, represents the most to be sent disappearing
The bar number of breath；
Writing module 903, for writing the memory address of current message to be sent in the message sink queue receiving core
Pointer value A+1 is in the queue position pointed by pointer value A+M.
Alternatively, read module 901 specifically for:
After there is idle element in determining the message sink queue receiving core, read the message sink rear of queue receiving core
Value A of pointer；The most each idle element is for the memory address of one message to be sent of storage.
Alternatively, modified module 902 specifically for determining the bar number of current message to be sent according to following steps:
When described device needs total quantity N1 being sent to receive the message of core more than or equal to the message sink receiving core
During idle number of elements N2 in queue, determine that the bar number M of current message to be sent is equal to N2；Wherein N1, N2 are positive integer；
In described device needs total quantity N1 being sent to receive the message of core less than the message sink queue receiving core
Idle number of elements N2 time, determine that the bar number M of current message to be sent is equal to N1.
Alternatively, writing module 903 is additionally operable to:
When described device needs total quantity N1 being sent to receive the message of core more than or equal to the message sink receiving core
During idle number of elements N2 in queue, the N1-N2 bar message in addition to current message to be sent is stored in the first of this device
Sending in buffer queue, described first sends buffer queue is exclusively used in storage described device needs to disappearing that described reception core sends
The memory address of breath；
Alternatively, read module 901 is additionally operable to:
When determining that in the message sink queue receiving core after the idle element of existence, the message sink receiving core is read in return
Value A of rear of queue pointer, and the memory address extracting current message to be sent buffer queue is sent from first.
Alternatively, read module 901 specifically for:
At writing module 903, the N1-N2 bar message in addition to current message to be sent is stored in the first transmission of this device
After buffer queue, open the first timer of this device；This first timer is that this device sends message to described reception core
Special timer；After terminating when the first timer of this device, it is judged that the message sink queue of reception core is
The idle element of no existence, if existing, returns value A of the message sink rear of queue pointer reading reception core.
Alternatively, read module 901 is additionally operable to:
If it is determined that receive, the message sink queue of core does not exist idle element, then reopen the first timing of this device
Device.
Alternatively, writing module 903 is additionally operable to:
Before terminating when the first timer of this device, the needs of generation are sent to receive the message to be sent of core
Memory address be stored in the first transmission buffer queue.
As shown in Figure 10, the structure drawing of device of the intercore communication that the embodiment of the present invention also provides for a kind of polycaryon processor is illustrated
Figure, including:
Receiver module 1001, receives the internal memory sending the message that core sends for the message sink queue special based on self
Address；
Processing module 1002, for reading the message in the internal memory that memory address is corresponding, and processes.
Those skilled in the art are it should be appreciated that embodiments of the invention can be provided as method, system or computer program
Product.Therefore, the reality in terms of the present invention can use complete hardware embodiment, complete software implementation or combine software and hardware
Execute the form of example.And, the present invention can use at one or more computers wherein including computer usable program code
The upper computer program product implemented of usable storage medium (including but not limited to disk memory, CD-ROM, optical memory etc.)
The form of product.
The present invention is with reference to method, device (system) and the flow process of computer program according to embodiments of the present invention
Figure and/or block diagram describe.It should be understood that can the most first-class by computer program instructions flowchart and/or block diagram
Flow process in journey and/or square frame and flow chart and/or block diagram and/or the combination of square frame.These computer programs can be provided
Instruction arrives the processor of general purpose computer, special-purpose computer, Embedded Processor or other programmable data processing device to produce
A raw machine so that the instruction performed by the processor of computer or other programmable data processing device is produced for real
The device of the function specified in one flow process of flow chart or multiple flow process and/or one square frame of block diagram or multiple square frame now.
These computer program instructions may be alternatively stored in and computer or other programmable data processing device can be guided with spy
Determine in the computer-readable memory that mode works so that the instruction being stored in this computer-readable memory produces and includes referring to
Make the manufacture of device, this command device realize at one flow process of flow chart or multiple flow process and/or one square frame of block diagram or
The function specified in multiple square frames.
These computer program instructions also can be loaded in computer or other programmable data processing device so that at meter
Perform sequence of operations step on calculation machine or other programmable devices to produce computer implemented process, thus at computer or
The instruction performed on other programmable devices provides for realizing at one flow process of flow chart or multiple flow process and/or block diagram one
The step of the function specified in individual square frame or multiple square frame.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know basic creation
Property concept, then can make other change and amendment to these embodiments.So, claims are intended to be construed to include excellent
Select embodiment and fall into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and the modification essence without deviating from the present invention to the present invention
God and scope.So, if these amendments of the present invention and modification belong to the scope of the claims in the present invention and equivalent technologies thereof
Within, then the present invention is also intended to comprise these change and modification.
Claims (16)
1. the communication method between cores of a polycaryon processor, it is characterised in that the method includes:
Send core and read value A of the message sink rear of queue pointer receiving core；The message sink queue of described reception core is described
Receive the message sink queue that core is special；
Value A of described tail pointer is revised as A+M；Wherein M is positive integer, represents the bar number of current message to be sent；
The memory address of current message to be sent is write and receives message sink queue pointer value A+1 of core to pointer value A+M
In pointed queue position.
2. the method for claim 1, it is characterised in that described transmission core reads the message sink rear of queue of reception core and refers to
Before value A of pin, also include:
Determine and the message sink queue of described reception core exists idle element；The most each idle element is treated for storage one
Send the memory address of message.
3. method as claimed in claim 2, it is characterised in that determine the bar number M of current message to be sent according to following steps:
When described transmission core needs total quantity N1 being sent to receive the message of core more than or equal to the message sink team receiving core
During idle number of elements N2 in row, determine that the bar number M of current message to be sent is equal to N2；Wherein N1, N2 are positive integer；
In described transmission core needs total quantity N1 being sent to receive the message of core less than the message sink queue receiving core
During idle number of elements N2, determine that the bar number M of current message to be sent is equal to N1.
4. method as claimed in claim 3, it is characterised in that described method also includes:
When described transmission core needs total quantity N1 being sent to receive the message of core more than or equal to the message sink team receiving core
During idle number of elements N2 in row, N1-N2 article of message in addition to current message to be sent is stored in the of described transmission core
One sends in buffer queue, and described first sends buffer queue is exclusively used in storage described transmission core needs to the transmission of described reception core
The memory address of message；
After the message sink queue of described reception core exists idle element, return the described message sink reading and receiving core
The step of value A of rear of queue pointer, and the memory address extracting current message to be sent buffer queue is sent from described first.
5. method as claimed in claim 4, it is characterised in that the N1-N2 bar message in addition to current message to be sent is deposited
After entering in the first transmission buffer queue of described transmission core, determine and the message sink queue of described reception core exists idle unit
Before element, also include:
N1-N2 bar message in addition to current message to be sent is stored in the first transmission buffer queue of described transmission core it
After, open the first timer of described transmission core；Described first timer is that described transmission core sends message to described reception core
Special timer；
After the message sink queue of described reception core exists idle element, return the described message sink reading and receiving core
The step of value A of rear of queue pointer, including:
After terminating when the first timer of described transmission core, it is judged that whether the message sink queue of described reception core deposits
At idle element, if existing, then return the step that described transmission core reads value A of the message sink rear of queue pointer receiving core.
6. method as claimed in claim 5, it is characterised in that described method also includes:
If it is determined that the message sink queue of described reception core does not exist idle element, then reopen the first of described transmission core
Timer.
7. method as claimed in claim 6, it is characterised in that described method also includes:
Before terminating when the first timer of described transmission core, by produce need be sent to the to be sent of described reception core
The memory address of message is stored in described first and sends in buffer queue.
8. the communication method between cores of a polycaryon processor, it is characterised in that the method also includes:
Receive core and receive the memory address sending the message that core sends based on self special message sink queue；
Described reception core reads the message in the internal memory that described memory address is corresponding, and processes.
9. the intercore communication device of a polycaryon processor, it is characterised in that this device includes:
Read module, for reading value A of the message sink rear of queue pointer receiving core；The message sink queue of described reception core
For the message sink queue that described reception core is special；
Modified module, for being revised as A+M by value A of described tail pointer；Wherein M is positive integer, represents current message to be sent
Bar number；
Writing module, for writing message sink queue pointer value A+ receiving core by the memory address of current message to be sent
1 in the queue position pointed by pointer value A+M.
10. device as claimed in claim 9, it is characterised in that described read module specifically for:
After there is idle element in the message sink queue determining described reception core, read the message sink rear of queue receiving core
Value A of pointer；The most each idle element is for the memory address of one message to be sent of storage.
11. devices as claimed in claim 10, it is characterised in that described modified module is specifically for determining according to following steps
The bar number of current message to be sent:
When described device needs total quantity N1 being sent to receive the message of core more than or equal to the message sink queue receiving core
In idle number of elements N2 time, determine that the bar number M of current message to be sent is equal to N2；Wherein N1, N2 are positive integer；
Sky in described device needs total quantity N1 being sent to receive the message of core less than the message sink queue receiving core
During not busy number of elements N2, determine that the bar number M of current message to be sent is equal to N1.
12. devices as claimed in claim 11, it is characterised in that said write module is additionally operable to:
When described device needs total quantity N1 being sent to receive the message of core more than or equal to the message sink queue receiving core
In idle number of elements N2 time, the N1-N2 bar message in addition to current message to be sent is stored in first of described device
Sending in buffer queue, described first sends buffer queue is exclusively used in the message that the described device of storage needs to send to described reception core
Memory address；
Described read module is additionally operable to:
After the message sink queue determining described reception core exists idle element, return the described message reading and receiving core
Value A of receiving queue tail pointer, and the memory address extracting current message to be sent buffer queue is sent from described first.
13. devices as claimed in claim 12, it is characterised in that described read module specifically for:
In said write module, the N1-N2 bar message in addition to current message to be sent is stored in the first of described device and sends slow
After rushing queue, open the first timer of described device；Described first timer is that described device sends to described reception core
The timer that message is special；After terminating when the first timer of described device, it is judged that the message of described reception core connects
Receiving and whether queue exists idle element, if existing, returning value A reading the message sink rear of queue pointer receiving core.
14. devices as claimed in claim 13, it is characterised in that described read module is additionally operable to:
If it is determined that the message sink queue of described reception core does not exist idle element, then reopen the first meter of described device
Time device.
15. devices as claimed in claim 14, it is characterised in that said write module is additionally operable to:
Before terminating when the first timer of described device, needing of producing is sent to described the to be sent of reception core disappears
The memory address of breath is stored in described first and sends in buffer queue.
The intercore communication device of 16. 1 kinds of polycaryon processors, it is characterised in that this device includes:
Receiver module, receives the memory address sending the message that core sends for the message sink queue special based on self；
Processing module, for reading the message in the internal memory that described memory address is corresponding, and processes.
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| CN113778706A (en) * | 2021-08-18 | 2021-12-10 | 北京自动化控制设备研究所 | Inter-core communication method of operating system based on AMP architecture |
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