CN106095189B - A kind of In-Cell touch-control array substrate and its manufacturing method - Google Patents
A kind of In-Cell touch-control array substrate and its manufacturing method Download PDFInfo
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- CN106095189B CN106095189B CN201610493670.0A CN201610493670A CN106095189B CN 106095189 B CN106095189 B CN 106095189B CN 201610493670 A CN201610493670 A CN 201610493670A CN 106095189 B CN106095189 B CN 106095189B
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- passivation layer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
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- General Engineering & Computer Science (AREA)
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Abstract
The present invention provides a kind of In-Cell touch-control array substrates, it include: a substrate, and the grid electrode layer sequentially formed on the substrate, gate insulating layer, semiconductor layer, source-drain electrode layer, the first passivation layer, organic insulator, common electrode layer, second passivation layer, detection line, third passivation layer and pixel electrode layer；Wherein, it is formed with the first contact hole on first passivation layer and the second passivation layer above the drain electrode for being located at the source-drain electrode layer, the drain electrode of the source-drain electrode layer is connected by first contact hole with the pixel electrode layer；The aperture of the second passivation layer contact hole is greater than the aperture of the first passivation layer contact hole.It carries out while etching by the contact hole to the first passivation layer and the second passivation layer, the edge of the first contact hole is set to form a gentle slope, so that pixel electrode is smoothly connected along the gentle slope of the second passivation layer formation and the drain electrode of drain electrode layer, it is ensured that pixel electrode is not broken.
Description
Technical field
The present invention relates to flat display technology field more particularly to a kind of In-Cell touch-control array substrate and its manufactures
Method.
Background technique
AIT technology is the In- of the prior art inside the pixel being embedded into touch sensor function on tft array substrate
The diagrammatic cross-section of Cell touch-control array substrate as indicated with 1, including sequentially forms grid 02, gate insulator on transparent substrate 01
Layer 03, semiconductor layer 04, drain metal layer 05, organic insulator 06, organic insulator through-hole 61, ITO electrode 07, first are passivated
Layer 08, detection line layer 09, the second passivation layer 010 and common electrode layer 011.Wherein, organic insulator 06 is transparent, and is covered
The overwhelming majority of transparent substrate is covered, ITO electrode layer is connect by organic insulator through-hole 61 with the drain electrode of drain metal layer.
And will form a biggish drop in the ITO layer that organic insulator through-hole 61 is formed, and easily lead to the fracture of ITO layer, it can not
It charges to pixel electrode, in turn results in the bad of unrepairable.
Summary of the invention
In order to solve problems in the prior art, the present invention provides a kind of In-Cell touch-control array substrate, comprising: a substrate,
And the grid electrode layer sequentially formed on the substrate, gate insulating layer, semiconductor layer, source-drain electrode layer, the first passivation
Layer, organic insulator, common electrode layer, the second passivation layer, detection line, third passivation layer and pixel electrode layer；
Wherein, the shape on first passivation layer and the second passivation layer above the drain electrode for being located at the source-drain electrode layer
At there is the first contact hole, the drain electrode of the source-drain electrode layer is connected by first contact hole with the pixel electrode layer
It connects；Wherein, first contact hole includes concentric the first passivation layer contact hole and the second passivation layer contact hole；Described second
The aperture of passivation layer contact hole is greater than the aperture of the first passivation layer contact hole.
Further, the aperture of the second passivation layer contact hole is greater than the aperture 1um of the first passivation layer contact hole.
The present invention gives a kind of manufacturing method of In-Cell touch-control array substrate, includes the following steps:
The first step, on the transparent substrate, deposited metal film form grid electrode layer, etch grid on the electrode layer
Pole；
Second step forms gate insulating layer；
Third step, depositing metal oxide film form oxide semiconductor layer；
4th step forms metal layer on the basis of above step, which includes data line, source electrode and drain electrode；
5th step forms the first passivation layer in step 4；
6th step is coated with organic insulator to the above array substrate, and it is corresponding organic exhausted to remove the first contact hole site
Edge layer；
7th step, deposited metal film forms common electrode on the basis of above step；
8th step forms the second passivation layer in step 7；
9th step coating photoresist and is exposed photoresist in the above array substrate, and shows to photoresist
Shadow, the first passivation layer to the first contact hole site exposed and the second passivation layer while carrying out dry etching,
Form the first contact hole；
Tenth step, deposited metal film forms detection line on the basis of above step, and forms third passivation layer；
11st step forms pixel electrode layer in above step, and pixel electrode layer is blunt by the first passivation layer and second
Change the first contact hole that layer is formed to connect with drain electrode.
Further, the first contact hole in step 8 is by concentric the first passivation layer contact hole and the second passivation layer contact hole
Composition, and the aperture of the second passivation layer contact hole is greater than the aperture 1um of the first passivation layer contact hole.
The utility model has the advantages that the present invention is carried out while being etched by contact hole to the first passivation layer and the second passivation layer, make the
The edge of one contact hole forms a gentle slope, so that gentle slope and drain electrode layer of the pixel electrode along the second passivation layer formation
Drain electrode smoothly connect, it is ensured that pixel electrode is not broken.
Detailed description of the invention
Fig. 1 is the diagrammatic cross-section of existing array substrate pixel region；
Fig. 2 is the diagrammatic cross-section of array substrate pixel region of the invention；
Fig. 3 is the diagrammatic cross-section of second embodiment of the invention step 5；
Fig. 4 is the diagrammatic cross-section of second embodiment of the invention step 6；
Fig. 5 is the diagrammatic cross-section of second embodiment of the invention step 8；
Fig. 6 is the diagrammatic cross-section of second embodiment of the invention step 9；
Fig. 7 is the diagrammatic cross-section of second embodiment of the invention step 10；
Fig. 8 is the diagrammatic cross-section of second embodiment of the invention step 11.
Specific embodiment
In the following with reference to the drawings and specific embodiments, the present invention is furture elucidated, it should be understood that these embodiments are merely to illustrate
It the present invention rather than limits the scope of the invention, after the present invention has been read, those skilled in the art are to of the invention each
The modification of kind equivalent form falls within the application range as defined in the appended claims.
When AIT Technology application is in Array Design, dot structure needs more insulating layers, so the picture in through hole
Plain electrode will form a biggish drop, easily lead to ito film fault rupture, in turn result in the bad of unrepairable.To understand
The problem of certainly pixel electrode of In-Cell touch-control array substrate is easily broken, the present invention provide a kind of new In-Cell touch-control battle array
Column board structure.
As shown in Figure 2 is the diagrammatic cross-section of In-Cell touch-control array substrate of the invention, which includes:
Substrate 10, and the grid electrode layer 20 sequentially formed on the substrate, gate insulating layer 30, semiconductor layer 40, source and drain electricity
Pole layer 50, the first passivation layer 60, organic insulator 70, common electrode layer 80, the second passivation layer 90, detection line 100, third passivation
Layer 200 and pixel electrode layer 300.Wherein, in the first passivation layer 60 and the second passivation layer being located above source-drain electrode layer 50
The first contact hole 701 is formed on 90, the drain electrode of the source-drain electrode layer passes through first contact hole and the pixel
Electrode layer 300 is connected；First contact hole 701 includes concentric the first passivation layer contact hole and the contact of the second passivation layer
Hole；The aperture of the second passivation layer contact hole is greater than the aperture 1um of the first passivation layer contact hole.
In the present embodiment, since the aperture of the second passivation layer contact hole is greater than the hole of the first passivation layer contact hole
Diameter, in this way can the edge of the first contact hole formed a gentle slope so that pixel electrode along the second passivation layer formation gentle slope with
The drain electrode of drain electrode layer smoothly connects, it is ensured that pixel electrode is not broken.
The present invention gives a kind of In-Cell touch-control manufacturing method of array base plate of second embodiment, and this method includes such as
Lower step:
The first step, on the transparent substrate 10, deposited metal film form grid electrode layer 20, carve on the metallic film
Lose grid out；
Second step forms gate insulating layer 30；
Third step, depositing metal oxide film etch pattern on the thin film, form semiconductor layer 40；
4th step, deposited metal film forms source-drain electrode layer on the basis of above step；The metal layer includes data
Line (not shown), source electrode 51 and drain electrode 52；
5th step forms the first passivation layer 60 in step 4, as shown in Figure 3；
6th step is coated with organic insulator 70 to the above array substrate, and is exposed to organic insulator 70, develops
The corresponding organic insulator in 701 position of the first contact hole is removed, forms organic insulator through-hole, as shown in Figure 4.
7th step, deposited metal film forms common electrode 80 on the basis of above step；
8th step forms the second passivation layer 90 in step 7, as shown in Figure 5；
9th step coating photoresist and is exposed photoresist in the above array substrate, and shows to photoresist
Shadow, the first passivation layer 60 and the second passivation layer 90 to 701 position of the first contact hole exposed while carrying out dry etching, forms the
One contact hole, the contact hole are formed by concentric the first passivation layer contact hole 601 and the second passivation layer contact hole 901, and described
The aperture R2 of second passivation layer contact hole 901 is greater than the aperture R11um of the first passivation layer contact hole, as shown in Figure 6；
Tenth step, deposited metal film forms detection line 100 and forms third passivation layer 200 on the basis of above step,
As shown in Figure 7；
11st step, deposition ITO pattern, and pixel electrode layer 300 is formed, pixel electrode layer 300 passes through the first passivation layer
It is connect with the first contact hole 701 of the second passivation layer formation with drain electrode 51, as shown in Figure 8.
The present invention is carried out while being etched by the contact hole to the first passivation layer and the second passivation layer, makes the first contact hole
Edge forms a gentle slope, so that pixel electrode is suitable along the gentle slope of the second passivation layer formation and the drain electrode of drain electrode layer
Benefit connection, it is ensured that pixel electrode is not broken.
Claims (4)
1. a kind of In-Cell touch-control array substrate, comprising: a substrate, and the gate electrode sequentially formed on the substrate
Layer, gate insulating layer, semiconductor layer, source-drain electrode layer, the first passivation layer, organic insulator, common electrode layer, the second passivation
Layer, detection line, third passivation layer and pixel electrode layer；
Wherein, it is formed on first passivation layer and the second passivation layer above the drain electrode for being located at the source-drain electrode layer
The drain electrode of first contact hole, the source-drain electrode layer is connected by first contact hole with the pixel electrode layer；
Wherein, first contact hole includes concentric the first passivation layer contact hole and the second passivation layer contact hole；Described second is blunt
The aperture for changing layer contact hole is greater than the aperture of the first passivation layer contact hole, the second passivation layer covering in first contact hole
Organic insulator and the first passivation layer form step-like first contact hole.
2. a kind of In-Cell touch-control array substrate according to claim 1, it is characterised in that: second passivation layer connects
The aperture of contact hole is greater than the aperture 1um of the first passivation layer contact hole.
3. a kind of manufacturing method of In-Cell touch-control array substrate, includes the following steps:
The first step, on the transparent substrate, deposited metal film form grid electrode layer, etch grid on the electrode layer；
Second step forms gate insulating layer；
Third step, depositing metal oxide film form oxide semiconductor layer；
4th step forms metal layer on the basis of above step, which includes data line, source electrode and drain electrode；
5th step forms the first passivation layer in step 4；
6th step is coated with organic insulator to the above array substrate, and removes the corresponding organic insulator in the first contact hole site；
7th step, deposited metal film forms common electrode on the basis of above step；
8th step forms the second passivation layer in step 7；
9th step coating photoresist and is exposed photoresist in the above array substrate, and develops to photoresist, right
First passivation layer of the first contact hole site exposed and the second passivation layer while dry etching is carried out, the first contact hole of formation,
The second passivation layer covering organic insulator and the first passivation layer, form step-like first contact hole in first contact hole；
Tenth step, deposited metal film forms detection line on the basis of above step, and forms third passivation layer；
11st step forms pixel electrode layer in above step, and pixel electrode layer passes through the first passivation layer and the second passivation layer
The first contact hole formed is connect with drain electrode.
4. a kind of manufacturing method of In-Cell touch-control array substrate according to claim 3, it is characterised in that: step 8
In the first contact hole be made of concentric the first passivation layer contact hole and the second passivation layer contact hole, and second passivation layer
The aperture of contact hole is greater than the aperture 1um of the first passivation layer contact hole.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610493670.0A CN106095189B (en) | 2016-06-29 | 2016-06-29 | A kind of In-Cell touch-control array substrate and its manufacturing method |
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| CN201610493670.0A CN106095189B (en) | 2016-06-29 | 2016-06-29 | A kind of In-Cell touch-control array substrate and its manufacturing method |
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| CN106095189B true CN106095189B (en) | 2019-05-17 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103489824A (en) * | 2013-09-05 | 2014-01-01 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate, and display device |
| CN103855087A (en) * | 2014-02-24 | 2014-06-11 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
| CN103887235A (en) * | 2014-03-10 | 2014-06-25 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate, and display device |
| CN104733475A (en) * | 2015-03-26 | 2015-06-24 | 南京中电熊猫液晶显示科技有限公司 | Array substrate and manufacturing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20050068843A (en) * | 2003-12-30 | 2005-07-05 | 엘지.필립스 엘시디 주식회사 | Thin film transistor substrate with color filter and method for fabricating the same |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103489824A (en) * | 2013-09-05 | 2014-01-01 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate, and display device |
| CN103855087A (en) * | 2014-02-24 | 2014-06-11 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
| CN103887235A (en) * | 2014-03-10 | 2014-06-25 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate, and display device |
| CN104733475A (en) * | 2015-03-26 | 2015-06-24 | 南京中电熊猫液晶显示科技有限公司 | Array substrate and manufacturing method thereof |
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