CN106067427B - Partial exposure exception defect automatic testing method - Google Patents
Partial exposure exception defect automatic testing method Download PDFInfo
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- CN106067427B CN106067427B CN201610356816.7A CN201610356816A CN106067427B CN 106067427 B CN106067427 B CN 106067427B CN 201610356816 A CN201610356816 A CN 201610356816A CN 106067427 B CN106067427 B CN 106067427B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
The present invention provides a kind of partial exposure exception defect automatic testing methods, comprising: using the flaw indication of defect checking machine platform detection wafer, and generates flaw indication file according to testing result；Binarized-image file is converted by flaw indication file, wherein each defect point constitutes a valid pixel；Clustering is carried out to all valid pixels that defect point is constituted using clustering algorithm, obtains the information of clustering defect, and record the location information of the clustering defect on wafer；According to Wafer identification information, the machine station information for the technique board that the wafer is passed through is obtained from manufacturing execution system；The location information of the Wafer identification information, the machine station information, the clustering flaw indication and clustering defect on wafer is saved to database；All clustering defects obtained are traversed, according to clustering defect characteristic and machine station information, retrieve in specified time interval whether have the defect for meeting similarity Condition in the database.
Description
Technical field
The present invention relates to field of semiconductor manufacture and information technology fields, it is more particularly related to a kind of office
Portion exposes abnormal defect automatic testing method.
Background technique
Currently, in semiconductor technology processing, the method for the detection of partial exposure exception defect is: Defect Scanning machine
Platform carries out Defect Scanning to wafer, will test manually investigation composition clustering after result is sent to corresponding defect report system
(cluster) defect is then compared the wafer of same batch if there is such defect, if there is similar clustering lacks
It falls into and occurs in identical position, then it is assumed that the defect is partial exposure exception defect.
But the shortcomings that above scheme, is, on the one hand, artificial behaviour manually lacks timeliness；And on the other hand, not
With progress artificial judgment is also required to when being compared between wafer, thus it is difficult to ensure that the accuracy of artificial judgment.
Accordingly, it is desirable to be capable of providing a kind of side that manually-operated need not be realized partial exposure exception defect and detect automatically
Method.
Summary of the invention
The technical problem to be solved by the present invention is to for drawbacks described above exists in the prior art, providing one kind can be in nothing
The improved method that partial exposure exception defect detects automatically must be effectively realized in the case where manual operation.
In order to achieve the above technical purposes, according to the present invention, a kind of partial exposure exception defect side of detection automatically is provided
Method, comprising:
First step: using the flaw indication of defect checking machine platform detection wafer, and defect is generated according to testing result
Signal file；
Second step: converting binarized-image file for flaw indication file, and wherein each defect point constitutes one and has
Imitate pixel；
Third step: clustering is carried out to all valid pixels that defect point is constituted using clustering algorithm, obtains clustering
The information of defect, and record the location information of the clustering defect on wafer；
Four steps: according to Wafer identification information, the technique machine that the wafer is passed through is obtained from manufacturing execution system
The machine station information of platform；
5th step: by the Wafer identification information, the machine station information, the clustering flaw indication and clustering defect
Location information on wafer is saved to database；
6th step: traversing all clustering defects of acquisition, according to clustering defect characteristic and machine station information, in the number
Retrieve in specified time interval whether have the defect for meeting similarity Condition according in library.
Preferably, the partial exposure exception defect automatic testing method further include: if retrieved in the database
To meet similarity Condition as a result, then judging that the clustering defect detected is an effective partial exposure exception defect.
Preferably, the partial exposure exception defect automatic testing method further include: if do not had in the database
Retrieve meet similarity Condition as a result, then judging that the clustering defect detected is that an invalid partial exposure is extremely scarce
It falls into.
Preferably, it is described have the defect for meeting similarity Condition be occur in wafer same position have identical clustering
The defect of defect characteristic and identical machine station information.
Preferably, the clustering defect characteristic is the position of clustering defect.
Preferably, the clustering defect characteristic is the shape of clustering defect.
Preferably, the Wafer identification information is wafer identification code.
Preferably, the Wafer identification information is wafer batch identification code.
In the present invention, possible partial exposure exception defect is detected automatically by clustering algorithm, by recalling accordingly
Algorithm inspection whether there is same flaw indication in same position by other wafers of same board, and if so, thinking
It is correct partial exposure exception flaw indication.As a result, the present invention can efficiently solve artificial judgment clustering signal whether
Accuracy and the lower problem of timeliness, find problematic wafer in time when same position.
Detailed description of the invention
In conjunction with attached drawing, and by reference to following detailed description, it will more easily have more complete understanding to the present invention
And its adjoint advantage and feature is more easily to understand, in which:
Fig. 1 schematically shows partial exposure exception defect automatic testing method according to the preferred embodiment of the invention
Flow chart.
It should be noted that attached drawing is not intended to limit the present invention for illustrating the present invention.Note that indicating that the attached drawing of structure can
It can be not necessarily drawn to scale.Also, in attached drawing, same or similar element indicates same or similar label.
Specific embodiment
In order to keep the contents of the present invention more clear and understandable, combined with specific embodiments below with attached drawing in of the invention
Appearance is described in detail.
In the present invention, possible partial exposure exception defect is detected automatically by clustering algorithm, by recalling accordingly
Algorithm inspection whether there is same flaw indication in same position by other wafers of same board, and if so, thinking
It is correct partial exposure exception flaw indication.
Being described below of the invention has preferred embodiment.
Fig. 1 schematically shows partial exposure exception defect automatic testing method according to the preferred embodiment of the invention
Flow chart.
As shown in Figure 1, partial exposure exception defect automatic testing method according to the preferred embodiment of the invention includes:
First step S1: it using the flaw indication of defect checking machine platform detection wafer, and generates lack according to testing result
Fall into signal file；
For example, the defect checking machine platform is the board of model KLA-Tencor 2825.2825 machine of KLA-Tencor
Platform detects the flaw indication file that standard can be generated after flaw indication.However, it is desirable to which explanation, falls into the model of detection board
It is not limited to the board of model KLA-Tencor 2825, in fact, for example all can normally generate KLARF reticle
The scanning machine of formula file is suitable for the present invention.
Second step S2: converting binarized-image file for flaw indication file, and wherein each defect point constitutes one
Valid pixel；
Third step S3: clustering is carried out to all valid pixels that defect point is constituted using clustering algorithm, obtains group
The information of poly- defect, and record the location information of the clustering defect on wafer；
Four steps S4: according to Wafer identification information, the technique that the wafer is passed through is obtained from manufacturing execution system
The machine station information of board；
For example, the Wafer identification information is wafer batch identification code and/or wafer identification code.
5th step S5: the Wafer identification information, the machine station information, the clustering flaw indication and clustering are lacked
The location information being trapped on wafer is saved to database；
6th step S6: all clustering defects of acquisition are traversed, according to clustering defect characteristic and machine station information, described
Retrieve in specified time interval whether have the defect for meeting similarity Condition in database.
As a result, if retrieve in the database meet similarity Condition as a result, if judge the clustering detected
Defect is an effective partial exposure exception defect.Meet similitude, whereas if not retrieving in the database
Condition as a result, then judging that the clustering defect detected is an invalid partial exposure exception defect.
Specifically, it is described have the defect for meeting similarity Condition be occur in wafer same position have identical clustering
The defect of defect characteristic and identical machine station information.
For instance, it is preferred that the clustering defect characteristic is the position of clustering defect and/or the shape of clustering defect.
Moreover, for example, specifically, the specified time interval refer to before predetermined number of days within.
In the present invention, possible partial exposure exception defect is detected automatically by clustering algorithm, by recalling accordingly
Algorithm inspection whether there is same flaw indication in same position by other wafers of same board, and if so, thinking
It is correct partial exposure exception flaw indication.As a result, the present invention can efficiently solve artificial judgment clustering signal whether
Accuracy and the lower problem of timeliness, find problematic wafer in time when same position.
In addition, it should be noted that, unless stated otherwise or point out, the otherwise term " first " in specification, "
Two ", the descriptions such as " third " are used only for distinguishing various components, element, the step etc. in specification, each without being intended to indicate that
Component, element, the logical relation between step or ordinal relation etc..
It is understood that although the present invention has been disclosed in the preferred embodiments as above, above-described embodiment not to
Limit the present invention.For any person skilled in the art, without departing from the scope of the technical proposal of the invention,
Many possible changes and modifications all are made to technical solution of the present invention using the technology contents of the disclosure above, or are revised as
With the equivalent embodiment of variation.Therefore, anything that does not depart from the technical scheme of the invention are right according to the technical essence of the invention
Any simple modifications, equivalents, and modifications made for any of the above embodiments still fall within the range of technical solution of the present invention protection
It is interior.
Claims (7)
1. a kind of partial exposure exception defect automatic testing method, characterized by comprising:
First step: using the flaw indication of defect checking machine platform detection wafer, and flaw indication is generated according to testing result
File；
Second step: converting binarized-image file for flaw indication file, and wherein each defect point constitutes an effective picture
Element；
Third step: clustering is carried out to all valid pixels that defect point is constituted using clustering algorithm, obtains clustering defect
Information, and record the location information of the clustering defect on wafer；
Four steps: according to Wafer identification information, the technique board that the wafer is passed through is obtained from manufacturing execution system
Machine station information；
5th step: by the Wafer identification information, the machine station information, the clustering defect and clustering defect on wafer
Location information save to database；
6th step: traversing all clustering defects of acquisition, according to clustering defect characteristic and machine station information, in the database
Whether there is the defect for meeting similarity Condition in middle retrieval specified time interval；If retrieving symbol in the database
Close similarity Condition as a result, then judging that the clustering defect detected is an effective partial exposure exception defect；If
Do not retrieve meeting similarity Condition in the database as a result, then judging that the clustering defect detected is one invalid
Partial exposure exception defect.
2. partial exposure exception defect automatic testing method according to claim 1, which is characterized in that it is described have meet phase
Defect like property condition is to occur have identical clustering defect characteristic and identical machine station information in wafer same position
Defect.
3. partial exposure exception defect automatic testing method according to claim 1, which is characterized in that the clustering defect
It is characterized in the position of clustering defect.
4. partial exposure exception defect automatic testing method according to claim 1, which is characterized in that the clustering defect
It is characterized in the shape of clustering defect.
5. partial exposure exception defect automatic testing method according to claim 1, which is characterized in that the Wafer identification
Information is wafer identification code.
6. partial exposure exception defect automatic testing method according to claim 1, which is characterized in that the Wafer identification
Information is wafer batch identification code.
7. partial exposure exception defect automatic testing method according to claim 1, which is characterized in that the defects detection
The type of board is all wafer defect scanning machines.
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| CN108899288B (en) * | 2018-07-20 | 2020-11-13 | 上海华虹宏力半导体制造有限公司 | Wafer mark monitoring method and method for judging alignment position of laser marking machine |
| CN109522931A (en) * | 2018-10-18 | 2019-03-26 | 深圳市华星光电半导体显示技术有限公司 | Judge the method and its system of the folded figure aggregation of defect |
| CN109449093B (en) * | 2018-10-24 | 2020-12-04 | 武汉新芯集成电路制造有限公司 | Wafer detection method |
| CN110610214A (en) * | 2019-09-23 | 2019-12-24 | 桂林电子科技大学 | Wafer map fault mode identification method and system based on DCNN |
| KR20230002862A (en) * | 2020-05-01 | 2023-01-05 | 피디에프 솔루션즈, 인코포레이티드 | Wafer bin map-based root cause analysis |
| CN117471292B (en) * | 2023-12-28 | 2024-03-19 | 深圳市森美协尔科技有限公司 | Wafer crack identification method and related device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102148174A (en) * | 2010-12-24 | 2011-08-10 | 良率国际贸易（上海）有限公司 | Semiconductor defect signal grasping and counting system and method |
| CN103926256A (en) * | 2014-03-20 | 2014-07-16 | 上海华力微电子有限公司 | CMP scratch automatic detection system |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000332071A (en) * | 1999-05-17 | 2000-11-30 | Hitachi Ltd | Visual inspection method and apparatus, and manufacture of semiconductor device |
| JP4310090B2 (en) * | 2002-09-27 | 2009-08-05 | 株式会社日立製作所 | Defect data analysis method and apparatus, and review system |
| JP5081590B2 (en) * | 2007-11-14 | 2012-11-28 | 株式会社日立ハイテクノロジーズ | Defect observation classification method and apparatus |
| JP2012237566A (en) * | 2011-05-10 | 2012-12-06 | Hitachi High-Technologies Corp | Defect observation method and apparatus for the same |
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- 2016-05-25 CN CN201610356816.7A patent/CN106067427B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102148174A (en) * | 2010-12-24 | 2011-08-10 | 良率国际贸易（上海）有限公司 | Semiconductor defect signal grasping and counting system and method |
| CN103926256A (en) * | 2014-03-20 | 2014-07-16 | 上海华力微电子有限公司 | CMP scratch automatic detection system |
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