CN106057108A - Display device - Google Patents
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- CN106057108A CN106057108A CN201610554145.5A CN201610554145A CN106057108A CN 106057108 A CN106057108 A CN 106057108A CN 201610554145 A CN201610554145 A CN 201610554145A CN 106057108 A CN106057108 A CN 106057108A
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- 238000001514 detection method Methods 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims description 5
- 238000012360 testing method Methods 0.000 claims description 3
- 238000013499 data model Methods 0.000 description 27
- 238000010586 diagram Methods 0.000 description 25
- 230000000875 corresponding effect Effects 0.000 description 11
- 230000002159 abnormal effect Effects 0.000 description 10
- 239000013078 crystal Substances 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 210000001367 artery Anatomy 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 210000003462 vein Anatomy 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a display device which is provided with a driving circuit, a plurality of driving wires, a plurality of transistor switches and a reading wire. Each driving line is provided with a first end and a second end, and the first end of each driving line is connected with the driving circuit. Each transistor switch has a first terminal, a second terminal, and a control terminal. The first end of each transistor switch is electrically connected to the first voltage end, and the control end of each transistor switch is electrically connected to the second end of a corresponding driving line. The readout line is electrically connected to the second end of each transistor switch.
Description
Technical field
The present invention is about a kind of display device, especially in regard to a kind of display device with conductor cord disconnection power of test.
Background technology
Display device is to be driven with grid through source drive line (data wire) with gate driver circuit by source electrode drive circuit
Moving-wire (scan line) updates the brightness of each pixel, uses renewal picture.But raster data model line and source drive line due to
The relation of processing procedure, the problem tending to broken string.And making, transporting any time all may be at grid with use etc.
Drive the problem that line or source drive line have broken string.Therefore, how still can be simply and rapidly after display device is dispatched from the factory
The most whether detection has disconnection problem is a problem to be solved.
Summary of the invention
In view of problem above, the present invention proposes a kind of display device, is able to after display device is dispatched from the factory remain to examine simply
Survey whether wherein each driving line has broken string.
According to the display device of one embodiment of the invention, have drive circuit, a plurality of driving line, multiple transistor switch with
Read line.Every drives line to have the first end and the second end, and every first end driving line is connected to drive circuit.Each crystalline substance
Body pipe switch has the first end, the second end and controls end.First end of each transistor switch is electrically connected at the first voltage end,
And each transistor switch control the second end that end is electrically connected at a driving line of correspondence.Read line is electrically connected at often
Second end of individual transistor switch.
In sum, the present invention is controlled by raster data model line or the transistor switch of source drive line, and mat by addition
The signal provided by corresponding voltage end, gate driver circuit or source electrode drive circuit are determined whether any driving line
The problem having broken string.
The above explanation about present disclosure and the explanation of following embodiment are in order to demonstrate and to explain the present invention
Spirit and principle, and provide the patent claim of the present invention further to explain.
Accompanying drawing explanation
Fig. 1 is the display device circuit framework schematic diagram according to one embodiment of the invention.
Fig. 2 A is the signal timing diagram of the normal display device according to one embodiment of the invention.
Fig. 2 B is the signal timing diagram of the abnormal display device according to one embodiment of the invention.
Fig. 3 is the display device circuit framework schematic diagram according to another embodiment of the present invention.
Fig. 4 A is the signal timing diagram of the normal display device according to one embodiment of the invention.
Fig. 4 B is the signal timing diagram of the abnormal display device according to one embodiment of the invention.
Fig. 4 C is the signal timing diagram of the normal display device according to one embodiment of the invention.
Fig. 4 D is the signal timing diagram of the abnormal display device according to one embodiment of the invention.
Fig. 5 is the display device circuit framework schematic diagram according to another embodiment of the present invention.
Fig. 6 A is the signal timing diagram of the normal display device according to one embodiment of the invention.
Fig. 6 B is the signal timing diagram of the abnormal display device according to one embodiment of the invention.
Fig. 7 is the display device circuit framework schematic diagram according to another embodiment of the present invention.
Fig. 8 is the display device circuit framework schematic diagram according to yet another embodiment of the invention.
Wherein, reference:
1000 display devices
1100 gate driver circuits
1110 voltage reset circuits
1200 source electrode drive circuits
S1～SNRaster data model line
D1～DMSource drive line
TS1～TSNTransistor switch
TD1～TDMTransistor switch
READ read line
V1、V11～V1MFirst voltage end
PF image time is interval
P1～PN, PB time interval
VREAD、VS1～VSN、VD1、VD2Signal
Detailed description of the invention
Hereinafter describing detailed features and the advantage of the present invention the most in detail, its content be enough to make any ability
The technical staff in territory understands the technology contents of the present invention and implements according to this, and wants according to content disclosed in this specification, right
Ask protection domain and accompanying drawing, any those skilled in the art can be readily understood upon purpose and the advantage that the present invention is correlated with.Below
Embodiment further describe the viewpoint of the present invention, but non-to limit scope of the invention anyways.
Thin-film transistor circuit framework used in display device disclosed in this invention is the skill of art
Art personnel are able to freely design according to the following example of the present invention.Present invention below is all with N-type TFT (N-type
Thin-film transistor, N-type TFT) as a example by.Refer to Fig. 1, it is the display dress according to one embodiment of the invention
Circuits configuration diagram.As it is shown in figure 1, there is gate driver circuit according to the display device 1000 of one embodiment of the invention
1100, source electrode drive circuit 1200, a plurality of raster data model line (scan line) S1～SN, a plurality of source drive line (data wire) D1~
DM, multiple transistor switch TS1～TSNWith read line READ.Every raster data model line has the first end and the second end, with Fig. 1 is
Example, the first end of raster data model line is left end (for Fig. 1, one end that X-axis coordinate is less), and the second end of raster data model line
For right-hand member (for Fig. 1, one end that X-axis coordinate is bigger).First end of every raster data model line is connected to gate driver circuit
1100.Each transistor switch has the first end, the second end and controls end.First end of each transistor switch is electrically connected at
First voltage end V1, and the end that controls of each transistor switch is electrically connected at the second end of a corresponding raster data model line.
Read line READ is electrically connected at the second end of each transistor switch.In the present embodiment, although read line READ electrically connects
It is connected to gate driver circuit 1100.But in other embodiments, read line READ or be external to the output of signal
End, so that user or tester measure, or is electrically connected to source electrode drive circuit 1200, and the present invention is the most in addition
Limit.Although additionally, gate driver circuit in the present invention 1100 and source electrode drive circuit 1200 are respectively at display device 1000
Left side and downside, but person of ordinary skill in the field when can according to the present invention spirit configuration driven circuit voluntarily,
Driving position and the annexation of line and corresponding transistor switch, the present invention is not any limitation as.
Therefore, refer to Fig. 2 A, it is the signal timing diagram of the normal display device according to one embodiment of the invention.As
Shown in Fig. 2 A, wherein signal VS1To signal VSNRaster data model line S is delivered to by gate driver circuit 11001～SNVoltage, signal
V1It is the first voltage end V1Voltage, the voltage that signal VREAD is then read by read line READ.Interval in the very first time
P1To N time interval PN, gate driver circuit 1100 is respectively to raster data model line S1To raster data model line SNHigh levle is provided
Pulse (pulse), and in each time interval, the first voltage end V1Also provide for a high levle pulse.Wherein grid drives
The pulse of moving-wire is vertical synchronizing signal (vertical synchronization signal, V-sync), and the first voltage
End V1The width of the pulse provided, for example, less than the width of the pulse (vertical synchronizing signal) on each controlling grid scan line.
Thus in each time interval, the voltage of signal VREAD should as shown in Figure 2 A, and essence is synchronized with the first voltage end V1Carried
The pulse of confession.
Relative, refer to its signal timing diagram being the abnormal display device according to one embodiment of the invention of Fig. 2 B.
State corresponding to Fig. 2 B is at raster data model line S2On have broken string, therefore in the second time interval P2In, transistor switch TS2
Do not turn on, thus signal VREAD and the first voltage end V1Signal asynchronous, so that user, gate driver circuit 1100
Or source electrode drive circuit 1200 is able to by comparing the first voltage end V1Signal and signal VREAD and determine whether grid
Drive line broken string and which bar raster data model line broken string.More particularly, in an embodiment, the first voltage end V1Electrically connect
It is connected to gate driver circuit 1100, and the first voltage end V1The pulse provided is substantially by gate driver circuit 1100 institute
Produce.Therefore, gate driver circuit 1100 is produced to the first voltage end V according to it1Pulse examined with from read line READ
The signal VREAD measured, is directly judged that both are the most corresponding.
In another embodiment of the present invention, refer to Fig. 3, it is the display device circuit according to another embodiment of the present invention
Configuration diagram.Compared to the display device of Fig. 1, in the embodiment of Fig. 3, gate driver circuit 1100 has more a voltage reading
Sense circuit 1110, in order to read the signal V being input to read line1.From very first time interval P1Start a to the last time zone
Between PNTill, the first voltage end V1All maintain high voltage (for example, supply voltage VDD).Then refer to Fig. 4 A, it is according to this
The signal timing diagram of the normal display device of a bright embodiment.As long as it will be seen that there be any one scan line in Fig. 4 A
Voltage be high voltage, then signal VREAD will be high voltage.If wherein scan line S2There is broken string, then refer to Fig. 4 B, its
Signal timing diagram for the abnormal display device according to one embodiment of the invention.Due to scan line S2There is broken string, therefore
Two time interval P2In, even if gate driver circuit 1100 is to scan line S2Send high voltage, but transistor switch TD2Grid
Pole tension can't become high voltage, but maintains low-voltage.Thus at the second time interval P2In, transistor switch TD2Do not lead
Logical, therefore signal VREAD is at the second time interval P2Middle maintenance low-voltage.So that user, gate driver circuit 1100 or
Source electrode drive circuit 1200 is able to by comparing the first voltage end V1Signal and signal VREAD and determine whether raster data model
Line broken string and which bar raster data model line broken string.
But, the first voltage end V1The voltage provided not necessarily has to be DC voltage.Refer to Fig. 4 C, it is according to this
Invent the signal timing diagram of the normal display device of an embodiment.Compared to the embodiment of Fig. 4 A, the first voltage end V1Carried
The voltage of confession substantially can have random waveform, and in the embodiment of Fig. 4 C, the first voltage end V1The voltage provided is tooth
Shape ripple (sawtooth wave).Therefore when to have the voltage in any one scan line be high voltage, signal VREAD's
Waveform can correspond to the first voltage end V1The waveform provided.If if scan line S2Have broken string, then it is according to this to refer to Fig. 4 D
Invent the signal timing diagram of the abnormal display device of an embodiment.Due to scan line S2There is broken string, therefore in the second time zone
Between P2In, even if gate driver circuit 1100 is to scan line S2Send high voltage, but transistor switch TD2Grid voltage also
High voltage will not be become, but maintain low-voltage.Thus at the second time interval P2In, transistor switch TD2Do not turn on, therefore
Signal VREAD is at the second time interval P2Middle maintenance low-voltage.So that user, gate driver circuit 1100 or source drive
Circuit 1200 is able to by comparing the first voltage end V1Signal and signal VREAD and determine whether raster data model line broken string with
And which bar raster data model line broken string.
In another embodiment of the present invention, refer to Fig. 5, it is the display device circuit according to another embodiment of the present invention
Configuration diagram.As it is shown in figure 5, there is gate driver circuit 1100, source according to the display device 1000 of one embodiment of the invention
Pole drive circuit 1200, a plurality of raster data model line (scan line) S1～SN, a plurality of source drive line (data wire) D1～DM, multiple
Transistor switch TD1～TDMWith read line READ.Every source drive line has the first end and the second end, as a example by Fig. 5, source electrode
The first end driving line is lower end (for Fig. 5, one end that Y-axis coordinate is less), and the second end of source drive line is upper end
(for Fig. 5, one end that Y-axis coordinate is bigger).First end of every source drive line is connected to source electrode drive circuit 1100.Often
Individual transistor switch has the first end, the second end and controls end.First end of each transistor switch is electrically connected at the first electricity
Pressure side V1, and the end that controls of each transistor switch is electrically connected at the second end of a corresponding source drive line.Read line
READ is electrically connected at the second end of each transistor switch.In the present embodiment, although read line READ is electrically connected to source
Pole drive circuit 1200.But in other embodiments, read line READ or be external to a signal output part so that
Measuring in user or tester, or be electrically connected to gate driver circuit 1100, the present invention is not any limitation as.
Therefore, refer to Fig. 6 A, it is the signal timing diagram of the normal display device according to one embodiment of the invention.As
Shown in Fig. 6 A, wherein signal VS1To signal VSNRaster data model line S is delivered to by gate driver circuit 11001～SNVoltage, signal
VD1With signal VD2Source drive line D is delivered to respectively by source electrode drive circuit 12001With D2Voltage, signal V1It is the first voltage
End V1Voltage, the voltage that signal VREAD is then read by read line READ.When one image time interval PF comprises first
Between interval P1To N time interval PN(namely updating time interval) and blank time interval PB, in very first time interval P1
To N time interval PN, gate driver circuit 1100 is respectively to raster data model line S1To raster data model line SNThe arteries and veins of high levle is provided
Punching (pulse), and in the PB of blank time interval, source electrode drive circuit 1200 is to source drive line D1To source drive line DMIts
The source drive line of partial is sequentially provided the pulse of high levle.
For example, in the PB of blank time interval, source electrode drive circuit 1200 is first to source drive line D1Pulse is provided,
Then to source drive line D2Pulse, and the first voltage end V simultaneously are provided1Also provide for pulse.In an embodiment, the first electricity
The width of the pulse that pressure side provides less than the source electrode drive circuit 1200 width to the pulse that each source drive line provides, the most not with
This is limited.According to this embodiment, in each time interval, as shown in Figure 6A, essence is synchronized with first to the voltage of signal VREAD
Voltage end V1The pulse provided.The blank time interval PB of each image time interval PF is such as divided into four detections
Time interval, and source electrode is driven respectively by source electrode drive circuit 1200 in four detection time intervals of a blank time interval PB
Four during moving-wire is knitted are sequentially provided voltage.The voltage (driving voltage) provided needs to make transistor switch turn on.
Relative, refer to its signal timing diagram being the abnormal display device according to one embodiment of the invention of Fig. 6 B.
State corresponding to Fig. 6 B is at source drive line D2On have broken string, therefore in the PB of some blank time interval, signal
VREAD and the first voltage end V1Signal asynchronous, so that user, gate driver circuit 1100 or source electrode drive circuit
1200 are able to by comparing the first voltage end V1Signal and signal VREAD and determine whether raster data model line broken string and which
Article one, raster data model line broken string.
Refer to Fig. 7, it is the display device circuit framework schematic diagram according to another embodiment of the present invention.As it is shown in fig. 7,
According to the display device 1000 of another embodiment of the present invention, there is gate driver circuit 1100, source electrode drive circuit 1200, a plurality of
Raster data model line (scan line) S1～SN, a plurality of source drive line (data wire) D1～DM, multiple transistor switch TD1～TDMWith
Read line READ.Every source drive line has the first end and the second end, as a example by Fig. 7, under the first end of source drive line is
End (with one end that Y-axis coordinate for Fig. 7 is less), and the second end of source drive line be upper end (with Y-axis coordinate for Fig. 7 relatively
Big one end).First end of every source drive line is connected to source electrode drive circuit 1200.Each transistor switch has first
End, the second end and control end.First end of each transistor switch is electrically connected at the first voltage end V1, and each transistor is opened
Close controls the second end that end is electrically connected at a source drive line of correspondence.Read line READ is electrically connected at each crystal
Second end of pipe switch.More particularly, in the embodiment of Fig. 7, transistor switch TD1The first end be connected to the first voltage
End V1, transistor switch TD2The first end be connected to transistor switch TD1The second end, each transistor switch concatenate, crystal
Pipe switch TDMThe first end be connected to transistor switch TDM-1The second end and transistor switch TDMThe second end be connected to read
Line READ.Therefore in the present embodiment, the first voltage end V1One pulse of offer in the PB of blank time interval, and source drive
Circuit 1200 in the PB of blank time interval simultaneously to every source drive line D1To DMThere is provided high voltage, so that transistor is opened
Close TD1To transistor switch TDMCan simultaneously turn on.Therefore, user, gate driver circuit 1100 or source electrode drive circuit 1200
Be able to by signal VREAD in detection blank time interval PB whether with the first voltage end V1The pulse provided is corresponding, and sentences
The disconnected abnormal problem whether having any source drive line to have broken string.
In another embodiment, refer to Fig. 8, it is to show according to the display device circuit framework of yet another embodiment of the invention
It is intended to.As shown in Figure 8, according to the display device 1000 of one embodiment of the invention, there is gate driver circuit 1100, source drive
Circuit 1200, a plurality of raster data model line (scan line) S1～SN, a plurality of source drive line (data wire) D1～DM, multiple transistors
Switch TD1～TDMWith read line READ.Every source drive line has the first end and the second end, as a example by Fig. 8, source drive line
The first end be lower end (with one end that Y-axis coordinate for Fig. 8 is less), and the second end of source drive line is that upper end is (with Fig. 8
One end that speech Y-axis coordinate is bigger).First end of every source drive line is connected to source electrode drive circuit 1200.Each transistor
Switch has the first end, the second end and controls end.Transistor switch TD1The first end be electrically connected at the first voltage end V11, brilliant
Body pipe switch TD2The first end be electrically connected at the first voltage end V12, transistor switch TDMThe first end be electrically connected at first
Voltage end V1M, and the end that controls of each transistor switch is electrically connected at the second end of a corresponding source drive line.Read
Line READ is electrically connected at the second end of each transistor switch.More particularly, in the embodiment of Fig. 6, transistor switch
TD2The first end be connected to transistor switch TD1The second end, each transistor switch concatenate, transistor switch TDMFirst
End is connected to transistor switch TDM-1The second end and transistor switch TDMThe second end be connected to read line READ.Therefore in
In the present embodiment, the first voltage end V11To the first voltage end V1MOne pulse is provided in the PB of blank time interval in proper order,
And source electrode drive circuit 1200 in the PB of blank time interval simultaneously to every source drive line D1To DMHigh voltage is provided, thus
Make transistor switch TD1To transistor switch TDMCan simultaneously turn on.Therefore, user, gate driver circuit 1100 or source electrode drive
Galvanic electricity road 1200 be able to by signal VREAD in detection blank time interval PB whether with the first voltage end V11To the first voltage end
V1MThe pulse provided is corresponding, and determines whether that any source drive line has the abnormal problem of broken string.Specifically, if
If transistor switch TD2Control the source drive line D that connected of end2There is disconnection problem, then the first voltage end V11With the first electricity
Pressure side V12The pulse provided cannot be transferred into read line READ, and therefore via signal VREAD, such disconnection problem is able to
It is examined out.
In sum, the present invention is controlled by raster data model line or the transistor switch of source drive line, and mat by addition
The signal provided by corresponding voltage end, gate driver circuit or source electrode drive circuit are determined whether any driving line
The problem having broken string.
Although the present invention is open as above with aforesaid embodiment, but it is not limited to the present invention.Without departing from this
In bright spirit and scope, the change done and amendment, all belong to the scope of patent protection of the present invention.Defined about the present invention
Protection domain refer to appending claims.
Claims (10)
1. a display device, it is characterised in that comprise:
One drive circuit；
N bar drives line, and this driving line each has one first end and one second end, and this first end of this driving line each connects
In this drive circuit, N is the integer more than 2；
N number of transistor switch, wherein i-th transistor switch comprises:
One first end, this first end of this i-th transistor is electrically connected at one first voltage end, and i is the most whole less than or equal to N
Number；
One second end；And
One controls end, is electrically connected at this N bar and drives i-th this second end driving line in line；And
One read line, is electrically connected at this second end of this transistor switch each.
2. display device as claimed in claim 1, it is characterised in that this drive circuit is a source electrode drive circuit, and this shows
One picture cycle of showing device divides into a renewal time interval and a blank time is interval, and this source electrode drive circuit is in this blank
This N bar is driven line at least one of which to provide at least one driving voltage by time interval.
3. display device as claimed in claim 2, it is characterised in that this source electrode drive circuit is right in this blank time interval
This N bar drives the M bar in line to drive line to provide this driving voltage, and M is less than N and the integer more than or equal to 1.
4. display device as claimed in claim 3, it is characterised in that this blank time interval is divided into M detection time
Interval, the kth bar that this source electrode drive circuit is supplied in this M bar driving line in kth detection time interval drives line, and this drives
Galvanic electricity pressure, k is the positive integer less than or equal to M.
5. display device as claimed in claim 2, it is characterised in that this i-th transistor switch is connected to this (i-
1) individual transistor switch and this (i+1) individual transistor switch, this i-th transistor switch passes through this (i+1) individual transistor
Switch and be electrically connected to this read line, and this i-th transistor switch is electrically connected with through this (i-1) individual transistor switch
To this first voltage end.
6. display device as claimed in claim 5, it is characterised in that this source electrode drive circuit is same in this blank time interval
Time provide this driving voltage to this driving line each.
7. display device as claimed in claim 1, it is characterised in that this drive circuit is that a gate driver circuit is in order to this
A little driving lines provide a driving voltage.
8. display device as claimed in claim 1, it is characterised in that this read line is directly connected in this transistor switch each
This second end.
9. the display device as described in arbitrary in claim 2 to 7, it is characterised in that this first voltage end provides a test letter
Number, and the voltage level of this driving voltage is higher than the voltage level of this test signal.
10. the display device as described in arbitrary in claim 1 to 8, it is characterised in that the voltage that this first voltage end is provided
It is a DC voltage or an alternating voltage.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105114939 | 2016-05-13 | ||
| TW105114939A TWI571849B (en) | 2016-05-13 | 2016-05-13 | Display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106057108A true CN106057108A (en) | 2016-10-26 |
Family
ID=57185535
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610554145.5A Pending CN106057108A (en) | 2016-05-13 | 2016-07-14 | Display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN106057108A (en) |
| TW (1) | TWI571849B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030184334A1 (en) * | 2000-01-06 | 2003-10-02 | Ikuo Matsunaga | Array substrate and method of inspecting the same |
| US20050093567A1 (en) * | 2003-09-19 | 2005-05-05 | Shoji Nara | Inspection method and inspection device for display device and active matrix substrate used for display device |
| CN101312009A (en) * | 2007-05-25 | 2008-11-26 | 株式会社日立显示器 | Display device |
| CN203055406U (en) * | 2012-12-24 | 2013-07-10 | 北京京东方光电科技有限公司 | Signal line detecting device and display device for substrate |
| CN103680392A (en) * | 2012-09-25 | 2014-03-26 | 乐金显示有限公司 | Organic light emitting display device and driving method thereof |
| CN104769663A (en) * | 2012-12-07 | 2015-07-08 | 凸版印刷株式会社 | Display device and display method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI243294B (en) * | 2004-02-24 | 2005-11-11 | Bing-Ru Wu | Programmable control chip integrating memory and editing interface |
| TWI343038B (en) * | 2006-09-04 | 2011-06-01 | Hannstar Display Corp | Liquid crystal display |
-
2016
- 2016-05-13 TW TW105114939A patent/TWI571849B/en not_active IP Right Cessation
- 2016-07-14 CN CN201610554145.5A patent/CN106057108A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030184334A1 (en) * | 2000-01-06 | 2003-10-02 | Ikuo Matsunaga | Array substrate and method of inspecting the same |
| US20050093567A1 (en) * | 2003-09-19 | 2005-05-05 | Shoji Nara | Inspection method and inspection device for display device and active matrix substrate used for display device |
| CN101312009A (en) * | 2007-05-25 | 2008-11-26 | 株式会社日立显示器 | Display device |
| CN103680392A (en) * | 2012-09-25 | 2014-03-26 | 乐金显示有限公司 | Organic light emitting display device and driving method thereof |
| CN104769663A (en) * | 2012-12-07 | 2015-07-08 | 凸版印刷株式会社 | Display device and display method |
| CN203055406U (en) * | 2012-12-24 | 2013-07-10 | 北京京东方光电科技有限公司 | Signal line detecting device and display device for substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201740359A (en) | 2017-11-16 |
| TWI571849B (en) | 2017-02-21 |
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Application publication date: 20161026 |
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