CN106027349A - PCI-E bus interface transmission card and data transmission method based on the transmission card - Google Patents
PCI-E bus interface transmission card and data transmission method based on the transmission card Download PDFInfo
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- CN106027349A CN106027349A CN201610278267.6A CN201610278267A CN106027349A CN 106027349 A CN106027349 A CN 106027349A CN 201610278267 A CN201610278267 A CN 201610278267A CN 106027349 A CN106027349 A CN 106027349A
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- 238000006243 chemical reaction Methods 0.000 claims description 10
- 238000001514 detection method Methods 0.000 claims description 8
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40123—Interconnection of computers and peripherals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/62—Queue scheduling characterised by scheduling criteria
- H04L47/6215—Individual queue per QOS, rate or priority
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Abstract
The invention provides a PCI-E bus interface transmission card and a data transmission method based on the transmission card. The transmission card comprises a PCI-E bus interface IP core, a register, a register read and write control module, a TLP data packet analysis module, a sending module and/or a receiving module; the sending module comprises a sending circuit and a sending DMA control module, the receiving module comprises a receiving circuit and a receiving DMA control module, and the number of the sending circuits and the number of the receiving circuits are non-negative integers; the PCI-E bus interface IP core is in communication connection with the TLP data packet analysis module, a firs output end of the TLP data packet analysis module is connected with an input end of the sending circuit, the output end of the sending circuit is connected with the sending circuit, a second output end of the TLP data packet analysis module is connected with the input end of the register read and write control module, the register read and write control module is in bidirectional connection with the register, and the register is in bidirectional connection with the sending DMA control module. The transmission card can quickly and accurately send and receive data.
Description
Technical field
The present invention relates to computer realm, be specifically related to a kind of PCI-E EBI transmission card and based on this biography
The data transmission method of defeated card.
Background technology
PCI-Express is up-to-date bus and interface standard, often referred to simply as PCI-E, is by Intel
In calendar year 2001 proposition.PCI-E belongs to high speed serialization point-to-point dual pathways high bandwidth transmission, is connected
Equipment distribution exclusively enjoys bandwidth chahnel, does not share bus bandwidth, mainly supports active power management, error reporting,
End-to-end reliability transmission, the function such as hot plug and service quality (QOS).
PCI-E have employed at present the most popular point-to-point connected in series, compared with PCI and meter more in early days
Sharing and framework of calculation machine bus, each equipment has the special connection of oneself, it is not necessary to please to whole bus
Seek bandwidth, and data transmission rate can be brought up to a frequency the highest, reach PCI and be not provided that
High bandwidth.One-way transmission, PCI-E can only be realized within the single time cycle relative to traditional PCI bus
Double either simplex connect and be provided that higher efficiency of transmission and quality, the difference between them is with half-duplex and complete double
Work is similar to.The main advantage of PCI-E is exactly that message transmission rate is high, and the most sizable development potentiality.
But PCI-E data transmission bauds is still limited by transmission card at present, thus system of leading is at transmission side data
The advantage that its transfer rate is high can not have preferably been given play in face.
Further, when investigating the Optimality of transmission of data, in addition to the comparison to message transmission rate, also
Relate to considering of the safety to data.Pacify in data currently in PCI-E interface data transmission device
Entirely in property, it is mostly by simply sending data-interface, reception data-interface, transmission caching, receiving and delay
Deposit and data command configuration interface etc. realizes the monitoring of the transmission to data and safety, such as application number
Shown in 2013106645871 disclosure of thats.But, require the highest today in Information Security,
This data transmission device can not meet people's high request to Information Security.
Summary of the invention
In order to overcome defect present in above-mentioned prior art, it is an object of the invention to provide a kind of security performance
High, the PCI-E EBI transmission card carried out data transmission that can be the most complete and number based on this transmission card
According to transmission method.
In order to realize the above-mentioned purpose of the present invention, the invention provides a kind of PCI-E EBI transmission card,
Including PCI-E interface IP kernel and depositor, also include that depositor Read-write Catrol module, TLP packet divide
Analysis module, sending module and/or receiver module；
Described sending module includes transmitting line and sends DMA control module, and described receiver module includes receiving
Circuit and reception DMA control module, described transmitting line, the quantity of reception circuit are nonnegative integer；
Described PCI-E interface IP kernel communicates to connect with described TLP data packet analysis module, described TLP number
According to packet analysis module the first outfan connect described transmitting line input, described transmitting line outfan with send out
Sending connection, described TLP data packet analysis module the second outfan connects described depositor Read-write Catrol mould
Block input, described Read-write Catrol module is bi-directionally connected with described depositor, described depositor and described transmission
DMA control module is bi-directionally connected；
Described reception line input connects described reception with reception connection, described reception line output
DMA control module input, described DMA control module is bi-directionally connected with described depositor, described reception DMA
Control module outfan is connected to described PCI-E interface IP kernel；
When data send, main frame first will need the data sent to be written in the relief area in internal memory, then will
Comprise data length, start in the control word described depositor of write that data send mark；Described transmission DMA
Control module by PCI-E interface send read request TLP packet to described TLP data packet analysis module,
Described TLP data packet analysis module judges whether the TLP packet received is read request TLP packet,
Deposit if it is, described depositor Read-write Catrol module reads according to the address in read request TLP packet
Data in device, and to being then forwarded to described by PCI-E interface plus the packet header running through TLP data
TLP data packet analysis module, whether the TLP packet that the judgement of described TLP data packet analysis module is received
For running through TLP packet, send to described transmitting line if it is, this is run through TLP packet
Carry out data transmission；
During data receiver, the data received are sent to described reception DMA control by described data reception lines
Module, described reception DMA control module sends write request TLP packet to described by PCI-E interface
TLP data packet analysis module, the TLP packet received by the judgement of described TLP data packet analysis module is
It is no for write request TLP packet, if it is, described depositor Read-write Catrol module reads write request TLP
Address in packet and data, and write data in the depositor that address part is specified, then pass through
PCI-E interface write host memory.
Being judged by the analysis of TLP data packet analysis module, can be accurately judged to this transmission card needs execution
It is sending or receiving of task, and combines depositor Read-write Catrol module, send DMA control module and connect
Receiving DMA control module makes this transmission card can carry out the transmission to data and reception more fast and accurately.With
Time, owing to the judgement of analyzing of TLP data packet analysis module ensure that the safety of data, to write request TLP
Packet, read request TLP packet and run through identification and the process of TLP packet these three packet,
Ensure that the safety of data.
Further, this transmission card also includes that TLP packet receives relief area, and described TLP packet receives
Relief area communicates to connect with described PCI-E interface IP kernel and described TLP data packet analysis module respectively.TLP
Packet receives relief area for the TLP packet that received by PCI-E interface of caching, it is to avoid TLP
The loss of packet, it is ensured that receive or send the integrity of data.
Further, this transmission card also includes that a TLP packet sends relief area, the 2nd TLP packet
Sending relief area and the 3rd TLP packet sends relief area, a described TLP packet sends buffering and distinguishes
Not with described depositor Read-write Catrol module and the communication connection of PCI-E interface IP kernel, described 2nd TLP number
Send relief area according to bag to communicate to connect with described transmission DMA control module and PCI-E interface IP kernel respectively,
Described 3rd TLP packet send relief area respectively with described reception DMA control module and PCI-E interface
IP kernel communicates to connect.
Oneth TLP packet send buffer cache correspondence depositor read request run through TLP packet,
2nd TLP packet sends buffer cache and sends the TLP packet of DMA request, i.e. read request TLP
Packet, the 3rd TLP packet sends buffer cache and receives the TLP packet of DMA request, and i.e. writing please
Seek TLP packet.Which ensure that the integrity of data transmission when mass data receives or sends, it is to avoid
The loss of data.
Further, this transmission card also includes that sending relief area selects module, a described TLP packet
Send relief area, the 2nd TLP packet sends relief area and the output of the 3rd TLP packet transmission relief area
End is connected to described transmission relief area and selects module input, and described transmission relief area selects module with described
PCI-E interface IP kernel communicates to connect；
Described transmission relief area selects module to control to send out a described TLP packet according to priority criteria
Send relief area, the 2nd TLP packet to send relief area and the 3rd TLP packet sends the data in relief area
Bag is transferred to PCIE interface.
Priority criteria is criterion set in advance, selects according to the transmission of data and the priority level of reception
Read request TLP packet, write request TLP packet and run through TLP packet and be admitted to PCI-E interface
Sequencing.
Further, described transmitting line includes running through TLP processing data packets module, transmitting line buffering
District, encoder and transmission LVDS interface；
Described TLP data packet analysis module the first outfan runs through TLP processing data packets module described in connecting
Input, described in run through TLP processing data packets module outfan connect described transmitting line relief area input
End, described transmitting line relief area outfan connects described encoder input, and described encoder is by described
Send LVDS interface to be connected with described transmitting line；
The described TLP of running through processing data packets module is sent out described for the data write run through in TLP packet
In relief area, line sending road, then carried out encoding and inserting control character by described encoder, then by described transmission
LVDS interface sends to transmitting line after data are carried out serial to parallel conversion.
Run through TLP processing data packets module, transmitting line relief area, encoder and transmission LVDS interface
Ensure that the integrity in data transmission procedure and confidentiality.
Further, described reception circuit includes receiving LVDS interface, decoder and reception circuit relief area；
Described reception LVDS interface is connected with reception circuit and described decoder respectively, and described decoder exports
End connects described reception circuit relief area input, described reception circuit relief area outfan be connected to described in connect
Receive DMA control module input；
Described reception LVDS interface receives data from reception circuit, and it is carried out serial to parallel conversion and control
The detection of character processed, control character sends the data to described decoder and carries out data decoding after detecting, then
Decoded data are sent to described reception circuit relief area and sends out to described reception DMA control module
Line sending circuit-switched data receives mark, and described reception DMA control module is at the mark detecting that track data has received
After You Xiao, start and receive DMA process, transfer data in the relief area in host memory.
Receive LVDS interface, that decoder and reception circuit relief area ensure that in DRP data reception process is complete
Property and accuracy.
This transmission card has independent hardware and migrates control logic, controls, independently without OS and any " soft "
Completing the migration of data, system is only responsible for writing data to the relief area in this transmission card, by this transmission card root
It is automatically performed Data Migration according to hardware control logic, realizes automaticdata integrity school at the two ends of this transmission card
Test.Carry out data transmission based on this transmission card, because not carrying out based on network between transmission equipment and reception equipment
The data exchange of agreement or other modes and access, thus ensure that transmission equipment and reception from hardware view
Security isolation between equipment.
Based on above-mentioned PIC-E EBI transmission card, the invention allows for a kind of data transmission method.
Data transmission procedure use the first transmission card and the second transmission card, described first transmission card and second pass
Defeated card is described PCI-E EBI transmission card, described first transmission card and the second transmission card communication link
Connecing, this data transmission method comprises the following steps:
When S1, data send, the data of transmission are first written in the relief area in internal memory, so by transmission equipment
After by comprise data length, start data send mark control word write the first transmission card transmission control post
In storage；
S2, the first transmission card are after detecting that startup data transmission mark is effectively, it is judged that sending out of the first transmission card
Whether line sending road connects, and whether the transmitting line caching of the first transmission card can be used, if available, starts number
According to the process of transmission, otherwise wait for transmitting line and caching is available；
After S3, data transmission procedure start, starting DMA transfer, the transmission DMA of the first transmission card controls mould
The read request TLP packet of the data address comprising reading and data length is sent by block by PCI-E interface
To the TLP data packet analysis module of the first transmission card；
S4, the TLP data packet analysis module of the first transmission card judge that the TLP packet received is specially and read
Request TLP packet still runs through TLP packet, if read request TLP packet, then performs step
Rapid S5, if running through TLP packet, then performs step S6；
S5, the depositor Read-write Catrol module of the first transmission card are read according to the address in read request TLP packet
Go out the data in depositor, and be sent to first plus the packet header running through TLP data by PCI-E interface
The TLP data packet analysis module of transmission card, then performs step S4；
S6, the TLP data packet analysis module of the first transmission card will run through TLP packet and send to the first biography
The transmitting line of defeated card carries out data transmission；
Data are received by S7, described second transmission card, the reception line receiver number of described second transmission card
According to, and the data received are sent the reception DMA control module to the second transmission card；
S8, the reception DMA control module of the second transmission card send write request TLP data by PCI-E interface
Wrap to the TLP data packet analysis module of the second transmission card；
S9, the TLP data packet analysis module of the second transmission card judge received by TLP packet be whether
Write request TLP packet, if it is, perform step S10；
S10, the depositor Read-write Catrol module of the second transmission card read the address in write request TLP packet
And data, and write data in the depositor that address part is specified, then write by PCI-E interface
Receive device memory.
Data can be transmitted and receive by this data transmission method fast and accurately, it is ensured that data
Rapidity, integrity, accuracy and security transmissions.
Use this data transmission method that the network of transmission equipment and the equipment of reception is not directly connected to, block
The internetwork TCP/IP in both sides connects, and is allowed to carry out procotol communication, enters the data of transmission
Go way gate technical controlling, thoroughly prevent data backflow.
Further, in described step S3, before DMA transfer, send DMA control module according to number
Need to carry out the number of times of DMA transfer according to length computation；
In described step S7, before receiving DMA control module reception data, receive DMA control module
The number of times of DMA transfer is calculated according to data length.Which ensure that what data can be complete is transmitted or received,
Ensure that the integrity of data.
Further, when sending data, transmitting line need to encode and insert alignment, start data
Or the control character terminated；
During data receiver, receive circuit and data need to be controlled detection and the decoding of character.Which ensure that number
According to safety and accuracy.
The additional aspect of the present invention and advantage will part be given in the following description, and part will be retouched from following
Become obvious in stating, or recognized by the practice of the present invention.
Accompanying drawing explanation
Above-mentioned and/or the additional aspect of the present invention and advantage are from combining the accompanying drawings below description to embodiment
Will be apparent from easy to understand, wherein:
Fig. 1 is transmission card block diagram；
Fig. 2 is that data send DMA flow chart；
Fig. 3 is line side data transmission flow figure；
Fig. 4 is line side data receiver flow chart；
Fig. 5 is data receiver DMA flow process；
Fig. 6 is to receive TLP processing data packets flow chart；
Fig. 7 is that data transmit schematic diagram.
Detailed description of the invention
Embodiments of the invention are described below in detail, and the example of described embodiment is shown in the drawings, wherein certainly
Begin to same or similar label eventually represent same or similar element or there is the unit of same or like function
Part.The embodiment described below with reference to accompanying drawing is exemplary, is only used for explaining the present invention, and can not
It is interpreted as limitation of the present invention.
In describing the invention, unless otherwise prescribed and limit, it should be noted that term " is installed ",
" be connected ", " connection " should be interpreted broadly, for example, it may be mechanically connected or electrical connection, it is also possible to be
The connection of two element internals, can be to be joined directly together, it is also possible to be indirectly connected to by intermediary, for
For those of ordinary skill in the art, the concrete meaning of above-mentioned term can be understood as the case may be.
As it is shown in figure 1, the invention provides a kind of PCI-E EBI transmission card, including PCI-E interface
IP kernel, depositor, depositor Read-write Catrol module, TLP data packet analysis module, sending module and/or
Receiver module.Described sending module includes transmitting line and sends DMA control module, described receiver module bag
Including reception circuit and receive DMA control module, described transmitting line, receiving the quantity of circuit, to be non-negative whole
Number.
PCI-E interface IP kernel has been used for the physical layer of PCI-E interface, data link layer and transaction layer
The process of (Transaction Layer Protocol, TLP) three layer protocols.Depositor is used for storing number
According to transmission required for control and status information, including main frame receive and dispatch buffer zone address, send and receive control
Word, sends and receives status word etc..
PCI-E interface IP kernel and TLP data packet analysis module communicate to connect, TLP data packet analysis module the
One outfan connects transmitting line input, and transmitting line outfan is connected with transmitting line, TLP packet
Analyze module the second outfan and connect depositor Read-write Catrol module input, Read-write Catrol module and depositor
Being bi-directionally connected, depositor is bi-directionally connected with sending DMA control module.
Receive line input and receive connection, receiving line output connection and receive DMA control module
Input, DMA control module is bi-directionally connected with depositor, receives DMA control module outfan and is connected to
PCI-E interface IP kernel.
In order to ensure integrity and the accuracy that data transmit, read request TLP packet, run through TLP number
Can buffer into TLP packet according to bag and write request TLP packet and receive relief area, TLP packet receives slow
Rush district to communicate to connect with PCI-E interface IP kernel and TLP data packet analysis module respectively.
Meanwhile, this transmission card also includes sending relief area selection module, a TLP packet sends relief area,
2nd TLP packet sends relief area and the 3rd TLP packet sends relief area, and a TLP packet is sent out
Relief area is sent to communicate to connect with depositor Read-write Catrol module and PCI-E interface IP kernel respectively, the 2nd TLP
Packet sends relief area and communicates to connect with transmission DMA control module and PCI-E interface IP kernel respectively, the
Three TLP packets send relief areas respectively with receive DMA control module and PCI-E interface IP kernel communication link
Connect.
Oneth TLP packet send buffer cache correspondence depositor read request run through TLP packet,
2nd TLP packet sends buffer cache and sends the TLP packet of DMA request, i.e. read request TLP
Packet, the 3rd TLP packet sends buffer cache and receives the TLP packet of DMA request, and i.e. writing please
Seek TLP packet.Oneth TLP packet sends relief area, the 2nd TLP packet sends relief area and the
Three TLP packets send the outfan of relief area and are connected to send relief area selection module input, send
Relief area selects module to communicate to connect with PCI-E interface IP kernel.
Send relief area select module according to priority criteria control by the oneth TLP packet send relief area,
The packet that 2nd TLP packet sends in relief area and the 3rd TLP packet transmission relief area is transferred to
PCIE interface.
Main frame is to be realized by the Parasites Fauna that controls in read-write card the control of transmission card, read write command
It is all that the TLP packet by PCI-E interface is sent to transmission card.It addition, ask during sending DMA
Data be also that the TLP bag that runs through by PCI-E interface is transmitted.Transmission card only processes this three class
TLP packet, i.e. read request TLP packet, write request TLP packet, run through TLP packet,
Other bag does not deals with.
As shown in Figure 6, transmission card, after PCI-E interface receives TLP packet, is first analyzed packet header and is sentenced
Which kind of TLP packet disconnected is.For write request TLP packet, the address in bag and data are taken by transmission card
Go out, and write data in the depositor that address part is specified.For read request TLP packet, transmission
Card takes out the address in bag, reads the data of corresponding depositor accordingly, and plus running through the packet header of TLP,
It is written to a TLP packet send in relief area, PCI-E interface passes to main frame.For running through
TLP packet, the data in bag are written in the transmitting line relief area in line side by transmission card.
When data send, main frame first will need the data sent to be written in the relief area in internal memory, then will
Comprise data length, start in the control word write depositor that data send mark.Send DMA control module
Read request TLP packet is sent to described TLP data packet analysis module, TLP data by PCI-E interface
Packet analysis module judges whether the TLP packet received is read request TLP packet, if it is, post
Storage Read-write Catrol module according to the data in the address readout register in read request TLP packet, and to
It is then forwarded to TLP data packet analysis module, TLP by PCI-E interface plus the packet header running through TLP data
Data packet analysis module judge the TLP packet that received whether for running through TLP packet, if it is,
Then this is run through the transmission of TLP packet and carry out data transmission to transmitting line.
During data receiver, the data received are sent to receiving DMA control module by data reception lines, connect
Receive DMA control module by PCI-E interface transmission write request TLP packet to TLP data packet analysis module,
Whether the TLP packet received by the judgement of TLP data packet analysis module is write request TLP packet, as
Fruit is, then the address during depositor Read-write Catrol module reads write request TLP packet and data, and by number
According to being written in the depositor that address part is specified, then write host memory by PCI-E interface.
In concrete application, transmitting line can include running through TLP processing data packets module, transmitting line buffering
District, encoder and transmission LVDS interface.The connection of TLP data packet analysis module the first outfan runs through TLP
Processing data packets module input, runs through TLP processing data packets module outfan and connects transmitting line buffering
District's input, transmitting line relief area outfan connects encoder input, and encoder is by sending LVDS
Interface is connected with transmitting line.Run through the number that TLP processing data packets module will run through in TLP packet
According in write transmitting line relief area, then carried out encoding and inserting control character by encoder, then by sending
LVDS interface sends to transmitting line after data are carried out serial to parallel conversion.
Receive circuit to include receiving LVDS interface, decoder and reception circuit relief area.Receive LVDS interface
Being connected with reception circuit and decoder respectively, decoder output connects reception circuit relief area input, connects
Relief area, take-up road outfan is connected to receive DMA control module input.Receive LVDS interface from reception
Receiving data in circuit, and it is carried out the detection of serial to parallel conversion and control character, control character detects
After send the data to decoder and carry out data decoding, more decoded data are sent to receiving circuit buffering
In district and to receiving DMA control module transmitting line data accepted flag, receive DMA control module in detection
The mark received to track data effectively after, start and receive DMA process, transfer data to host memory
In relief area in.
A kind of data transmission method based on above-mentioned PIC-E transmission card, as it is shown in fig. 7, data transmission procedure
Middle use the first transmission card and the second transmission card, the first transmission card and the second transmission card are above-mentioned PCI-E
EBI transmission card, described first transmission card and the communication connection of the second transmission card, the method includes following step
Rapid:
When S1, data send, as shown in Fig. 2, Fig. 3 and Fig. 6, the data of transmission are first write by transmission equipment
Enter in the relief area in internal memory, then the control word comprising data length, startup data transmission indicates is write
Transmission to transmission card controls in depositor.
S2, the first transmission card are after detecting that startup data transmission mark is effectively, it is judged that sending out of the first transmission card
Whether line sending road connects, and whether the transmitting line caching of the first transmission card can be used, if available, starts number
According to the process of transmission, otherwise wait for transmitting line and caching is available, treat that connection and transmitting line caching are available
Time start data send.
After data transmission procedure starts, according to the facilities of the equipment of transmission, a data transfer may need
Repeatedly DMA just can complete, and therefore, first the transmission DMA control module of transmission card calculates according to data length
Need to carry out the number of times of DMA transfer, start DMA transfer the most again.
When S3, DMA transfer, the transmission DMA control module of the first transmission card will comprise the data address of reading
With the TLP data that the read request TLP packet of data length is sent to the first transmission card by PCI-E interface
Packet analysis module.
S4, the TLP data packet analysis module of the first transmission card judge that the TLP packet received is specially and read
Request TLP packet still runs through TLP packet, if read request TLP packet, then performs step
Rapid S5, if running through TLP packet, then performs step S6.
S5, the depositor Read-write Catrol module of the first transmission card are read according to the address in read request TLP packet
Go out the data in depositor, and be sent to first plus the packet header running through TLP data by PCI-E interface
The TLP data packet analysis module of transmission card, then performs step S4.
S6, the TLP data packet analysis module of the first transmission card will run through TLP packet and send to the first biography
The transmitting line of defeated card carries out data transmission.
When data are in time sending device transmission to the transmitting line of the first transmission card, the transmission of the first transmission card
Circuit run through TLP processing data packets module will run through in TLP packet data write first transmission
In the transmitting line relief area of card, treat that all of data are all from sending the device transmission transmission to the first transmission card
Line transmission is started after in circuit relief area.Using serial transmission mode on transmission line, electric interfaces is
LVDS.In order to make receiving terminal to be properly received, the data on circuit need to encode through 8B10B.Empty at circuit
Idle, on circuit, transmission carries out the control word of control word alignment in serial to parallel conversion for receiving terminal.Data are transmitted
During beginning, first send packet and start control character, then transmit data.After data end of transmission, send
Packet finishing control character, instruction data are transmitted.
Data are received by S7, the second transmission card, as Figure 4-Figure 6, first, and connecing of the second transmission card
Receive LVDS interface and carry out serial to parallel conversion to receiving data, it needs to be determined that the beginning boundary of word in conversion, this
The word alignment control word sent by detection transmitting terminal is realized.Without this control word being detected, control string
And changer slides one, so repeat until word alignment control word being detected.Due to when line idle,
Transmitting terminal persistently sends this control word, can monitor this control word continuously if received, showing connection
Normally, and the word of serial to parallel conversion aligns.
After word alignment, line receiver part continues to monitor unwraps beginning control word, as detected, shows subsequently
Word is valid data.Receiving terminal receives this data, and carries out 8B10B decoding, and the data after decoding are written to
Receive circuit relief area.During receiving data, need each reception data to be made whether into bag
The detection of finishing control word.As detected, then packet terminates, data finishing receiving from circuit, will
The length write of data receives and controls depositor, and flag set data received.
The transmission of one secondary data may need repeatedly DMA process, so needing first to calculate the number of times of DMA process.
In the case of reception equipment relief area can be used, the data of DMA transfer are encapsulated into write request by the second transmission card
TLP bag writes host memory by PCIE interface.
The reception DMA control module of the second transmission card after detecting that mark that track data has received is effectively,
Starting and receive DMA process, the data received are sent to the second transmission card by the circuit that receives of the second transmission card
Reception DMA control module.The transmission of one secondary data may need repeatedly DMA process, so needing first to count
Calculate the number of times of DMA process.
S8, the reception DMA control module of the second transmission card send write request TLP data by PCI-E interface
Wrap to the TLP data packet analysis module of the second transmission card.
S9, the TLP data packet analysis module of the second transmission card judge received by TLP packet be whether
Write request TLP packet, if it is, the depositor Read-write Catrol module of the second transmission card reads write request
Address in TLP packet and data, and write data in the depositor that address part is specified, then lead to
Cross PCI-E interface write to receive in device memory.
Here transmission equipment and the equipment of reception can be main frame, it is also possible to be server.
In the description of this specification, reference term " embodiment ", " some embodiments ", " example ",
It is concrete that the description of " concrete example " or " some examples " etc. means to combine this embodiment or example describes
Feature, structure, material or feature are contained at least one embodiment or the example of the present invention.In this theory
In bright book, the schematic representation of above-mentioned term is not necessarily referring to identical embodiment or example.And,
The specific features, structure, material or the feature that describe can be in any one or more embodiments or examples
In combine in an appropriate manner.
Although an embodiment of the present invention has been shown and described, those of ordinary skill in the art can manage
Solve: these embodiments can be carried out in the case of without departing from the principle of the present invention and objective multiple change,
Amendment, replacement and modification, the scope of the present invention is limited by claim and equivalent thereof.
Claims (9)
1. a PCI-E EBI transmission card, including PCI-E interface IP kernel and depositor, its feature
It is, also includes depositor Read-write Catrol module, TLP data packet analysis module, sending module and/or connect
Receive module；
Described sending module includes transmitting line and sends DMA control module, and described receiver module includes receiving
Circuit and reception DMA control module, described transmitting line, the quantity of reception circuit are nonnegative integer；
Described PCI-E interface IP kernel communicates to connect with described TLP data packet analysis module, described TLP number
According to packet analysis module the first outfan connect described transmitting line input, described transmitting line outfan with send out
Sending connection, described TLP data packet analysis module the second outfan connects described depositor Read-write Catrol mould
Block input, described Read-write Catrol module is bi-directionally connected with described depositor, described depositor and described transmission
DMA control module is bi-directionally connected；
Described reception line input connects described reception with reception connection, described reception line output
DMA control module input, described DMA control module is bi-directionally connected with described depositor, described reception DMA
Control module outfan is connected to described PCI-E interface IP kernel；
When data send, main frame first will need the data sent to be written in the relief area in internal memory, then will
Comprise data length, start in the control word described depositor of write that data send mark；Described transmission DMA
Control module by PCI-E interface send read request TLP packet to described TLP data packet analysis module,
Described TLP data packet analysis module judges whether the TLP packet received is read request TLP packet,
Deposit if it is, described depositor Read-write Catrol module reads according to the address in read request TLP packet
Data in device, and to being then forwarded to described by PCI-E interface plus the packet header running through TLP data
TLP data packet analysis module, whether the TLP packet that the judgement of described TLP data packet analysis module is received
For running through TLP packet, send to described transmitting line if it is, this is run through TLP packet
Carry out data transmission；
During data receiver, the data received are sent to described reception DMA control by described data reception lines
Module, described reception DMA control module sends write request TLP packet to described by PCI-E interface
TLP data packet analysis module, the TLP packet received by the judgement of described TLP data packet analysis module is
It is no for write request TLP packet, if it is, described depositor Read-write Catrol module reads write request TLP
Address in packet and data, and write data in the depositor that address part is specified, then pass through
PCI-E interface write host memory.
PCI-E EBI transmission card the most according to claim 1, it is characterised in that also include
TLP packet receive relief area, described TLP packet receive relief area respectively with described PCI-E interface IP
Core and the communication connection of described TLP data packet analysis module.
PCI-E EBI transmission card the most according to claim 1, it is characterised in that also include
Oneth TLP packet sends relief area, the 2nd TLP packet sends relief area and the 3rd TLP packet is sent out
Send relief area, a described TLP packet send relief area respectively with described depositor Read-write Catrol module and
PCI-E interface IP kernel communicate to connect, described 2nd TLP packet send relief area respectively with described transmission
DMA control module and the communication connection of PCI-E interface IP kernel, described 3rd TLP packet sends relief area
Communicate to connect with described reception DMA control module and PCI-E interface IP kernel respectively.
PCI-E EBI transmission card the most according to claim 3, it is characterised in that also include
Sending relief area and select module, a described TLP packet sends relief area, the 2nd TLP packet sends
Relief area and the 3rd TLP packet send the outfan of relief area and are connected to the selection of described transmission relief area
Module input, described transmission relief area selects module to communicate to connect with described PCI-E interface IP kernel；
Described transmission relief area selects module to control to send out a described TLP packet according to priority criteria
Send relief area, the 2nd TLP packet to send relief area and the 3rd TLP packet sends the data in relief area
Bag is transferred to PCIE interface.
PCI-E EBI transmission card the most according to claim 1, it is characterised in that described
Line sending road includes: described transmitting line include running through TLP processing data packets module, transmitting line relief area,
Encoder and transmission LVDS interface；
Described TLP data packet analysis module the first outfan runs through TLP processing data packets module described in connecting
Input, described in run through TLP processing data packets module outfan connect described transmitting line relief area input
End, described transmitting line relief area outfan connects described encoder input, and described encoder is by described
Send LVDS interface to be connected with described transmitting line；
The described TLP of running through processing data packets module is sent out described for the data write run through in TLP packet
In relief area, line sending road, then carried out encoding and inserting control character by described encoder, then by described transmission
LVDS interface sends to transmitting line after data are carried out serial to parallel conversion.
PCI-E EBI transmission card the most according to claim 1, it is characterised in that described in connect
Take-up road includes receiving LVDS interface, decoder and reception circuit relief area；
Described reception LVDS interface is connected with reception circuit and described decoder respectively, and described decoder exports
End connects described reception circuit relief area input, described reception circuit relief area outfan be connected to described in connect
Receive DMA control module input；
Described reception LVDS interface receives data from reception circuit, and it is carried out serial to parallel conversion and control
The detection of character processed, control character sends the data to described decoder and carries out data decoding after detecting, then
Decoded data are sent to described reception circuit relief area and sends out to described reception DMA control module
Line sending circuit-switched data receives mark, and described reception DMA control module is at the mark detecting that track data has received
After You Xiao, start and receive DMA process, transfer data in the relief area in host memory.
7. a data transmission method based on the PIC-E EBI transmission card described in claim 1,
It is characterized in that, data transmission procedure uses the first transmission card and the second transmission card, described first transmission card
It is the PCI-E EBI transmission card described in claim 1, described first transmission with the second transmission card
Card and the communication connection of the second transmission card, comprise the following steps:
When S1, data send, the data of transmission are first written in the relief area in internal memory, so by transmission equipment
After by comprise data length, start data send mark control word write the first transmission card transmission control post
In storage；
S2, the first transmission card are after detecting that startup data transmission mark is effectively, it is judged that sending out of the first transmission card
Whether line sending road connects, and whether the transmitting line caching of the first transmission card can be used, if available, starts number
According to the process of transmission, otherwise wait for transmitting line and caching is available；
After S3, data transmission procedure start, starting DMA transfer, the transmission DMA of the first transmission card controls mould
The read request TLP packet of the data address comprising reading and data length is sent by block by PCI-E interface
To the TLP data packet analysis module of the first transmission card；
S4, the TLP data packet analysis module of the first transmission card judge that the TLP packet received is specially and read
Request TLP packet still runs through TLP packet, if read request TLP packet, then performs step
Rapid S5, if running through TLP packet, then performs step S6；
S5, the depositor Read-write Catrol module of the first transmission card are read according to the address in read request TLP packet
Go out the data in depositor, and be sent to first plus the packet header running through TLP data by PCI-E interface
The TLP data packet analysis module of transmission card, then performs step S4；
S6, the TLP data packet analysis module of the first transmission card will run through TLP packet and send to the first biography
The transmitting line of defeated card carries out data transmission；
Data are received by S7, described second transmission card, the reception line receiver number of described second transmission card
According to, and the data received are sent the reception DMA control module to the second transmission card；
S8, the reception DMA control module of the second transmission card send write request TLP data by PCI-E interface
Wrap to the TLP data packet analysis module of the second transmission card；
S9, the TLP data packet analysis module of the second transmission card judge received by TLP packet be whether
Write request TLP packet, if it is, perform step S10；
S10, the depositor Read-write Catrol module of the second transmission card read the address in write request TLP packet
And data, and write data in the depositor that address part is specified, then write by PCI-E interface
Receive device memory.
Data transmission method based on PIC-E EBI transmission card the most according to claim 7,
It is characterized in that, in described step S3, before DMA transfer, send DMA control module according to data
Length computation needs to carry out the number of times of DMA transfer；
In described step S7, before receiving DMA control module reception data, receive DMA control module
The number of times of DMA transfer is calculated according to data length.
Data transmission method based on PIC-E EBI transmission card the most according to claim 7,
It is characterized in that, send data time, transmitting line data need to be encoded and insert alignment, beginning or
The control character terminated；
During data receiver, receive circuit and data need to be controlled detection and the decoding of character.
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| CN201610278267.6A CN106027349B (en) | 2016-04-29 | 2016-04-29 | A kind of PCI-E bus interface transmission card and the data transmission method based on the transmission card |
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