CN106026143B - Three-phase power balance device and control system based on FPGA control - Google Patents

Three-phase power balance device and control system based on FPGA control Download PDF

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Publication number
CN106026143B
CN106026143B CN201610628610.5A CN201610628610A CN106026143B CN 106026143 B CN106026143 B CN 106026143B CN 201610628610 A CN201610628610 A CN 201610628610A CN 106026143 B CN106026143 B CN 106026143B
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chip
abc
connects
output
fpga
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CN106026143A (en
Inventor
王雷
宋元锋
荆延飞
王金
巩帅奇
牟忠
李军
李婷婷
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Shandong Cordit Power Technology Co.,Ltd.
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SHANDONG JINHUA ELECTRIC POWER CO Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/26—Arrangements for eliminating or reducing asymmetry in polyphase networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30—Reactive power compensation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/50—Arrangements for eliminating or reducing asymmetry in polyphase networks

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

The present invention relates to a kind of three-phase power balance devices and control system based on FPGA control, including sequentially connected system power supply Uabc, output reactance device Labc, three phase full bridge inversion unit, the midpoint of the connection of three phase full bridge inversion unit concatenated capacitor C1, C2, capacitor C1, C2 connect zero curve reactor LN, zero curve reactor LNConnect zero curve N；System power supply UabcWith output reactance device LabcBetween connect voltage transformer, output reactance device LabcIt is worn between three phase full bridge inversion unit and connects output current transformer, capacitor C1 connects direct current with the both ends capacitor C2 using mutual inductor, voltage transformer, output current transformer and direct current connect conditioning circuit by conditioning circuit interface using mutual inductor, conditioning circuit connects FPGA by AD sampling A/D chip, and FPGA is separately connected ARM and DSP.The present invention can effectively eliminate three-phase load unbalance in power distribution network and the excessive power quality problem of neutral line current, improve output compensation precision, have preferable compensation effect and higher system reliability.

Description

Three-phase power balance device and control system based on FPGA control
Technical field
The present invention relates to a kind of three-phase power balance devices, and in particular to a kind of three-phase power balance based on FPGA control Device and control system.
Background technique
As power grid is increasingly complicated, the load of non-linear and impact increases, reactive power, harmonic wave, three-phase are negative in power distribution network The problems such as lotus is uneven is increasingly severe.Three-phase balance equipment currently on the market, especially high power three-phase are active flat The equipment that weighs still is the small part active electric power more demanding to mounting condition of advocating peace with Passive Reactive Power Compensation device phase splitting compensation Filter and static reactive generator, and it is mainly used in low pressure range.But Passive Reactive Power Compensation device itself has very big lack Fall into, cannot the uneven of being optimal require, and compared with reactive power compensator, three-phase load unbalance self-checking device With active transfer, dynamic passive compensation, with system not advantages such as resonance.With the progress and production scale of power electronic technique Expansion, dynamic reactive occurs and the cost of three-phase active balance device is gradually reduced, huge technical advantage, powerful function Energy, higher adaptability, simpler mounting means, will be finally replaced reactive power compensator and occupy the market mainstream.
Three-phase power balance device is the Hi-Tech equipment to grow up with modern power electronics technology, is that one kind is used for Dynamic passive compensation, the novel electric power electric device for filtering out harmonic wave, balanced three-phase load, the device have it is small in size, high-efficient, The characteristics of good reliability, can be widely used in reactive power is uneven, quality of voltage is low, in the serious power distribution network of line loss, By dynamic compensating reactive power, balanced three-phase load and the quality for filtering out low-order harmonic electric current improvement distribution network electric energy, transformation is improved The utilization rate of device reduces line loss.
Summary of the invention
According to the above-mentioned deficiencies in the prior art, the problem to be solved in the present invention is: providing one kind, can to eliminate three-phase negative The unbalanced power quality problem of lotus, output compensation precision is high, and compensation effect is good, and system reliability is high based on FPGA control Three-phase power balance device and control system.
The technical solution adopted by the present invention to solve the technical problems is:
The three-phase power balance device based on FPGA control, including system power supply Uabc, system power supply UabcThree Phase output terminal connects output reactance device Labc, output reactance device LabcConnect three phase full bridge inversion unit, three phase full bridge inversion unit DC side connect concatenated capacitor C1 and capacitor C2, capacitor C1 connects zero curve reactor L with the midpoint of capacitor C2N, zero curve electricity Anti- device LNConnect system power supply UabcZero curve N；
The system power supply UabcWith output reactance device LabcConnection common end connect voltage transformer, voltage transformer Output end connection control system conditioning circuit interface；
The output reactance device LabcIt is worn with the connection common end of three phase full bridge inversion unit and connects output current transformer, The conditioning circuit interface of the output end connection control system of output current transformer；
The capacitor C1 of the DC side concatenation of the three phase full bridge inversion unit connects direct current with the both ends capacitor C2 using mutual Sensor, direct current connect the conditioning circuit interface of control system using the output end of mutual inductor；
The control system connects three phase full bridge inversion unit by driving circuit, and driving circuit connects control system Pwm pulse output signal port.
Further preferably the conditioning circuit interface of control system connects the output end of load current mutual inductor, and load is electric Current transformer, which is worn, to be connect in load-side.
The control system of the three-phase power balance device based on FPGA control, including conditioning circuit, AD sample core Piece, fpga chip, dsp chip and ARM chip, the conditioning circuit connect AD sampling A/D chip, AD by sampled signal bus Sampling A/D chip connects fpga chip with control bus by data/address bus, and fpga chip passes through data/address bus and control bus respectively Dsp chip and ARM chip are connected, fpga chip connects I/O port II by I/O signal line, and dsp chip connects IO by I/O signal line Mouth III, dsp chip connect pwm pulse output signal port by PWM drive signal line, and ARM chip I/O signal line connects I/O port I, ARM chip pass through the port communication signal line connecting communication interface 485CAN.
The present invention is from the angle for improving distribution three-phase load unbalance, on the basis of conventional single DSP control system On, the logic control processing links of FPGA are additionally arranged, and pass through FPGA to system using the advantage of the parallel control structure of FPGA Sample information is handled, and forms that sample rate is fast, control three-phase power balance device with high accuracy.
Further preferred, AD sampling A/D chip includes AD conversion chip AD01, AD02 and AD03, AD01, AD02 and AD03 Fpga chip is connected with control bus by data/address bus respectively.
The present invention has the beneficial effects that
Three-phase power balance device and control system of the present invention based on FPGA control overcomes traditional passive device Part administers the defect of three-phase load unbalance, solves the frequent throwing of mechanical switch switch phase modulation ruling by law reason three-phase load unbalance Problem is cut, structure is simple, and design rationally, it is excessive can to effectively eliminate three-phase load unbalance and neutral line current in power distribution network Power quality problem improves output compensation precision, has preferable compensation effect and higher system reliability.
Detailed description of the invention
Fig. 1 is hardware structural diagram of the invention；
Fig. 2 is control system architecture schematic diagram of the invention；
Wherein, 1, three phase full bridge inversion unit；2, voltage transformer；3, load current mutual inductor；4, Current Mutual Inductance is exported Device；5, driving circuit；6, direct current uses mutual inductor；7, control system；8, conditioning circuit；9, pwm pulse output signal port； 10, AD sampling A/D chip；11, ARM chip；12, fpga chip；13, dsp chip；14, the port communication interface 485CAN；15, I/O port Ⅰ；16, I/O port II；17, I/O port III；Uabc, system power supply；Labc, output reactance device；LN, zero curve reactor；C1, C2, capacitor.
Specific embodiment
The embodiment of the present invention is described further with reference to the accompanying drawing:
As shown in Figure 1, the three-phase power balance device of the present invention based on FPGA control, including system power supply Uabc、 System power supply UabcThree-phase output end connect output reactance device Labc, output reactance device LabcThree phase full bridge inversion unit 1 is connected, The DC side of three phase full bridge inversion unit 1 connects concatenated capacitor C1 and capacitor C2, and capacitor C1 connects zero with the midpoint of capacitor C2 Line reactor LN, zero curve reactor LN connection system power supply UabcZero curve N；
The system power supply UabcWith output reactance device LabcConnection common end connect voltage transformer 2, mutual induction of voltage The conditioning circuit interface (system voltage sample port) of the output end connection control system 7 of device 2；
The output reactance device LabcIt is worn with the connection common end of three phase full bridge inversion unit 1 and connects output current transformer 4, the conditioning circuit interface (output current sample port) of the output end connection control system 7 of output current transformer 4；
The capacitor C1 of the DC side concatenation of the three phase full bridge inversion unit 1 connects direct current with the both ends capacitor C2 using mutual Sensor 6, direct current connect the conditioning circuit interface (DC voltage sample port) of control system 7 using the output end of mutual inductor 6；
The control system 7 connects three phase full bridge inversion unit 1, the connection control of driving circuit 5 system by driving circuit 5 The pwm pulse output signal port 9 of system 7.
Conditioning circuit interface (load current sample port) the connection load current mutual inductor 3 of the control system 7 Output end, load current mutual inductor 3, which is worn, to be connect in load-side.
As shown in Fig. 2, the control system of the three-phase power balance device of the present invention based on FPGA control, including adjust Manage circuit 8, AD sampling A/D chip 10, fpga chip 12, dsp chip 13 and ARM chip 11, the voltage transformer 2, output electricity Current transformer 4, direct current connect conditioning circuit by conditioning circuit interface using the output end of mutual inductor 6, load current mutual inductor 3 8, conditioning circuit 8 connects AD sampling A/D chip 10 by sampled signal bus, and AD sampling A/D chip 10 is total by data/address bus and control Line connects fpga chip 12, and fpga chip 12 connects dsp chip 13 and ARM chip with control bus by data/address bus respectively 11, fpga chip 12 connects I/O port II 16 by I/O signal line, and dsp chip 13 connects I/O port III 17, DSP core by I/O signal line Piece 13 connects pwm pulse output signal port 9 by PWM drive signal line, and ARM chip 11IO signal wire connects I/O port I 15, ARM chip 11 passes through the port communication signal line connecting communication interface 485CAN 14.
The AD sampling A/D chip 10 includes AD conversion chip AD01, AD02 and AD03, and AD01, AD02 and AD03 lead to respectively It crosses data/address bus and connects fpga chip 12 with control bus.
The working principle of the invention and use process:
In use, using mutual inductor 6, load current mutual inductor by voltage transformer 2, output current transformer 4, direct current 3 difference acquisition system voltages, output electric current, DC voltage and load current, and the collected sampled signal of institute is connected to control The conditioning circuit interface of system 7 processed, is improved by conditioning circuit 8, and by AD sampling A/D chip 10 carry out signal conversion after It is sent to fpga chip 12 by data/address bus and control bus, logical process and control are carried out by fpga chip 12, realized The quick accurate sampling of system charge, and this makes it possible to obtain dsp chips 13 more accurately to calculate and control output.
The present invention is not limited in above-mentioned specific embodiment, and those of ordinary skill in the art are in essential scope of the invention The variations, modifications, additions or substitutions inside made, also should belong to protection scope of the present invention.

Claims (3)

1. a kind of three-phase power balance device based on FPGA control, it is characterised in that: including system power supply Uabc, system power supply UabcThree-phase output end connect output reactance device Labc, output reactance device LabcIt connects three phase full bridge inversion unit (1), three-phase is complete The DC side of bridge inversion unit (1) connects concatenated capacitor C1 and capacitor C2, and capacitor C1 connects zero curve electricity with the midpoint of capacitor C2 Anti- device LN, zero curve reactor LNConnect system power supply UabcZero curve N；
The system power supply UabcWith output reactance device LabcConnection common end connect voltage transformer (2), voltage transformer (2) the conditioning circuit interface of output end connection control system (7)；
The output reactance device LabcIt is worn with the connection common end of three phase full bridge inversion unit (1) and connects output current transformer (4), the conditioning circuit interface of output end connection control system (7) of output current transformer (4)；
The capacitor C1 of the DC side concatenation of the three phase full bridge inversion unit (1) connects direct current with the both ends capacitor C2 using mutual inductance Device (6), direct current connect the conditioning circuit interface of control system (7) using the output end of mutual inductor (6)；
The control system (7) passes through driving circuit (5) connection three phase full bridge inversion unit (1), driving circuit (5) connection control The pwm pulse output signal port (9) of system (7) processed；
The control system (7) includes conditioning circuit (8), AD sampling A/D chip (10), fpga chip (12), dsp chip (13) With ARM chip (11), the conditioning circuit (8) passes through sampled signal bus connection AD sampling A/D chip (10), AD sampling A/D chip (10) it is connected with control bus fpga chip (12) by data/address bus, fpga chip (12) passes through data/address bus and control respectively Bus connects dsp chip (13) and ARM chip (11), and fpga chip (12) connects I/O port II (16) by I/O signal line, DSP core Piece (13) connects I/O port III (17) by I/O signal line, and dsp chip (13) connects pwm pulse output by PWM drive signal line Signal port (9), ARM chip (11) I/O signal line connect I/O port I (15), and ARM chip (11) is logical by the connection of communication signal line The port communication interface 485CAN (14).
2. the three-phase power balance device according to claim 1 based on FPGA control, it is characterised in that: the control The output end of conditioning circuit interface connection load current mutual inductor (3) of system (7), load current mutual inductor (3), which is worn, to be connect negative Carry side.
3. the control system of the three-phase power balance device according to claim 1 based on FPGA control, it is characterised in that: The AD sampling A/D chip (10) includes AD conversion chip AD01, AD02 and AD03, and AD01, AD02 and AD03 pass through data respectively Bus connects fpga chip (12) with control bus.
CN201610628610.5A 2016-08-01 2016-08-01 Three-phase power balance device and control system based on FPGA control Active CN106026143B (en)

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CN106936137B (en) * 2017-05-17 2019-08-27 山东科迪特电力科技有限公司 Comprehensive electric energy quality controlling device and method based on loop voltage
CN107727949B (en) * 2017-09-08 2020-03-27 山东科迪特电力科技有限公司 Sampling protection control time sequence system and method based on DSP-FPGA
CN107797482A (en) * 2017-09-08 2018-03-13 山东锦华电力设备有限公司 Controlling of sampling sequential system and method based on ARM FPGA
CN108471126A (en) * 2018-04-20 2018-08-31 国家电网公司 three-phase load unbalance automatic adjustment system
CN109301826A (en) * 2018-09-28 2019-02-01 哈尔滨中创电气技术有限公司 A method of based on ARM or dsp chip and FPGA cooperative achievement PR control algolithm
CN109510219A (en) * 2018-11-15 2019-03-22 湖南长高思瑞自动化有限公司 A kind of three-phase automatic balancing arrangement with reactive compensation

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Effective date of registration: 20211207

Address after: 256400 No. 1196 gengjiao Road, Tangshan town, Huantai County, Zibo City, Shandong Province

Patentee after: Shandong Cordit Power Technology Co.,Ltd.

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