CN105991033A - Power converter without electrolytic capacitor at input side - Google Patents

Abstract

The invention is a power converter, including a bridge rectifier, a film capacitor and a direct current to direct current (DC/DC) converter. A bridge rectifier rectifies the AC mains input voltage to produce a full-wave rectified voltage. The film capacitor filters the full-wave rectified voltage to produce a first pulsating DC voltage. The control circuit of the DC/DC converter attenuates the first pulsating DC voltage to generate a second pulsating DC voltage, detects the peak value and trough value of the second pulsating DC voltage, and generates a value based on -(Vx-VH) +PH overcurrent protection (OCP) compensation value, where Vx is the second pulsating DC voltage, VH and PH are the valley value and peak value of the second pulsating DC voltage respectively. The control circuit controls the OCP and constant power output limits of the DC/DC converter based on the compensated OCP setting value generated by adding the OCP setting value and the OCP compensation value. The beneficial effect of the present invention is that it can realize OCP and constant power output limitation.

Description

Power converters without electrolytic capacitors on the input side

technical field

The invention relates to a power converter, especially a power converter without an electrolytic capacitor on the input side, which is suitable for small-sized liquid crystal displays.

Background technique

Please refer to FIG. 1 . FIG. 1 is a circuit block diagram of a conventional power converter for a small-sized liquid crystal display. The conventional power converter 1 includes an electromagnetic interference (EMI) filter 11 , a bridge rectifier 12 , an electrolytic capacitor 13 and a flyback converter 14 . The AC power supply first passes through the EMI filter 11 to filter out the conductive EMI noise, and its input voltage is then rectified by the bridge rectifier 12 into a full-wave rectified voltage, and then filtered by the electrolytic capacitor 13 and stored to form a stable DC voltage Vdc. This is because the capacitance of the electrolytic capacitor 13 is relatively large, which can store more energy and has a better energy storage effect, so that the ripple across the voltage Vdc across the two ends of the electrolytic capacitor 13 is extremely small and can be regarded as a stable DC voltage source. The DC voltage Vdc is then converted into rated output voltages Vo1 and Vo2 by the flyback converter 14 . The output voltage Vo1 is, for example, 12V or 16V, which can supply power to the light-emitting diode (LED) backlight driving circuit and the display panel driving circuit of the LCD, and the output voltage Vo2, such as 5V, can supply power to the main board of the LCD.

The flyback converter 14 includes a conversion circuit and a control circuit thereof, wherein the conversion circuit includes a transformer T1, a power transistor Q1, diodes D1 and D2, and capacitors C1 and C2, and the control circuit includes a pulse-width modulation (pulse-width modulation, PWM) controller U1, resistors R1 and R2, diode D3, capacitors C3 and C4 and output feedback circuit FB1. In order to protect and limit the output power of the power converter 1 (that is, the output power of the flyback converter 14), an overcurrent detection function will be added to the control circuit of the flyback converter 14. In this example, the The PWM controller U1 with overcurrent protection (overcurrent protection, OCP) function is, for example, an integrated circuit of model EM8672, which has seven pins CT, COMP, CS, GND, OUT, VCC, and HV, and details of each are omitted here. Foot function. The PWM controller U1 has a built-in OCP comparator CMP1 to realize the OCP function. It captures the voltage Vr1 across the two ends of the resistor R1 connected in series under the power transistor Q1 through the pin CS to compare with the fixed OCP set value Vset. If If the captured voltage Vr1 is greater than the OCP set value Vset, it means that the output power of the flyback converter 14 is greater than the rated value, and the control circuit needs to protect the conversion circuit. For example, the control logic circuit CTRL1 of the PWM controller U1 will limit the output power from The duty cycle of the PWM control signal output from the pin OUT to the power transistor Q1 or directly turn off the power transistor Q1 to achieve OCP and constant power output limitation. In the case of different rated output power, it is only necessary to modify the resistance value of the resistor R1 to change the limit of the rated output power.

The existing power converter 1 uses electrolytic capacitor 13 on the input side to filter and store the full-wave rectified voltage obtained by rectifying the front-end bridge rectifier 12 into a stable DC voltage Vdc. The voltage Vdc is the peak value of the power supply input voltage. Taking a 220Vrms commercial power supply as an example, the voltage Vdc across the two ends of the electrolytic capacitor 13 is about 311V. Such a high voltage will greatly increase the electrostatic energy accumulated on the electrodes of the electrolytic capacitor 13, and the electrostatic energy accumulated in the electrolytic capacitor 13 can be directly dissipated by flashover between electrodes under certain conditions (such as an abnormal increase in the input voltage of the power supply). The spark discharge further causes the electrolytic solution and plain paper combustibles in the electrolytic capacitor 13 to burn.

Contents of the invention

The purpose of the present invention is to propose a power converter, which does not use electrolytic capacitors on the input side, which can save costs and avoid possible burning problems of electrolytic capacitors, and can realize OCP and constant power output limitation.

In order to achieve the above object and other objects, the present invention proposes a power converter, which includes a bridge rectifier, a film capacitor, and a direct-current to direct-current (DC/DC) converter, wherein the DC/DC The converter includes control circuitry. A bridge rectifier receives an AC mains input voltage and rectifies the mains input voltage to produce a full-wave rectified voltage. The film capacitor receives the full-wave rectified voltage and filters the full-wave rectified voltage to generate the first pulsating DC voltage. The control circuit receives the first pulsating DC voltage, attenuates the first pulsating DC voltage to generate a second pulsating DC voltage, detects the peak value and valley value of the second pulsating DC voltage, and according to the second pulsating DC voltage, peak value and The valley value is used to generate the OCP compensation value, and the OCP compensation value is -(Vx-VH)+PH, wherein, Vx is the second pulsating DC voltage, VH is the valley value, and PH is the peak value. The control circuit performs OCP and constant power output limitation on the DC/DC converter according to the compensated OCP setting value generated by adding the OCP compensation value to the OCP setting value.

In an embodiment of the present invention, the control circuit includes an attenuator, a peak-to-valley hold circuit, a subtractor, an inverter and an adder. The attenuator attenuates the first pulsating DC voltage to generate the second pulsating DC voltage. The peak-valley hold circuit detects the peak value and valley value of the second pulsating DC voltage. The subtractor subtracts the valley value from the second pulsating DC voltage to generate the first voltage. The inverter inverts the first voltage to generate a second voltage. The adder adds the peak value and the OCP setting value to the second voltage to generate a compensated OCP setting value.

In another embodiment of the present invention, the control circuit includes an attenuator, a peak-to-valley hold circuit, a subtractor, an inverter and an adder. The attenuator attenuates the first pulsating DC voltage to generate the second pulsating DC voltage. The peak-valley hold circuit detects the peak value and valley value of the second pulsating DC voltage. The subtractor subtracts the peak value of the second pulsating DC voltage to generate the first voltage. The inverter inverts the first voltage to generate a second voltage. The adder adds the valley value and the OCP setting value to the second voltage to generate a compensated OCP setting value.

In another embodiment of the present invention, the control circuit includes an attenuator, a peak-to-valley hold circuit, an inverter and an adder. The attenuator attenuates the first pulsating DC voltage to generate the second pulsating DC voltage. The peak-valley hold circuit detects the peak value and valley value of the second pulsating DC voltage. The inverter inverts the second pulsating DC voltage to generate a voltage. The adder adds the peak value, valley value and OCP setting value to the output voltage of the inverter to generate a compensated OCP setting value.

In an embodiment of the present invention, the power converter further includes an EMI filter, and the bridge rectifier receives the power input voltage through the EMI filter.

In an embodiment of the present invention, the power converter further includes an inductor, and the inductor and the film capacitor constitute an LC low-pass filter coupled between the bridge rectifier and the DC/DC converter.

In another embodiment of the present invention, the power converter further includes an inductor and another film capacitor, the inductor, the film capacitor and the other film capacitor form a circuit coupled to the bridge rectifier and the DC/DC π-type low-pass filter between converters.

In an embodiment of the invention, the DC/DC converter includes a flyback converter.

The power converter of the present invention uses film capacitors to replace the existing commonly used electrolytic capacitors on the input side. Because film capacitors do not contain electrolyte and plain paper combustibles, they will not have the problem of burning like electrolytic capacitors, and film capacitors The cost is also lower than that of electrolytic capacitors. In addition, the control circuit of the power converter of the present invention also captures the voltage across the two ends of the film capacitor (i.e. the first pulsating DC voltage) and performs attenuation and inversion processing to match the OCP set value Added together to generate a compensated OCP set value, the compensated OCP set value is then compared with the voltage corresponding to the primary side current of the transformer in the DC/DC converter captured by the control circuit to perform OCP and achieve constant power output In other words, the constant power output limit can still be achieved even when the first pulsating DC voltage has different ripple sizes due to different loads.

In order to make the above objects, features and advantages of the present invention more comprehensible, the following will be described in detail with examples and attached drawings. It should be noted that the components in the accompanying drawings are only schematic, and are not drawn according to the actual scale of the components.

Description of drawings

FIG. 1 is a circuit block diagram of a conventional power converter for a small-sized liquid crystal display.

FIG. 2 is a circuit block diagram of a power converter for a small-sized liquid crystal display according to an embodiment of the invention.

FIG. 3 is a waveform diagram of voltage across both ends of the film capacitor shown in FIG. 2 under light and heavy loads.

FIG. 4 is a waveform diagram of the voltages of each node of the OCP compensation circuit shown in FIG. 2 .

FIG. 5 is a circuit block diagram of another embodiment of the OCP compensation circuit shown in FIG. 2 .

FIG. 6 is a circuit block diagram of another embodiment of the OCP compensation circuit shown in FIG. 2 .

FIG. 7 is a circuit diagram of another embodiment of the film capacitor shown in FIG. 2 .

FIG. 8 is a circuit diagram of another embodiment of the film capacitor shown in FIG. 2 .

Implementation

Please refer to FIG. 2 . FIG. 2 is a circuit block diagram of a power converter for a small-sized liquid crystal display according to an embodiment of the present invention. The power converter 2 of the present invention includes an EMI filter 11 , a bridge rectifier 12 , a film capacitor 23 and a DC/DC converter 24 , wherein the film capacitor is also called a plastic film capacitor. The power supply first passes through the EMI filter 11 to filter out the conductive EMI noise, and its input voltage is then rectified by the bridge rectifier 12 into a full-wave rectified voltage, and then filtered and stored by the film capacitor 23 to form a first pulsating DC voltage Va. This is because the capacitance value of the film capacitor 23 is relatively small, it cannot store too much energy and the energy storage effect is poor, so that the waveform of the voltage Va across the two ends of the film capacitor 23 is a pulsating DC waveform as shown in Figure 3 and its ripple The magnitude will vary with the weight of the load, so the voltage Va across the two ends of the film capacitor 23 is also called the first pulsating DC voltage.

Please refer to Fig. 3, when the load is light, the energy stored on the film capacitor 23 by the power input is greater than the demand of the output load, and at this time the film capacitor 23 starts to store energy, so that its two ends are across the voltage (ie the first pulsating DC voltage) The waveform of Va is a pulsating DC waveform with smaller ripples and shallower troughs. When the load is heavy, the film capacitor 23 has a poor energy storage effect, so that the waveform of the voltage across its two ends (i.e. the first pulsating DC voltage) Va is a pulsating DC waveform with larger ripples, which has a deeper and more obvious In the trough, especially when the load is heavier, the waveform of the voltage Va across the two ends of the film capacitor 23 will be closer to the waveform of the full-wave rectified voltage. Therefore, although the ripple size of the first pulsating DC voltage Va varies with the weight of the load, the peak value of the first pulsating DC voltage Va is fixed (that is, the peak value of the power supply input voltage), and the change is its trough value.

Please continue to refer to Fig. 2, the present invention adopts film capacitor 23 to replace electrolytic capacitor 13 as shown in Fig. 1, because film capacitor 23 does not contain electrolyte and plain paper combustibles, so it will not be likely to burn like electrolytic capacitor 13 question. The first pulsating DC voltage Va is then converted into rated output voltages Vo1 and Vo2 by a DC/DC converter 24 . The output voltage Vo1 is, for example, 12V or 16V, which can supply power to the LED backlight driving circuit and the display panel driving circuit of the liquid crystal display, and the output voltage Vo2, such as 5V, can supply power to the main board of the liquid crystal display. In this embodiment, the DC/DC converter 24 adopts the flyback converter 14 as shown in FIG. Stable direct current voltage Vdc, in order to make the output power of DC/DC converter 24 can not only be protected and limited but also must be constant power output limit, so the present invention has the PWM control of OCP function in flyback converter 14 A compensation circuit 25 for the OCP function is added inside the controller U1, so that the PWM controller U2 added with the OCP compensation circuit 25 can reach the limit of OCP and constant power output. Specifically, in this embodiment, the DC/DC converter 24 is a flyback converter, which includes a conversion circuit and its control circuit, wherein the conversion circuit includes a transformer T1, a power transistor Q1, diodes D1 and D2, and capacitors C1 and C2, while the control circuit includes PWM controller U2, resistors R1 and R2, diode D3, capacitors C3 and C4 and output feedback circuit FB1.

Please refer to FIG. 2 and FIG. 4 at the same time. FIG. 4 is a waveform diagram of the voltages of each node of the OCP compensation circuit 25 shown in FIG. 2 . The PWM controller U2 adds a compensation circuit 25 for the OCP function inside the PWM controller U1 (such as an integrated circuit of the model EM8672) with the OCP function, which has seven pins CT, COMP, CS, GND, OUT, VCC, HV, the function of each pin will not be described here. The OCP compensation circuit 25 includes an attenuator 251 , a peak-to-valley hold circuit 252 , a subtractor 253 , an inverter 254 and an adder 255 . The attenuator 251 is, for example, a voltage divider circuit composed of a plurality of series-parallel coupled resistors, which receives the first pulsating DC voltage Va through the pin HV and the resistor R2, and attenuates the first pulsating DC voltage Va by X times to generate the second pulsating DC voltage Vx, that is, Vx=Va/X, where X is a real number. Attenuating the first pulsating DC voltage Va by X times is to reduce its voltage level so that subsequent circuits inside the OCP compensation circuit 25 can perform calculation processing, and the second pulsating DC voltage Vx generated after attenuating X times is the same as the first pulsating DC voltage Va. The voltage Va is proportional, that is, the second pulsating DC voltage Vx contains information of different ripple sizes (or valley values) caused by different loads in the first pulsating DC voltage Va. The peak-valley hold circuit 252 detects the peak value PH and the valley value VH of the second pulsating DC voltage Vx cycle by cycle and holds them for output.

The subtractor 253 subtracts the valley value VH from the second pulsating DC voltage Vx to generate the first voltage Vc, that is, Vc=Vx−VH. The purpose of subtracting the valley value VH from the second pulsating DC voltage Vx is to compensate the different valley values of the second pulsating DC voltage Vx due to different loads, so the generated first voltage Vc has no DC level and follows The second pulsating DC voltage Vx (or the first pulsating DC voltage Va) fluctuates in a pulsating waveform. The inverter 254 inverts the first voltage Vc to generate the second voltage Vi, that is, Vi=-Vc, so the generated second voltage Vi has no DC level and follows the second pulsating DC voltage Vx (or the first A pulsating waveform in which the pulsating DC voltage Va) changes in reverse.

The adder 255 adds the peak value PH and the fixed OCP set value Vset to the second voltage Vi to generate a compensated OCP set value Vocp, that is, Vocp=Vi+PH+Vset. Adding the second voltage Vi to the peak value PH (that is, the peak value of the power supply input voltage) is to generate an OCP compensation value Vcp that can compensate the fixed OCP set value Vset so as to reach the constant power output limit, that is, Vcp=Vi +PH. First of all, the OCP compensation value Vcp changes inversely with the change of the first pulsating DC voltage Va, so at the peak of the first pulsating DC voltage Va, the compensated OCP setting value Vcp is set with a smaller OCP compensation value Vcp Smaller, it limits the current flowing through the primary side of the transformer T1 to be smaller, and at the valley of the first pulsating DC voltage Va, the compensated OCP set value Vcp is larger with a larger OCP compensation value Vcp, and its limit The current flowing through the primary side of the transformer T1 is relatively large, so it can reach the limit of OCP and constant power output. Secondly, the peak value PH (that is, the peak value of the input voltage of the power supply) is added to the second voltage Vi, which has no DC level and changes inversely with the change of the first pulsating DC voltage Va, so that it can set a limited rated output The power will be comparable to that shown in Figure 1 under the same conditions.

The PWM controller U2 has a built-in OCP comparator CMP1 to realize the OCP function. It captures the voltage Vr1 across the two ends of the resistor R1 connected in series under the power transistor Q1 through the pin CS to compare it with the compensated OCP set value Vocp. If the captured voltage Vr1 is greater than the compensated OCP set value Vocp, it means that the output power of the DC/DC converter 24 has exceeded the rated value, and the control circuit needs to be protected against the conversion circuit, such as the control logic circuit of the PWM controller U2 CTRL1 will limit the duty cycle of the PWM control signal output from the pin OUT to the power transistor Q1 or directly turn off the power transistor Q1 to achieve OCP and constant power output limitation. In the case of different rated output power, it is only necessary to modify the resistance value of the resistor R1 to change the limit of the rated output power.

It should be noted that, in this embodiment, the OCP set value Vset is a fixed value preset in the PWM controller U2 and cannot be changed, but it is not limited thereto; for example, the OCP set value Vset can also be designed as The pin position of the PWM controller is set externally, but once the external setting is completed, the OCP set value Vset is also a fixed value. In addition, the OCP compensation value Vcp=Vi+PH=-Vc+PH=-(Vx-VH)+PH. The formula Vcp=-(Vx-VH)+PH can be changed purely from a mathematical point of view, such as Vcp=-(Vx-PH)+VH, and for example Vcp=-Vx+PH+VH, so the implementation of the OCP compensation circuit The method is not limited to the OCP compensation circuit 25 described in this embodiment.

Please refer to FIG. 5 , which is a circuit block diagram of another embodiment of the OCP compensation circuit 25 shown in FIG. 2 . The OCP compensation circuit 35 includes an attenuator 351 , a peak-to-valley hold circuit 352 , a subtractor 353 , an inverter 354 and an adder 355 . The attenuator 351 attenuates the first pulsating DC voltage Va by X times to generate the second pulsating DC voltage Vx, that is, Vx=Va/X. The peak-valley hold circuit 352 detects the peak value PH and the valley value VH of the second pulsating DC voltage Vx cycle by cycle and holds them for output. The subtractor 353 subtracts the peak value PH from the second pulsating DC voltage Vx to generate the first voltage V1 that varies with the variation of the first pulsating DC voltage Va, that is, V1=Vx−PH. The inverter 354 inverts the first voltage V1 to generate a second voltage V2 that varies inversely with the variation of the first pulsating DC voltage Va, that is, V2=−V1. The adder 355 adds the valley value VH and the fixed OCP set value Vset to the second voltage V2 to generate a compensated OCP set value Vocp, that is, Vocp=V2+VH+Vset=-V1+VH+Vset=-( Vx-PH)+VH+Vset, at this time the OCP compensation value Vcp=-(Vx-PH)+VH.

Please refer to FIG. 6 , which is a circuit block diagram of another embodiment of the OCP compensation circuit 25 shown in FIG. 2 . The OCP compensation circuit 45 includes an attenuator 451 , a peak-to-valley hold circuit 452 , an inverter 453 and an adder 454 . The attenuator 451 attenuates the first pulsating DC voltage Va by X times to generate the second pulsating DC voltage Vx, that is, Vx=Va/X. The peak-valley hold circuit 452 detects the peak value PH and the valley value VH of the second pulsating DC voltage Vx cycle by cycle and holds them for output. The inverter 453 inverts the second pulsating DC voltage Vx to generate a voltage V3 that varies inversely with the variation of the first pulsating DC voltage Va, that is, V3=−Vx. The adder 454 adds the peak value PH, the valley value VH and the fixed OCP set value Vset to the voltage V3 to generate the compensated OCP set value Vocp, that is, Vocp=V3+PH+VH+Vset=-Vx+PH+ VH+Vset, at this time the OCP compensation value Vcp=-Vx+PH+VH.

Please refer to FIG. 7 , which is a circuit diagram of another embodiment of the film capacitor 23 shown in FIG. 2 . In this embodiment, the film capacitor 23 is replaced by an LC low-pass filter 33 . The LC low-pass filter 33 is composed of an inductor L1 and a film capacitor C5 , and the LC low-pass filter 33 is coupled between the bridge rectifier 12 and the DC/DC converter 24 . Wherein, the film capacitor C5 can be the film capacitor 23 shown in FIG. 2 . In other words, the LC low-pass filter 33 can be realized by connecting an inductor L1 in series in front of the film capacitor 23 shown in FIG. 2 . The LC low-pass filter 33 has better filtering and energy storage effects than a single film capacitor 23 .

Please refer to FIG. 8 , which is a circuit diagram of another embodiment of the film capacitor 23 shown in FIG. 2 . In this embodiment, the film capacitor 23 is replaced by a π-type low-pass filter 43 . The π-type low-pass filter 43 is composed of a film capacitor C6 , an inductor L1 and a film capacitor C5 , and the π-type low-pass filter 43 is coupled between the bridge rectifier 12 and the DC/DC converter 24 . Wherein, the film capacitor C5 can be the film capacitor 23 shown in FIG. 2 , in other words, the π-type low-pass filter 43 can be connected in parallel after an inductor L1 is connected in series in front of the film capacitor 23 shown in FIG. 2 A film capacitor C6 is implemented. The π-type low-pass filter 43 has better filtering and energy storage effects than the LC low-pass filter 33, and can also filter out the conductive EMI noise generated by the switching of the power transistor Q1 to avoid being transmitted to the power supply and polluting its place power grid.

Whether it is the film capacitor 23 shown in Figure 2, or the LC low-pass filter 33 shown in Figure 7, or the π-type low-pass filter 43 shown in Figure 8, it is possible to adjust the capacitance value of the film capacitor wherein The size and/or the inductance value of the inductor are used to fine-tune the depth of the trough of the first pulsating DC voltage Va under light and heavy loads.

The above-mentioned embodiments are only examples for convenience of description, and even if they are arbitrarily modified by those skilled in the art, they will not depart from the scope of protection as claimed in the claims.

The above-mentioned embodiments are only examples for convenience of description, and even if they are arbitrarily modified by those skilled in the art, they will not depart from the scope of protection as claimed in the claims.

Claims (8)

1. A power converter, characterized in that, comprising: a bridge rectifier, which receives an AC power input voltage and rectifies the AC power input voltage to generate a full-wave rectified voltage; A film capacitor receives the full-wave rectified voltage and filters the full-wave rectified voltage to generate a first pulsating DC voltage; and A DC-to-DC converter, including a control circuit, the control circuit receives the first pulsating DC voltage, samples the first pulsating DC voltage to generate a second pulsating DC voltage, and detects a value of the second pulsating DC voltage peak value and a valley value, and an overcurrent protection compensation value is generated according to the second pulsating DC voltage, the peak value and the valley value, and the overcurrent protection compensation value is -(Vx-VH)+PH, wherein, Vx is the second pulsating DC voltage, VH is the valley value, and PH is the peak value. The control circuit generates a compensated overcurrent protection based on an overcurrent protection setting value plus the overcurrent protection compensation value. Set the value to perform over-current protection and constant power output limitation on the DC-to-DC converter. 2. The power converter according to claim 1, wherein the control circuit comprises: an attenuator, attenuating the first pulsating DC voltage to generate the second pulsating DC voltage; a peak-to-valley hold circuit for detecting the peak value and the valley value of the second pulsating DC voltage; a subtractor, subtracting the valley value from the second pulsating DC voltage to generate a first voltage; an inverter for inverting the first voltage to generate a second voltage; and An adder, adding the second voltage to the peak value and the over-current protection setting value to generate the compensated over-current protection setting value. 3. The power converter according to claim 1, wherein the control circuit comprises: an attenuator, attenuating the first pulsating DC voltage to generate the second pulsating DC voltage; a peak-to-valley hold circuit for detecting the peak value and the valley value of the second pulsating DC voltage; a subtractor, subtracting the peak value from the second pulsating DC voltage to generate a first voltage; an inverter for inverting the first voltage to generate a second voltage; and An adder, adding the second voltage to the valley value and the over-current protection setting value to generate the compensated over-current protection setting value. 4. The power converter according to claim 1, wherein the control circuit comprises: an attenuator, attenuating the first pulsating DC voltage to generate the second pulsating DC voltage; a peak-to-valley hold circuit for detecting the peak value and the valley value of the second pulsating DC voltage; an inverter for inverting the second pulsating DC voltage to generate a voltage; and An adder adds the voltage to the peak value, the valley value and the over-current protection setting value to generate the compensated over-current protection setting value. 5. The power converter as claimed in claim 1, further comprising an EMI filter, the bridge rectifier receives the AC power input voltage through the EMI filter. 6. The power converter according to claim 1, further comprising an inductor, the inductor and the film capacitor form an LC coupled between the bridge rectifier and the DC-to-DC converter low pass filter. 7. The power converter according to claim 1, further comprising an inductor and another thin film capacitor, the inductor, the thin film capacitor and the other thin film capacitor form a circuit coupled to the bridge rectifier and a π-type low-pass filter between the DC-to-DC converter. 8. The power converter as claimed in claim 1, wherein the DC-DC converter comprises a flyback converter.