CN105988255A - Display panel - Google Patents

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Publication number
CN105988255A
CN105988255A CN201510074172.8A CN201510074172A CN105988255A CN 105988255 A CN105988255 A CN 105988255A CN 201510074172 A CN201510074172 A CN 201510074172A CN 105988255 A CN105988255 A CN 105988255A
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China
Prior art keywords
substrate
layer
scan line
black
pixel
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CN201510074172.8A
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CN105988255B (en
Inventor
刘侑宗
李淂裕
黄建达
柴﨑稔
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Innolux Corp
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Innolux Display Corp
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Abstract

The invention relates to a display panel. The display panel includes a first substrate. The first substrate includes a bottom substrate; a semiconductor layer positioned on the bottom substrate; a first insulation layer positioned on the semiconductor layer; a first scanning line and a second scanning line which are positioned on the first insulation layer and extending in a first direction, wherein a part of the first scanning line and the second scanning line is overlapped with the semiconductor layer; a second insulation layer positioned on the first scanning line, the second scanning line and the first insulation layer; a data line positioned on the second insulation layer and extending in a second direction, wherein the data line is electrically connected to the semiconductor layer through a first contact hole, and the second direction is different from the first direction; and a first metal pad and a second metal pad which are positioned on the second insulation layer, wherein the first metal pad and the second metal pad are electrically connected to the semiconductor layer through two second contact holes, and the first contact hole and the second contact holes are formed between the first scanning line and the second scanning line.

Description

Display floater
Technical field
The present invention is that a kind of distribution position by adjustment array base palte and structure thereof are to improve the display floater of aperture opening ratio about a kind of display floater.
Background technology
Generally speaking, display panels is formed by comprising the array base palte of the active members such as thin film transistor (TFT), the colored filter substrate comprising the elements such as colored filter and sandwiched liquid crystal therein, wherein, in the distribution area such as data line and scan line and transistor area, this display floater generally includes a black matrix" to prevent colour mixture, improve contrast degree and prevent transistor from causing alignment film orientation uneven.Along with the demand of high-resolution liquid crystal display increases therewith, reduce black matrix" and become an important topic of this technical field development with the aperture opening ratio promoting liquid crystal display.
But, based on known transistor and the design of distribution, on the premise of maintenance is avoided colour mixture and kept contrast, reducing black matrix" is to have limited to improve effect of the aperture opening ratio of display.Therefore development is by adjusting the distribution position of array base palte and structure thereof to provide one have high aperture and have the liquid crystal display of function of above-mentioned black matrix" concurrently, in order to needed for having it.
Summary of the invention
The main object of the present invention is to provide a kind of display floater, in order to can be by adjusting the distribution position of array base palte and structure thereof to improve the aperture opening ratio of display floater.
For reaching above-mentioned purpose, the present invention is to provide a kind of display floater, and it includes a first substrate, a display layer and a second substrate, and wherein, this display layer is between this first substrate and this second substrate, and this first substrate includes: a substrate;Semi-conductor layer, is positioned on this substrate;One first insulating barrier, is positioned on this semiconductor layer;One first scan line and one second scan line, be positioned on this first insulating barrier, and extends along a first direction respectively, and this first and second scan line of a part is overlapping with this semiconductor layer;One second insulating barrier, is positioned on this first scan line, this second scan line and this first insulating barrier;One data line, is positioned on this second insulating barrier, and extends along a second direction, and this data line is electrically connected with this semiconductor layer by one first contact hole, wherein, and this second direction difference and this first direction;And one first metal gasket and one second metal gasket, it being positioned on this second insulating barrier, this first metal gasket and this second metal gasket are electrically connected with this semiconductor layer by two second contact holes respectively;Wherein, this first contact hole and this two second contact hole are between this first scan line and this second scan line.
Implementing in aspect in one, this display floater can also include: one the 3rd insulating barrier, is positioned on this first metal gasket, this second metal gasket and this second insulating barrier;One first pixel electrode layer, is positioned on the 3rd insulating barrier, and this first pixel electrode layer is electrically connected with this first metal gasket by one the 3rd contact hole;And one second pixel electrode layer, it being positioned on the 3rd insulating barrier, this second pixel electrode layer is electrically connected with this second metal gasket by another the 3rd contact hole.
Implementing in aspect in one, this first pixel electrode layer and this second pixel electrode layer can be adjacent to the same side of this data line.
Implement in aspect in one, this first pixel electrode layer and this second pixel electrode layer can be adjacent to the not homonymy of this data line, and this first scan line includes one first inside edge and one first outer ledge, this second scan line includes one second inside edge and one second outer ledge, wherein, this second inside edge adjacent, this first inside edge.
Implementing in aspect in one, this first pixel electrode layer can be overlapped in this first inside edge and this first outer ledge of this first scan line, and this second pixel electrode layer can be overlapped in this second inside edge and this second outer ledge of this second scan line.
Implementing in aspect in one, this first pixel electrode layer and this second pixel electrode layer can be located between the first outer ledge of this first scan line and the second outer ledge of this second scan line.
Implement in aspect in one, this display floater can also include multiple light shield layer, between this substrate and this semiconductor layer, the position of described light shield layer corresponds respectively to the region that this first scan line is overlapping with this semiconductor layer, and the region that this second scan line is overlapping with this semiconductor layer.
Implementing in aspect in one, this display floater can also include a cushion, and between this substrate and this semiconductor layer, and described light shield layer is between this substrate and this cushion.
Implement in aspect in one, this display floater can also include one first black-matrix layer and one second black-matrix layer, between this first substrate and this second substrate, this first black-matrix layer at least covers this first scan line or this second scan line, and this second black-matrix layer at least covers this data line.
Implementing in aspect in one, the width of this first black-matrix layer is between 5 μm to 50 μm.
Implement in aspect in one, this second substrate can be a colored filter substrate, this second substrate includes the pixel groups of at least four different colours, wherein, each pixel groups includes four adjacent one another are and the first pixel cell of same color, the second pixel cell, the 3rd pixel cell and the 4th pixel cells, wherein, this first black-matrix layer or this second black-matrix layer are between the pixel groups of different colours.
Implement in aspect in one, this second substrate can be a colored filter substrate, this second substrate includes the pixel groups of at least three row different colours, each pixel groups includes multiple along the arrangement of this second direction and the pixel cell of same color, wherein, in this pixel groups, this first black-matrix layer is between two adjacent pixel unit and another two adjacent pixel unit.
Implement in aspect in one, this display floater can also include one first black-matrix layer and one second black-matrix layer, between this first substrate and this second substrate, this first black-matrix layer at least covers this first scan line or this second scan line, and this second black-matrix layer at least covers this data line of a part.
Implement in aspect in one, this second substrate can be a colored filter substrate, this second substrate includes the pixel groups of at least three different colours, each pixel groups includes two and pixel cells of same color the most adjacent, wherein, this first black-matrix layer or this second black-matrix layer are between the pixel groups of different colours.
Accompanying drawing explanation
For further illustrating the technology contents of the present invention, after describing in detail such as below in conjunction with embodiment and accompanying drawing, wherein:
Fig. 1 is the schematic diagram of the display floater of the embodiment of the present invention 1.
Fig. 2 is the line configuring schematic diagram of the first substrate of the embodiment of the present invention 1.
Fig. 3 is the line construction schematic diagram of the first substrate of the embodiment of the present invention 1.
Fig. 4 is the schematic top plan view of the first substrate of the embodiment of the present invention 1.
Fig. 5 is the cross-sectional schematic of the first substrate of A-A ' the line of cut expansion along Fig. 4.
Fig. 6 A is the schematic diagram of the second substrate of the embodiment of the present invention 1.
Fig. 6 B is the schematic diagram of the second substrate of the embodiment of the present invention 2.
Fig. 7 is the line configuring schematic diagram of the first substrate of the embodiment of the present invention 3.
Fig. 8 is the line construction schematic diagram of the first substrate of the embodiment of the present invention 3.
Fig. 9 is the schematic top plan view of the first substrate of the embodiment of the present invention 3.
Figure 10 is the schematic diagram of the second substrate of the embodiment of the present invention 3.
Figure 11 is the line construction schematic diagram of the first substrate of the embodiment of the present invention 4.
Figure 12 is the schematic top plan view of the first substrate of the embodiment of the present invention 4.
Figure 13 A is known pixel polarity schematic diagram.
Figure 13 B is the pixel polarity schematic diagram of the first substrate of the embodiment of the present invention 4.
Figure 14 is the schematic diagram that the first substrate of the embodiment of the present invention 4 is stacked with second substrate.
Detailed description of the invention
Along with high-resolution liquid crystal display demand with increase, reduce black matrix" with promote liquid crystal display aperture opening ratio become this technical field development an important topic.Therefore for improving the problems referred to above, the present invention is by adjusting the distribution position of array base palte and structure thereof to reach to improve the purpose of display floater aperture opening ratio.
In the present invention, as long as the purpose of the invention described above can be reached, the present invention is also not particularly limited the material that each element of this array base palte is used, and any material known in the art all can use.For example, in an enforcement aspect of the present invention, this substrate can be a transparency carrier, such as transparent plastic substrate or glass substrate;This cushion can be made up of silicon nitride, silicon oxide or a combination thereof;This semiconductor layer can be made up of uncrystalline silicon, low temperature polycrystalline silicon or metal-oxide;This second insulating barrier (or can be described as passivation layer) can be by silicon nitride, silicon oxide or a combination thereof;This first insulating layer material can be made up of silicon oxide, silicon nitride, silicon oxynitride or hafnium oxy-nitride;This first scan line, this second scan line (or can be described as grid layer), this first metal gasket and this second metal gasket (or can be described as source layer) can be made up of conductive materials such as molybdenum, aluminum, copper, titanium or a combination thereofs;3rd insulating barrier can be made up of materials such as perfluoroalkoxy resin (perfluoroalkoxy polymer resin, PFA), fluorubber (fluoroelastomers);And this first pixel electrode and the second pixel electrode can be made up of transparent conductive oxide, such as indium tin oxide, indium-zinc oxide, aluminum zinc oxide etc..
The following is, by specific embodiment, embodiments of the present invention are described, the personage being familiar with this technology can be understood other advantages and effect of the present invention easily by content disclosed in the present specification.Additionally, the present invention also can be implemented by other different specific embodiments or be applied, under without departing from the spirit, carry out various modification and change.
Embodiment 1
Refer to Fig. 1, it it is the schematic diagram of the display floater 100 of the present embodiment 1, wherein, this display floater 100 includes first substrate 10, display layer 5 and a second substrate 20, wherein, this display layer 5 is between this first substrate 10 and this second substrate 20, and this first substrate 10 and this second substrate 20 are respectively array basal plate and a colored filter substrate, and this display layer 5 can be a liquid crystal layer.
Refer to Fig. 2, for the line configuring schematic diagram of the first substrate 10 of the present embodiment 1.As in figure 2 it is shown, the present embodiment 1 is by lighttight element (such as the first scan line the 105, second scan line 105 ' and the thin-film transistor element T) concentrated setting of neighbor by the line configuring mode on adjustment first substrate 10.Further, refer to Fig. 3, it it is the line construction schematic diagram of the first substrate 10 for the present embodiment 1, wherein, Fig. 3 only presents semiconductor layer the 103, first scan line the 105, second scan line 105 ', data line 107 (or can be described as drain electrode layer) and the relative position relation of the element such as first contact hole the 108, second contact hole the 111, first pixel electrode layer 113 being electrically connected with and the second pixel electrode layer 115, more clearly to present the technical characteristic of the present invention.In Fig. 3, data line 107 is to be electrically connected with this semiconductor layer 103 by one first contact hole 108.Semiconductor layer 103 is to be electrically connected with this second pixel electrode layer 115 with this first pixel electrode layer 113 by two second contact holes 111 and two the 3rd contact holes 114,114 ' (being shown in Fig. 5).
This first contact hole 108 and this two second contact hole 111 are positioned between one first scan line 105 and one second scan line 105 '.This first pixel electrode layer 113 and this second pixel electrode layer 115 are positioned at the not homonymy of this data line 107, and this first scan line 105 includes one first inside edge 1051 and one first outer ledge 1052, this second scan line 105 ' includes one second inside edge 1051 ' and one second outer ledge 1052 ', wherein, this second inside edge 1051 ' adjacent, this first inside edge 1051, this first pixel electrode layer 113 is overlapped in the first inside edge 1051 and this first outer ledge 1052 of this first scan line 105, and this second pixel electrode layer 115 is overlapped in the second inside edge 1051 ' and this second outer ledge 1052 ' of this second scan line 105 '.
Please also refer to Fig. 4 and Fig. 5, it is the schematic top plan view (position of corresponding diagram 3 dotted line frame) of the first substrate 10 of respectively the present embodiment 1 and the cross-sectional schematic of first substrate 10 launched along the A-A ' line of cut of Fig. 4, wherein, for becoming apparent from presenting the technical characteristic of the present invention, Fig. 4 clipped is found in the element (such as pixel electrode and the 3rd insulating barrier etc.) of Fig. 5.Therefore as shown in Figures 4 and 5, the first substrate 10 of the present embodiment 1 includes: a substrate 101;One cushion 102, is positioned on this substrate 101;Semi-conductor layer 103, is positioned on this cushion 102;One first insulating barrier 104, is positioned on this cushion 102 and this semiconductor layer 103;One first scan line 105 and one second scan line 105 ', it is positioned on this first insulating barrier 104, and extend (such as the X-direction of Fig. 4) along a first direction respectively, and this first scan line 105 of a part is overlapping with this semiconductor layer 103 with the second scan line 105 ';One second insulating barrier 106, is positioned on this first scan line 105, this second scan line 105 ' and this first insulating barrier 104;One data line 107, being positioned on this second insulating barrier 106, and extend along a second direction (such as the Y-direction of Fig. 4), this data line 107 is electrically connected with this semiconductor layer 103 by one first contact hole 108, wherein, this second direction difference and this first direction;And one first metal gasket 109 and one second metal gasket 110, it being positioned on this second insulating barrier 106, this first metal gasket 109 and this second metal gasket 110 are electrically connected with this semiconductor layer 103 by two second contact holes 111 respectively;Wherein, as shown in Figure 4, this first contact hole 108 and this two second contact hole 111 are positioned between this first scan line 105 and this second scan line 105 '.
Please continue to refer to Fig. 4 and Fig. 5, this first substrate 10 also includes: one the 3rd insulating barrier 112, is positioned on this first metal gasket 109, this second metal gasket 110 and this second insulating barrier 106;One first pixel electrode layer 113, is positioned on the 3rd insulating barrier 112, and this first pixel electrode layer 113 is electrically connected with this first metal gasket 109 by one the 3rd contact hole 114;One second pixel electrode layer 115, is positioned on the 3rd insulating barrier 112, and this second pixel electrode layer 115 is electrically connected with this second metal gasket 110 by another the 3rd contact hole 114 ';And multiple light shield layer 116, between this substrate 101 and this semiconductor layer 103, the position of described light shield layer 116 corresponds respectively to the region that this first scan line 105 is overlapping with this semiconductor layer 103, and the region that this second scan line 105 ' is overlapping with this semiconductor layer 103.
In addition, in the present embodiment 1, this semiconductor layer 103 can be made up of low-temperature polysilicon silicon materials, and it includes the source/drain region 103A and a line areas 103B that doped with suitable admixture (such as: nitrogen or phosphorus) or utilize the metal-doped formation such as aluminum and is arranged at a channel region 103C of undoped therebetween.
Please continue to refer to Fig. 6 A, owing to the present embodiment 1 is by adjusting distribution position and the structure thereof of this first substrate 10, using the described active member concentrated setting as sub-pixel switch, can suitably increase to should there is the width of black-matrix layer at such opaque active member and reduce to should not there is first substrate 10 width of the black-matrix layer at such opaque active member by first substrate 10 as the second substrate 20 of colored filter substrate, reach to reduce ratio shared by integral black matrix layer and improve effect of aperture opening ratio of display floater.Be with, please also refer to Fig. 1 and Fig. 6 A, this display floater 100 also includes one first black-matrix layer I-I ' and one second black-matrix layer II-II ', it is positioned on this second substrate 20, this first black-matrix layer I-I ' position at least correspond to this first scan line 105 and this second scan line 105 ' and this first black-matrix layer I-I of Fig. 4 ' is for a strip veil extended in X direction, its width be enough to cover this first scan line 105 and this second scan line 105 ' simultaneously, and this second black-matrix layer II-II ' position at least correspond to this data line 107 of Fig. 4.The width of in the present embodiment 1, this first black-matrix layer I-I ' width be about 5-50 μm, and this second black-matrix layer II-II ' is about 2-20 μm.Additionally, as shown in Figure 6A, this display floater also includes that a width is about the 3rd black-matrix layer III-III of 2-20 μm ', it is parallel with this first black-matrix layer, to avoid producing between the adjacent pixel unit of different colours on this second substrate colour mixture.
Therefore as shown in Figure 1, Figure 2 to shown in 5 and Fig. 6 A, by adjusting distribution position and the structure thereof of the first substrate 10 as array base palte, the display base plate 100 of the present embodiment 1 can reduce black-matrix layer proportion, improves the aperture opening ratio of display floater.
Embodiment 2
Embodiment 2 is substantially similar with embodiment 1, and the pixel cell configuration mode of the colored filter being only that the second substrate 20 ' as colored filter substrate of embodiment 2 comprised that do not exists together is different.Refer to Fig. 6 B, in the present embodiment 2, this second substrate 20 ' includes the pixel groups 201 of at least four different colours, wherein, each pixel groups 201 includes four adjacent one another are and the first pixel cell 201A of same color, the second pixel cell 201B, the 3rd pixel cell 201C and the 4th pixel cell 201D, wherein, this first black-matrix layer I-I ' or this second black-matrix layer II-II ' between the pixel groups of different colours.Owing to adjacent pixel cell (as shown in 201A, 201B, 201C or 201D) is same color, it is not required to avoid colour mixture, can be not required between the most adjacent and homochromy pixel cell arrange black-matrix layer (position shown in dotted line), reduce black-matrix layer proportion further, thus more improve the aperture opening ratio of display floater.The pixel groups included by second substrate 40 of the present embodiment 2 is in addition to can being the pixel groups of red, green, blue and white four kinds of colors, and art tool usually intellectual also can be adjusted to the pixel groups of other four kinds of colors according to demand, and the present invention is not especially as limit.
Other structures same as in Example 1 and configuration mode the present embodiment 2 will not be described in great detail.
Embodiment 3
Embodiment 3 is the line configuring mode of the first substrate as array base palte from the different places of embodiment 1, and the configuration mode as the pixel cell of the second substrate of colored filter substrate is different.
Refer to Fig. 7, be the line configuring schematic diagram of the first substrate 30 of the present embodiment 3.As it is shown in fig. 7, the present embodiment 3 also through the line configuring mode adjusted on first substrate 30 by lighttight element (such as the first scan line the 305, second scan line 305 ' and the thin-film transistor element T) concentrated setting of neighbor.Further, refer to Fig. 8, be the line construction schematic diagram of the first substrate 30 for the present embodiment 3.Similar to Example 1, Fig. 8 only presents the relative position relation of the elements such as semiconductor layer the 303, first scan line the 305, second scan line 305 ', data line the 307, first contact hole the 308, second contact hole the 311, first pixel electrode layer 313 and the second pixel electrode layer 315, more clearly to present the technical characteristic of the present invention.The present embodiment 3 is similar to Example 1, and a data line 307 is to be electrically connected with this semiconductor layer 303 by one first contact hole 308, is that the first pixel electrode layer 313 and the second pixel electrode layer 315 are in the same side of this data line 307 at difference.This first contact hole 308 and this two second contact hole 311 are also positioned between one first scan line 305 and one second scan line 305 '.As for other component structure and the configurations substantially similar with embodiment 1, will not be described in great detail at this.
Please also refer to Fig. 9, schematic top plan view (position of corresponding diagram 8 dotted line frame) for the first substrate 30 of the present embodiment 3, wherein, the technical characteristic becoming apparent from presenting the present invention thought by Fig. 9 also clipped element (such as pixel electrode and the 3rd insulating barrier etc.).As shown in Figure 9, first metal gasket 309 and the second metal gasket 310 are electrically connected with this semiconductor layer 303 by two second contact holes 311, and this first contact hole 308 and this two second contact hole 311 are positioned between this first scan line 305 and this second scan line 305 '.Other component structures and the configuration of the present embodiment 3 are substantially similar with embodiment 1, and the cross-sectional schematic of the first substrate 30 that the B-B ' line of cut along Fig. 9 launches is the same as Fig. 5, will not be described in great detail at this.
Please continue to refer to Figure 10, owing to the present embodiment 3 is by adjusting distribution position and the structure thereof of this first substrate 30, the active member concentrated setting that will switch as sub-pixel, be with, as shown in Figure 10, can suitably increase to should there is the width of black-matrix layer at such opaque active member and reduce should not there is first substrate 30 width of the black-matrix layer at such opaque active member by first substrate 30 as the second substrate 40 of colored filter substrate, reach to reduce ratio shared by integral black matrix layer and improve effect of aperture opening ratio of display floater.Be with, as shown in Figure 10, in embodiment 3, second substrate 40 as colored filter substrate includes the pixel groups 401 of four row different colours (such as red, green, blue and white), each pixel groups 401 includes multiple along this second direction (such as the Y-direction of Fig. 9) arrangement and the pixel cell (401A, 401B, 401C) of same color, wherein, in this pixel groups 401, this first black-matrix layer I-I ' between two adjacent pixel unit and another two adjacent pixel unit (between such as 401A and 401B or between 401B and 401C).In embodiment 3, this second substrate 40 also includes one second black-matrix layer II-II ', it is between the pixel groups of different colours.The width of in the present embodiment 3, this first black-matrix layer I-I ' width be about 5-50 μm, and this second black-matrix layer II-II ' is about 2-20 μm.In addition, owing to adjacent pixel cell (as shown in 401A, 401B, 401C) is same color, it is not required to avoid colour mixture, therefore except having at lighttight active member, can be not required between adjacent and homochromy pixel cell arrange black-matrix layer (position shown in dotted line), reach to reduce ratio shared by integral black matrix layer, improve the aperture opening ratio of display floater.Furthermore, the pixel groups included by second substrate 40 of the present embodiment 3 is in addition to can being the pixel groups of red, green, blue and white four kinds of colors, art tool usually intellectual also can be adjusted to red, the pixel groups of three kinds of colors of green and blue according to demand, and the present invention is not especially as limit.
Therefore as shown in Figure 7 to 10, by adjusting distribution position and the structure thereof of the first substrate 30 as array base palte, also can reduce black-matrix layer proportion, improve the aperture opening ratio of display floater.
Embodiment 4
Embodiment 4 is the line configuring mode of the first substrate as array base palte from the different places of embodiment 1, and the configuration mode as the pixel cell of the second substrate of colored filter substrate is different.
Refer to Figure 11, be the line construction schematic diagram of the first substrate 50 for the present embodiment 4.Similar to Example 1, Figure 11 only presents the relative position relation of the elements such as semiconductor layer the 503, first scan line the 505, second scan line 505 ', data line the 507, first contact hole the 508, second contact hole the 511, first pixel electrode layer 513 and the second pixel electrode layer 515, more clearly to present the technical characteristic of the present invention.The present embodiment 4 and embodiment 1 different places be what the first pixel electrode layer 513 and one second pixel electrode layer 515 were seen by top view direction, not only at the not homonymy of this data line 507, be also positioned between this first scan line 505 and this second scan line 505 '.More specifically, this first scan line 505 includes one first inside edge 5051 and one first outer ledge 5052, this second scan line 505 ' includes one second inside edge 5051 ' and one second outer ledge 5052 ', wherein, this second inside edge 5051 ' adjacent, this first inside edge 5051.This first pixel electrode layer 513 and this second pixel electrode layer 515 are positioned between the first outer ledge 5052 and second outer ledge 5052 ' of this second scan line 505 ' of this first scan line 505.As for other component structure and the configurations substantially similar with embodiment 1, will not be described in great detail at this.
Please also refer to Figure 12, schematic top plan view (position of corresponding Figure 11 dotted line frame) for the first substrate 50 of the present embodiment 4, wherein, the technical characteristic becoming apparent from presenting the present invention thought by Figure 12 also clipped element (such as pixel electrode and the 3rd insulating barrier etc.).As shown in figure 12, embodiment 4 is similar to Example 1, first metal gasket 509 and the second metal gasket 510 are electrically connected with this semiconductor layer 503 by two second contact holes 511, and this first contact hole 508 and this two second contact hole 511 are positioned between this first scan line 505 and this second scan line 505 '.Other component structures and the configuration of the present embodiment 4 are substantially similar with embodiment 1, and the cross-sectional schematic of the first substrate 50 that the C-C ' line of cut along Figure 12 launches is the same as Fig. 5, will not be described in great detail at this.
Refer to Figure 13 A, be the pixel polarity schematic diagram of the first substrate 50 ' using the design of known line structure.As shown in FIG. 13A, owing to same data line 507 ' is to each pixel with fixing positive-negative polarity input electric signal, therefore often row pixel is to have identical polarity, and the pixel between different rows has different polarity.Owing to the pixel polarity of adjacent same column is opposite each other, each pixel the most easily produces crosstalk (cross-talk).Otherwise, refer to Figure 13 B, be the pixel polarity schematic diagram of the first substrate 50 of the embodiment of the present invention 4.Though the data line 507 of the present embodiment 4 is still with fixing positive-negative polarity input signal to each pixel, so because using the line configuring design of the present embodiment 4, driving pixel in row reversion (column inversion) mode, the pixel polarity of adjacent same column is mutually the same, is not likely to produce crosstalk.Therefore, the first substrate 50 of the present embodiment 4 has low-power consumption, the advantage of low crosstalk.
Please continue to refer to Figure 14, it is the second substrate 60 of first substrate 50 of corresponding Figure 11, wherein, Figure 14 is to present this second substrate 60 in the way of first substrate 50 local line of overlapping Figure 11, thinks the relative position relation becoming apparent from showing between black-matrix layer and pixel groups and the circuit of first substrate of second substrate.Owing to the present embodiment 4 is by adjusting distribution position and the structure thereof of this first substrate 50, reduce the active member of sub-pixel switch, be with, as shown in figure 14, can suitably adjust to having the position of the black-matrix layer at such opaque active member by first substrate 50 as the second substrate 60 of colored filter substrate, and the pixel cell corresponding to the sub-pixel of adjacent and unshared same first contact hole being switched is configured to homochromy pixel groups, thus reaches to reduce ratio shared by integral black matrix layer and improve effect of aperture opening ratio of display floater.Be with, as shown in figure 14, in embodiment 4, second substrate 60 as colored filter substrate includes at least three different colours (as red, green, blue) pixel groups 601, each pixel groups 601 includes two adjacent one another are and same colors the pixel cell (601A arranged along this first direction, 601B, and 601C), wherein, in described pixel groups 601, this first black-matrix layer I-I ' it is between described pixel groups 601 and extends (such as X-direction in figure) along a first direction, and this second black-matrix layer II-II ' between two sets of adjacent pixels 601.In addition, owing to adjacent pixel cell (601A, 601B or 601C) is same color, it is not required to avoid colour mixture, can be not required to arrange this second black-matrix layer II-II between the most adjacent and homochromy pixel cell (601A, 601B or 601C) ' (between pixel cell 601A), reach to reduce ratio shared by integral black matrix layer, improve the aperture opening ratio of display floater.Furthermore, though the present embodiment 4 is to illustrate pixel cell 601A with rectangle, as long as the right demand that can reach known black-matrix layer and the present invention improve effect of aperture opening ratio, the black-matrix layer of any shape all can use, therefore the present invention is not specially limited the shape of pixel cell.Furthermore, the pixel groups included by second substrate 60 of the present embodiment 4 is except can be red, green and in addition to the pixel groups of blue three-color, art tool usually intellectual also can be adjusted to red, green, blue and the pixel groups of white four kinds of colors according to demand, and the present invention is not especially as limit.
Above-described embodiment explanation merely for convenience and illustrate, the interest field that the present invention is advocated is from should be as the criterion with described in right, rather than is only limitted to above-described embodiment.

Claims (14)

1. a display floater, it includes a first substrate, a display layer and a second substrate, wherein, This display layer is between this first substrate and this second substrate, and this first substrate includes:
One substrate;
Semi-conductor layer, is positioned on this substrate;
One first insulating barrier, is positioned on this semiconductor layer;
One first scan line and one second scan line, be positioned on this first insulating barrier, and respectively along one the One direction extends, and this first and second scan line of a part is overlapping with this semiconductor layer;
One second insulating barrier, is positioned on this first scan line, this second scan line and this first insulating barrier;
One data line, is positioned on this second insulating barrier, and extends along a second direction, and this data line leads to Cross one first contact hole and this semiconductor layer to be electrically connected with, wherein, this second direction different with this first Direction;And
One first metal gasket and one second metal gasket, be positioned on this second insulating barrier, this first metal gasket It is electrically connected with this semiconductor layer by two second contact holes respectively with this second metal gasket;
Wherein, this first contact hole and this two second contact hole are positioned at this first scan line and second sweep with this Retouch between line.
2. display floater as claimed in claim 1, also includes:
One the 3rd insulating barrier, is positioned on this first metal gasket, this second metal gasket and this second insulating barrier;
One first pixel electrode layer, is positioned on the 3rd insulating barrier, and this first pixel electrode layer passes through one 3rd contact hole is electrically connected with this first metal gasket;And
One second pixel electrode layer, is positioned on the 3rd insulating barrier, and this second pixel electrode layer is by another One the 3rd contact hole is electrically connected with this second metal gasket.
3. display floater as claimed in claim 2, wherein, this first pixel electrode layer with this second Pixel electrode layer is adjacent to the same side of this data line.
4. display floater as claimed in claim 2, wherein, this first pixel electrode layer with this second Pixel electrode layer is adjacent to the not homonymy of this data line, and this first scan line includes inside one first Edge and one first outer ledge, this second scan line includes outside one second inside edge and one second Lateral edges, wherein, this second inside edge adjacent, this first inside edge.
5. display floater as claimed in claim 4, wherein, this first pixel electrode layer is overlapped in this This first inside edge of first scan line and this first outer ledge, and this second pixel electrode layer weight It is laminated on this second inside edge and this second outer ledge of this second scan line.
6. display floater as claimed in claim 4, wherein, this first pixel electrode layer with this second Pixel electrode layer is positioned at outside the first outer ledge of this first scan line and the second of this second scan line Between lateral edges.
7. display floater as claimed in claim 1, also includes multiple light shield layer, is positioned at this substrate And between this semiconductor layer, the position of described light shield layer corresponds respectively to this first scan line and partly leads with this The region of body ply, and the region that this second scan line is overlapping with this semiconductor layer.
8. display floater as claimed in claim 7, also includes a cushion, be positioned at this substrate with Between this semiconductor layer, and described light shield layer is between this substrate and this cushion.
9. display floater as claimed in claim 1, also includes one first black-matrix layer and one second Black-matrix layer, between this first substrate and this second substrate, this first black-matrix layer is at least Cover this first scan line or this second scan line, and this second black-matrix layer at least covers this data Line.
10. display floater as claimed in claim 9, wherein, the width of this first black-matrix layer Between 5 μm to 50 μm.
11. display floaters as claimed in claim 9, wherein, this second substrate is a colorized optical filtering Plate base, this second substrate includes the pixel groups of at least four different colours, wherein, each pixel groups Including four adjacent one another are and the first pixel cell of same color, the second pixel cell, the 3rd pixels Unit and the 4th pixel cell, wherein, this first black-matrix layer or this second black-matrix layer position Between the pixel groups of different colours.
12. display floaters as claimed in claim 9, wherein, this second substrate is a colorized optical filtering Plate base, this second substrate includes the pixel groups of at least three row different colours, and each pixel groups includes Multiple along the arrangement of this second direction and the pixel cell of same color, wherein, in this pixel groups, should First black-matrix layer is between two adjacent pixel unit and another two adjacent pixel unit.
13. display floaters as claimed in claim 1, also include one first black-matrix layer and one the Two black-matrix layer, between this first substrate and this second substrate, this first black-matrix layer is extremely Cover this first scan line or this second scan line less, and this second black-matrix layer at least covers one This data line divided.
14. display floaters as claimed in claim 13, wherein, this second substrate is a colorized optical filtering Plate base, this second substrate includes the pixel groups of at least three different colours, and each pixel groups includes Two and pixel cells of same color the most adjacent, wherein, this first black matrix" Layer or this second black-matrix layer are between the pixel groups of different colours.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021258475A1 (en) * 2020-06-22 2021-12-30 武汉华星光电半导体显示技术有限公司 Display panel and display device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323918B1 (en) * 1996-12-10 2001-11-27 Fujitsu Limited Liquid crystal display device and process for production thereof
CN1379276A (en) * 2001-03-30 2002-11-13 三洋电机株式会社 Dynamic matrix type display device having complementary capacitance on each pixel
US6630971B1 (en) * 1999-04-02 2003-10-07 Lg.Philips Lcd Co., Ltd. Multi-domain liquid crystal display device
US20120147314A1 (en) * 2009-08-24 2012-06-14 Sharp Kabushiki Kaisha Display device and color filter substrate
CN103309076A (en) * 2012-03-14 2013-09-18 株式会社东芝 Liquid crystal display apparatus including interference filters

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323918B1 (en) * 1996-12-10 2001-11-27 Fujitsu Limited Liquid crystal display device and process for production thereof
US6630971B1 (en) * 1999-04-02 2003-10-07 Lg.Philips Lcd Co., Ltd. Multi-domain liquid crystal display device
CN1379276A (en) * 2001-03-30 2002-11-13 三洋电机株式会社 Dynamic matrix type display device having complementary capacitance on each pixel
US20120147314A1 (en) * 2009-08-24 2012-06-14 Sharp Kabushiki Kaisha Display device and color filter substrate
CN103309076A (en) * 2012-03-14 2013-09-18 株式会社东芝 Liquid crystal display apparatus including interference filters

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021258475A1 (en) * 2020-06-22 2021-12-30 武汉华星光电半导体显示技术有限公司 Display panel and display device

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