CN105981001A - A system and method for abstracting storage media devices via a full duplex queued command interface - Google Patents
A system and method for abstracting storage media devices via a full duplex queued command interface Download PDFInfo
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- CN105981001A CN105981001A CN201480075072.0A CN201480075072A CN105981001A CN 105981001 A CN105981001 A CN 105981001A CN 201480075072 A CN201480075072 A CN 201480075072A CN 105981001 A CN105981001 A CN 105981001A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0661—Format or protocol conversion arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0626—Reducing size or complexity of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0689—Disk arrays, e.g. RAID, JBOD
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Abstract
The invention discloses a system and method for abstracting storage media devices via a full duplex queued command interface. A simplified host accesses SATA and SAS storage media devices by abstracting the SATA and SAS protocols with one full duplex protocol that supports full command queuing to each storage media device, whether SATA or SAS, where the abstraction protocol is performance-centric and supports common high-level read and write access to a pool of storage media devices, each of which may have a SATA or SAS interface. The abstraction protocol is link-agnostic and may be carried via a multiplicity of direct attach or networked interfaces, including but not limited to PCIe, Ethernet (e.g., 1GbE, 10GbE, 40GbE, or 100GbE), Infiniband, ThunderBolt, Firewire, USB, and / or custom interfaces.
Description
Technical field
This patent disclosure relates generally to store the field of device.More particularly, the present invention relate to by complete double
Work queued command interface abstraction SATA and/or SAS storage medium device are to increase performance, to reduce main frame
Expense also simplifies calibration (scaling) storage medium device and the system and method for system.
Background technology
For straight with storage medium device (rotary hard disk, solid state hard disc, ram driver etc.) in this area
Connecing mutual current state for using interface protocol, such as (serial ATA, wherein ATA=is senior for SATA
Technical Appendix) or SAS (serial attached SCSI).The two interface all originates from more ancient parallel interface
(PATA and SCSI).The parallel specification that puppy parc still keeps original is constant, they now simply by
Serial line interface rather than transmitted by shared access two-way simultaneous bus.In the case of SATA, this limit
Make high speed full duplex serial link half-duplex efficiently, because full command queuing and unordered response itself are not
Supported.Although the machine command queuing (NCQ) is supported by the subset of SATA storage medium device,
But it simply solves the transmission of some data rather than all orders, and generally do not support staggered read and
Writing commands.SAS support tag command queue (TCQ) to limit with these utilizing that SATA overcomes in one
A little restrictions.Access device mixture (some SATA, some SAS) time, main frame must support and
Management the two agreement.The host software layer mutual with SATA or SAS must support that their high agreement is opened
Pin.
SATA can have port multiplier and SAS can have port expander.Each in these devices
Outlet SATA or SAS link are separated into other port by device respectively.Appointing in SATA or SAS protocol
One is the path from main frame to these devices, and therefore, main frame must process SATA or SAS.Additionally,
This link bandwidth of multiplexer/between expander and main frame between the storage medium device in downstream altogether
Enjoy.Sata port multiplexer is generally used for increasing memory capacity, thus is subdivided in controller and port multiplication
Bandwidth between device.Sata port multiplexer can not be cascaded, thus limits increase memory capacity.Additionally,
Not all SATA controller supports port multiplier.SAS port expander can also be used for increasing storage to be held
Amount, but allow also to some SAS link of main frame be grouped together (associating) be a port with
Increase the bandwidth between controller and port multiplier.By SAS-STP, (SAS SATA passes SAS interface
Transmission protocol) to carry SATA be possible.
In the prior art, as it is shown in figure 1, host computer or processing unit 100 support SATA and/
Or SAS as respectively with SATA storage medium device (SATA SMD) 106&110 and SAS storage medium
The device of device (SAS SMD) 108 communication.To the physical interface of SMD by SATA controller 102 or
SAS controller 104 and 105 is carried out, and each controller is communicated with SMD by serial line interface.SAS controls
Device can be with SAS SMD (such as, mutual with SAS SMD 108 SAS controller 104) and SATA
SMD (such as, the SAS controller 105 mutual with SATA SMD 110) is mutual, wherein, and SATA SMD
Supported by SAS-STP (SAS SATA host-host protocol).SATA controller is merely able to and SATA SMD
(that is, SATA controller 102 is merely able to the SATA SMD device friendship with similar SATA SMD 106 alternately
Mutually).
Alternatively, as in figure 2 it is shown, SATA controller 202 can be mutual with port multiplier 204 to be connected
To one or more SATA SMD.Equally, SAS controller 206 can with port expander 208 alternately with
It is connected to one or more SAS SMD or SATA SMD.
But, all prior art systems described above do not provide a mean for full duplex queued command interface and take out
As changing SATA and/or SAS storage medium device to increase performance, reduce main frame expense and simplify calibration and deposit
Storage media device and the system and method for system.Embodiments of the invention are to change existing system and method
Enter.
Summary of the invention
In one embodiment, the present invention provide by abstract protocol support can routing packets exchange network,
Comprising: at least one main frame；Master controller, this master controller includes Main Processor Unit, optionally leads
Memorizer and the Host Controler Interface of main-machine communication and at least one main controller controls LI(link interface)；
And at least one margin control, this margin control includes that edge treated unit, optional edge are deposited
Reservoir, controlled link by the margin control of main controller controls LI(link interface) and master controller communication and connect
Mouth and at least one the storage medium device interface communicated with at least one storage medium device, wherein,
This master controller is communicated by abstract protocol with margin control, and this abstract protocol includes supporting at least one
The full-duplex protocol of the full command queuing of individual storage medium device.
In another embodiment, the present invention provides through that abstract protocol supports can routing packets switching network
Network, including: at least one main frame；First master controller, the first master controller includes that the first main process is single
First main storage first, optional and the first Host Controler Interface of main-machine communication and at least one
One main controller controls LI(link interface)；And at least one first margin control, the first margin control
Including: the first edge treated unit, optional first marginal memory, by the first main controller controls
First margin control of LI(link interface) and the communication of the first master controller controls LI(link interface), optional
Conversion link interface, this conversion link interface and the second margin control communication are with from described first main control
Device forwards abstract protocol bag to described second margin control, and described second margin control includes the second limit
Edge processing unit, optional second marginal memory, allow described second edge treated unit and this forwarding
Second margin control of link interface communication controls LI(link interface) and leads to described second margin control
At least one second main controller controls LI(link interface) of letter；Optional second master controller, the second master control
Device processed includes the second Main Processor Unit, optional second main storage and the first edge treated unit communication
The second Host Controler Interface and at least one second master controller control of communicating with the second margin control
LI(link interface) processed；And at least one storage medium device communicated with at least one storage medium device connects
Mouthful, wherein the first and second master controllers, the first margin control and the second margin control are by abstract
Agreement communicates, and this abstract protocol includes supporting the complete of the full command queuing of at least one storage medium device
Duplex protocol.
In one embodiment, the present invention provides through abstract protocol support can routing packets exchange network,
Comprising: at least one main frame；Master controller, this master controller includes Main Processor Unit, optionally leads
Memorizer and the Host Controler Interface of main-machine communication and at least one main controller controls LI(link interface)；
And at least one margin control, this margin control includes that edge treated unit, optional edge are deposited
Reservoir, controlled link by the margin control of main controller controls LI(link interface) and master controller communication and connect
Mouthful, the sata port multiplexer that communicated with multiple first storage medium devices by SATA protocol and leading to
Cross the SAS port expander that SAS protocol communicates, wherein this main control with multiple second storage medium devices
Device is communicated by abstract protocol with margin control, and this abstract protocol supports serial ATA (SATA) simultaneously
With serial attached SCSI (SAS) storage medium device, this abstract protocol includes supporting first and second
The full-duplex protocol of the full command queuing of storage medium device.
In another embodiment, the present invention provides through abstract protocol support can routing packets exchange network,
Including: at least one main frame；Master controller, this master controller includes Main Processor Unit and main-machine communication
Host Controler Interface and at least one main controller controls LI(link interface)；And at least one edge control
Device processed, this margin control includes edge treated unit, optional marginal memory, passes through master controller
Control margin control control LI(link interface) and multiple storage medium that LI(link interface) communicates with master controller
The port multiplier of device communication, wherein this master controller is communicated by abstract protocol with margin control,
This abstract protocol includes the full-duplex protocol supporting the full command queuing of storage medium device.
In another embodiment, the present invention provides through abstract protocol support can routing packets exchange network,
Including: at least one main frame；Master controller, this master controller includes Main Processor Unit and main-machine communication
Host Controler Interface and at least one main controller controls LI(link interface)；And at least one edge control
Device processed, this margin control includes edge treated unit, optional marginal memory, passes through master controller
The margin control that control LI(link interface) communicates with master controller controls LI(link interface) and is situated between with multiple storages
The port expander of matter device communication, wherein, this master controller and margin control are come by abstract protocol
Communication, this abstract protocol includes the full-duplex protocol supporting the full command queuing of storage medium device.
Accompanying drawing explanation
The disclosure is described in detail with reference to the accompanying drawings according to one or more different examples.Merely for illustrate
Purpose provides accompanying drawing, and the example of the disclosure only described by this accompanying drawing.These accompanying drawings provided are favourable
In reader's understanding of this disclosure, it is not construed as the restriction of range of this disclosure, scope or the suitability.
It is noted that for for the sake of clear and ease of explanation, these accompanying drawings are not necessarily drawn to scale.
Fig. 1 is shown through showing of SATA, SAS or SAS-STP agreement and SATA and SAS controller communication
There is the main frame of technology.
Fig. 2 illustrates the SATA controller communicated with sata port multiplexer and and the SAS of prior art
The SAS controller of expander communication.
Fig. 3 illustrates an example of the master controller communicated with main frame and margin control of the present invention.
Fig. 4 A to 4C illustrates the various non-limiting examples of the margin control of the present invention.
Fig. 5 A and 5B illustrates the system-level overview of the non-limiting example of the master controller of the present invention, and this is main
Controller and a margin control and another margin control are mutual, this margin control and storage
Medium apparatus communicates, this another margin control and other margin control and other storage medium device
Communication.
Fig. 6 illustrate the present invention can with in sata port multiplexer, SAS port expander or
The margin control of both communication.
Detailed description of the invention
Although illustrating and describe the present invention in a preferred embodiment, but the present invention can be in many different joining
Put middle enforcement.By understanding of this disclosure, that draw in the accompanying drawings and will be described in detail herein
The preferred embodiments of the present invention should be regarded as the principle of the present invention and the model of the correlation function specification of structure thereof
Example, it is no intended to limit the present invention to shown embodiment.Those of skill in the art Ying Keshe
Think other modification of many within the scope of the invention.
It is noted that in this description, quote " embodiment " or " embodiment " means cited
Feature is comprised at least one embodiment of the present invention.It addition, be individually recited " one in this description
Individual embodiment " time, it is not necessarily intended to identical embodiment；But, common as this area
It is readily apparent that this type of embodiment is neither mutually exclusive is not different for technical staff,
Except as otherwise noted.Therefore, the present invention can comprise embodiment described herein any kind of combination and/
Or it is integrated.
The present invention carrys out simplified access SATA by utilizing an abstract SATA of full-duplex protocol and SAS protocol
With the main frame of SAS storage medium device, this full-duplex protocol supports every to either SATA or SAS
The full command queuing of individual storage medium device.The present invention includes hardware (system-framework) and software (method
-abstract protocol) both.The abstract protocol of this simplification provides the senior visit order to storage medium device.
High-level command can finally resolve the some orders at SATA or SAS interface, thus allow main frame to send and with
The order that track is less.Example therein be utilize be not SATA or SAS protocol itself support order move
Mass data.SATA or the SAS interface of storage medium device is pushed to edge, away from main frame and towards
The storage medium device that this SATA or SAS interface is supported.SAS/SATA agreement is pushed into edge simplify
Main frame/controller, this is because this main frame/controller does not realize traditional SAS/SATA agreement, it is permissible
Do the thing of optimal its application adaptive.Owing to SAS/SATA is pushed to edge and for being abstracted of main frame,
SATA and SAS can be mixed and not affect main frame (main frame is that SAS/SATA is unrelated).Even at SATA
When tunnel is by SAS (STP), main frame is currently in use SATA/STP agreement.Main frame is not usually required to behaviour
The interface protocol of storage medium device is recognized during work.Additionally, can recover storage medium device mistake (as
Retry) can be processed at the edge that storage medium device is local, thus this task is unloaded from main frame.
In the case of wishing that data replicate, it is possible in edge treated, thus unload this task from main frame.If
NCQ to be used, this unloading is probably important for SATA, because if it is any remaining to make a mistake
Queuing read or write order and will be refreshed, thus need to re-emit these orders.Abstract protocol is supported
Flow control between main frame and edge.Due to SATA and SAS differentiation process flow control, this storage
Medium apparatus flow control is processed at edge, and without increasing the weight of the burden of main frame.
This abstract protocol be centered by performance and support storage medium device pond the most senior
Write access, the most each storage medium device can have SATA or SAS interface.This abstract protocol is
Link is unrelated, and can be carried by multiple direct attachments or networking interface, and this is directly attached or joins
Network interface is including but not limited to PCIe interface, Ethernet (such as, 1GbE, 10GbE, 40GbE or 100GbE)
Interface, Infiniband (Infiniband) interface, USB interface, thunder and lightning (ThunderBolt) interface,
Fire wall (Firewire) interface and/or custom interface.This abstract protocol link bandwidth need not with individually
SATA or the SAS interface of storage medium device is correlated with.It is written into the data of storage medium device and from storage
The data that medium apparatus reads can be pushed by source or can be drawn by destination.Such as, it is Ethernet at link
Time, in the case of writes, generally it is still further preferred that send blocks of data together with order bag, (push away reading
Send) in the case of, send blocks of data together with respond packet and be typically optimal.When link is PCIe,
When being ready to perform order or receive (introducing) response, individually retrieve block from the order sent or response
Data are typically optimal.
This abstract protocol supports packet switch route structure and Fault recovery.Route can logic-based address,
WWN (WWW number-unique World Wide ID number) or physical address.Logical address or WWN can be mapped
To physical address (such as, passing through look-up table).This mapping can be inserted at storage medium device (i)
System or remove from system and/or (ii) energising or be either statically or dynamically updated based on recovery process during power-off.
As it is shown on figure 3, master controller 304 comprises (i) one or more Main Processor Unit 306, it is held
The process of the master of row abstract protocol is also communicated with at least one main frame 302 by Host Controler Interface 308,
This Host Controler Interface is connected to main frame 302, and (ii) one or more control by host link 320
LI(link interface) 310 to 312 processed, these one or more control LI(link interface) 310-312 are by controlling link
320 communicate with one or more margin controls 316 to 318 with 322.Master controller 304 can be optional
Ground has the main storage 314 of their own, and this main storage 314 is by being included in for processing, buffer, arranging
Teams etc. use in interior function.Main storage 314 can at master controller 304 interiorly or exteriorly host
Reservoir 314 includes SRAM, DRAM, RLDRAM, FLASH or combinations thereof.Main frame 302, main control
Device 304 formed together with margin control 316-318 by abstract protocol support can routing packets switching network
Network.(such as, one or more main frames, master controller and/or margin control are present in Same Physical device
Field programmable gate array (FPGA) or special IC (ASIC) or different any combination of dresses
Put) it is possible.Available directly addressable memory interface, USB (universal serial bus) (USB), ether
Net, high-speed peripheral assembly interconnection (PCIe), Infiniband (Infiniband), thunder and lightning, fire wall and/
Or other is public or customization interconnection technique realizes host link 320.Also can be with directly addressable memorizer
Interface, USB, Ethernet, PCIe, Infiniband, thunder and lightning, fire wall and/or other public or customization
Interconnection technique realizes controlling link 320 and () 322.Main frame can be realized by different interconnection techniques
Link 320 and control in link 320&322 each, these interconnection techniques are not necessarily identical.Such as,
Available PCI e realizes host link 320, and can realize controlling link 320 He with 10Gb Ethernet
322。
Fig. 4 A depicts the non-limiting example of margin control.Margin control 402 comprises (i)
Individual or multiple edge treated unit 404, it performs the process of edge side of abstract protocol and passes through Quality Initiative
Road interface 410 communicates with one or more master controllers 406 and 408 with 412, this control LI(link interface)
410 communicate with master controller 406 and 408 with 416 by controlling link 414 with 412；(ii) one
Or multiple SMD interface 418 and 420, its by SATA and/or SAS link 426 and 428 and one or
Multiple SMD 422 communicate with 424；(iii) alternatively, one or more conversion link interfaces 430 lead to
Crossing control link 448 to communicate with other margin control 432, this control link 448 is for from (passing through
(control LI(link interface) 410 and 412 is not specified for receiving these and takes out to control LI(link interface) 410 and 412
Margin control 402 as protocol package) receive) master controller 406 or 408 is to other edge controller
432 forward these abstract protocol bags；And (iv) is alternatively, one or more master controller 434 Hes
436, it wishes to initiate abstract protocol to other margin control 438 and 440 at edge treated unit 404
Communicate with other margin control 438 and 440 during message.Conversion link interface 430 is in some embodiment
In can be functionally equivalent to control LI(link interface) 410 and 412.Margin control 402 can have alternatively
Have the marginal memory 446 of their own, this marginal memory by being included in for processing, buffering, queuing etc.
In function use.Marginal memory 446 can at margin control 402 interiorly or exteriorly, this edge
Memorizer 446 includes SRAM, DRAM, RLDRAM, flash memory (FLASH) or combinations thereof.
When the margin control that physical location is close allows to share identical marginal memory, the control of the plurality of edge
Identical marginal memory shared by device processed is possible.In the close master controller of physical location and edge control
When device processed allows combination, marginal memory and the main storage being associated with master controller are combined into one
Memorizer is also possible.
Fig. 4 B describes to serve as another non-limiting example of the margin control of forwarding/route device.Edge
Controller 474 comprises (i) one or more edge treated unit 460, and it performs the edge of abstract protocol
The process of side by controlling LI(link interface) 456 and 458 and one or more master controllers 448 and 450
Communication, this control LI(link interface) 456 and 458 is by controlling link 452 and 454 and master controller 448
Communicate with 450；And (ii) one or more master controller 462 and 468, these one or more master controls
Device 462 and 468 processed wishes to initiate to other margin control 466 and 472 at edge treated unit 460
Communicated with other margin control 466 and 472 with 472 by control link 464 during abstract protocol message.
It is noted that in this embodiment, margin control 474 serves as forwarding/route device, because not existing even
It is connected to the storage medium device of this margin control.Margin control 474 can have their own alternatively
Marginal memory 476, this marginal memory 476 is by being included in for processing, buffering, in queuing etc.
Function uses.Marginal memory 476 can at margin control 474 interiorly or exteriorly, and this edge stores
Device 476 includes SRAM, DRAM, RLDRAM, flash memory or combinations thereof.Connect at physical location
When near margin control allows to share identical marginal memory, multiple margin controls are shared identical
Marginal memory is possible.When the close master controller of physical location and margin control allow combination,
It is also possible that marginal memory and the main storage that is associated with master controller are combined into a memorizer.
Fig. 4 C describes another non-limiting example of margin control, and this margin control is shown in Fig. 4 A
The modification of margin control.Margin control 402' comprises (i) one or more edge treated unit
404 ', its perform abstract protocol edge side process and by control LI(link interface) 410 ' and 412 ' and
Individual or multiple master controller 406' with 408' communicate, and this control LI(link interface) 410 ' and 412' passes through Quality Initiative
Road 414' and 416 ' communicates with master controller 406' and 408'；(ii) one or more SMD interfaces 418 '
With 420 ', it is by SATA and/or SAS link 426' and 428 ' and one or more SMD 422' and 424 '
Communication；(iii) alternatively, one or more conversion link interfaces 430 ', it is by controlling link 448 '
Communicating with other edge controller 432', this control link 448' is for from (by controlling LI(link interface) 410 '
(control LI(link interface) 410' and 412' with 412 ' and be not specified for receiving the edge of these abstract protocol bags
Controller 402 ') receive) master controller 406' or 408 ' forwards these to other edge controller 432'
Abstract protocol bag；And (iv) is alternatively, one or more master controller 434' and 436 ', at edge
Processing unit 404' wishes when abstract protocol message initiated by margin control 432 ' and/or 440 ', main control
Device 434' is by controlling link 442 ' and communicate with margin control 432 ' and master controller 436 ' passing through
Control link 444' to communicate with margin control 440'.Conversion link interface 430' in certain embodiments may be used
To be functionally equivalent to control LI(link interface) 410' and 412 '.Margin control 402 ' can have alternatively
The marginal memory 446 ' of their own, this marginal memory 446 ' is by being included in for processing, buffer, arranging
Function in team etc. uses.Marginal memory 446 ' can at margin control 402 ' interiorly or exteriorly, limit
Edge memorizer 446' includes SRAM, DRAM, RLDRAM, flash memory or combinations thereof.At physics
When the margin control being closely located to allows to share identical marginal memory, multiple margin controls are shared
Identical marginal memory is possible.Allow at the close master controller of physical location and margin control
During this combination, marginal memory and the main storage being associated with master controller are combined into a storage
Device is possible.For simplicity, control link 448' and 442' to be illustrated as being each attached to edge control
Device 432 ' processed, but, control link 448' and control link 442 ' can be combined into margin control 432 '
Single connection (such as, mix or be multiplexed together).
In an embodiment as shown in Figure 5A, master controller 502 is respectively by controlling link 508 He
510 communicate with one or more margin controls 504 and 506.Margin control 504 is according to the class of SMD
Type (that is, SATA or SAS) is by SATA and/or SAS link 516 and 518 and multiple SMD 512
To 514 communications.Margin control 506 communicates and root with two other margin controls 528 and 530
According to the type (that is, SATA or SAS) of SMD via SATA and/or SAS link 524 and 526 with many
Individual SMD 520 to 522 communicates.Margin control 528 is by conversion link interface 532 and controls link
534 communicate with margin control 506.In the case, the abstract protocol Bao Ji of autonomous controller 502 is carried out
Can be forwarded or act on behalf of to other edge controller 528 in some standard, including but not limited to being forwarded or generation
Reason is not in broadcast or the destination of margin control 506 this locality.Other edge controller 530 is by main
Controller 536 communicates with margin control 506 with controlling link 538.In the case, Edge position control
Device 506 can provide abstract protocol order, in abstract protocol order, needs at margin control 506
Wanting some actions, and need some actions at different margin controls 530, this comprises abstract association
View order is separated into multiple abstract protocol order, and each abstract protocol order is specified for one or more
Other margin control 530.Margin control 528 leads to according to the type (that is, SATA or SAS) of SMD
Cross SATA and/or SAS link 544 to communicate with multiple SMD 540 and 542 with 546.Margin control
530 pass through SATA and/or SAS link 550 and 552 according to the type (that is, SATA or SAS) of SMD
Communicate with multiple SMD 548 and 549.Multiple control links 508,510,534 can be with identical with 538
Or different interconnection techniques realizes, this interconnection technique connects including but not limited to directly addressable memorizer
Mouth, USB, Ethernet, PCIe, Infiniband (Infiniband), thunder and lightning and/or fire wall.At certain
In the case of Xie, such as in the case of Ethernet, each control link 508,510,534 and/or 538 can
To be identical network.
In another embodiment as shown in Figure 5 B, master controller 502 is respectively by controlling link 508 '
Communicate with one or more margin control 504' and 506' with 510'.Margin control 504' is according to SMD
Type (that is, SATA or SAS) by SATA and/or SAS link 516 ' and 518' and multiple SMD 512 '
Communicate to 514'.Margin control 506' and two other margin controls 528 ' and 530' communicate and root
SATA and/or SAS link 524' and 526' is passed through with many according to the type (that is, SATA or SAS) of SMD
Individual SMD 520' to 522 ' communicates.Margin control 528 ' is by conversion link interface 532' and controls link
534' communicates with margin control 506'.In the case, the abstract protocol bag of autonomous controller 502 ' is carried out
Can be forwarded or act on behalf of based on some standard to other edge controller 528 ', this standard including but not limited to
Not in broadcast or the destination of margin control 506 ' this locality.Margin control 506' passes through master controller 536 '
Communicate with margin control 528' with controlling link 538'.Margin control 506' can provide abstract association
View order, in abstract protocol order, needs some actions at margin control 506', and in difference
Margin control 528 ' need some actions, this comprises abstract protocol order is separated into multiple abstract association
View order, each abstract protocol order is specified at least one other margin control 528 '.Limit
Edge controller 528 ' passes through SATA and/or SAS link according to the type (that is, SATA or SAS) of SMD
544', 546 ', 550' or 552 ' and multiple SMD 540 ', 542 ', 548' and 549' communicate.Multiple controls
Link 508 ', 510 ', 534' and 538' can realize by identical or different interconnection technique, this interconnection technique
Including but not limited to directly addressable memory interface, USB, Ethernet, PCIe, Infiniband, thunder
Electricity and/or fire wall.In some cases, such as Ethernet, each control link 508 ', 510 ', 534 '
And/or 538' can be identical network.For simplicity, control link 534' and 538 ' to be illustrated as each
Be connected to margin control 528 ', but, control link 534' and control link 538' can be combined into
The single connection (such as, mix or be multiplexed together) of margin control 528 '.
In another embodiment as shown in Figure 6, margin control 602 and SAS port expander 606
Communication, this margin control then with one or more SAS and or SATA SMD 616-620 communicate.Limit
Edge controller 602 also can be communicated with sata port multiplexer 604 by SATA link 608, this edge
Controller then communicates with one or more SATA SMD 612-614.
Although Fig. 6 describes both port multiplier 604 and port expander 606, it is to be understood that only
The embodiment of ports having multiplexer and only port expander is within the scope of the invention.
Such as, in one embodiment, the present invention provides and can routing packets be exchanged by what abstract protocol was supported
Network, this can include by routing packets exchange network: at least one main frame；Master controller, this master controller
Including Main Processor Unit, optional main storage and the Host Controler Interface and at least of main-machine communication
Individual main controller controls LI(link interface)；And at least one margin control, this margin control includes limit
Edge processing unit, optional marginal memory, led to by main controller controls LI(link interface) and master controller
The margin control of letter controls the port multiplier that LI(link interface) communicates with multiple storage medium devices, its
In, this master controller is communicated by abstract protocol with margin control, and this abstract protocol includes that support is deposited
The full-duplex protocol of the full command queuing of storage media device.
In another embodiment, the present invention provides through abstract protocol support can routing packets exchange network,
This can include by routing packets exchange network: at least one main frame；Master controller, this master controller includes main
Processing unit, optional main storage and the Host Controler Interface of main-machine communication and at least one master control
Device processed controls LI(link interface)；And at least one margin control, this margin control includes edge treated
Unit, optional marginal memory, the limit that communicated with master controller by main controller controls LI(link interface)
Edge controller control LI(link interface) and the port expander communicated with multiple storage medium devices, wherein,
This master controller is communicated by abstract protocol with margin control, and this abstract protocol includes supporting that storage is situated between
The full-duplex protocol of the full command queuing of matter device.
For simplicity, this system is described as be in cabinet, it should be recognized that whole system is not
In needing to be co-located at a cabinet or be co-located at a physical locations, this is because one or more
Individual cells can be positioned as a part for different cabinet/position.
Features described above and application may be implemented as being specifically designated as record at computer-readable recording medium
The software process of one group of instruction on (also referred to as computer-readable medium).In these instructions by one
Or multiple processing unit (such as, one or more processors, processor core or other processing unit)
During execution, these instructions cause (multiple) processing unit to complete the action of instruction in this instruction.At this
Embodiment in scope of disclosure also can comprise tangible and/or non-transitory computer-readable storage media, its
For carrying or there is the computer executable instructions or data structure being stored therein in.This type of non-transitory
Machinable medium can be (to comprise the merit of any application specific processor by universal or special computer
Can design) accessible any usable medium.In the way of this example, this type of non-transitory computer can
Reading medium can be including but not limited to flash memories, RAM, ROM, EEPROM, CD-ROM or other light
Disk storage, disk storage or other magnetic storage device, or may be used for computer executable instructions,
Data structure or processor chips design form carry or store intended program code devices any its
Its medium.This computer-readable medium does not comprise the carrier wave and electronics transmitted wirelessly or by wired connection
Signal.
Computer executable instructions comprise such as make general purpose computer, special-purpose computer or dedicated processes dress
Specific function or the instruction and data of function group are put.Computer executable instructions also comprise by independent or
The program module that computer in network environment performs.In general, program module has comprised concrete appointing
It is engaged in or realizes the routine of concrete abstract data type, program, assembly, data structure, object and special place
Function etc. intrinsic in the design of reason device.Computer executable instructions, the data structure of association and program mould
Block represents the example of the program code devices of the step for performing method disclosed herein.This type of can perform
The particular order of data structure of instruction or association represents for realizing function described in this type of step
The example of respective action.
Computer program (also referred to as program, software, software application, script or code) can be to appoint
The programming language of what form is write, and this programming language comprises compiling or interpretative code, illustrative or process language
Speech, and this computer program can be to comprise the stand-alone program be applicable to computing environment or module, group
Any form of part, subroutine, object or other unit is disposed.Computer program may correspond to file system
File in system but the most corresponding.Program can be stored in other program of holding or the file of data
A part in (the one or more scripts such as, being stored in marking language document), be stored in special
In the single file of the program discussed or be stored in multiple coordination file (such as, storage one or
The file of multiple modules, subprogram or partial code) in.Computer program can be deployed as at one
Performing on computer or multiple computer, the plurality of computer bit is in the three unities or is distributed in multiple place
And pass through interconnection of telecommunication network.
These above-mentioned functions can be implemented in Fundamental Digital Circuit, computer software, firmware or hardware
In.One or more computer program can be used to realize this technology.This process and logic flow
Can perform by one or more programmable processors and by one or more Programmable Logic Device.Logical
With and dedicated computing device and storage device can pass through interconnection of telecommunication network.
Some embodiments comprise electronic unit such as microprocessor, are situated between at machine readable or computer-readable
Matter (is alternatively referred to as computer-readable recording medium, machine readable media or machinable medium)
The storage of middle storage computer program instructions and memorizer.Some example bags of this type of computer-readable medium
Containing RAM, ROM, read-only optical disc (CD-ROM), imprint CDs (CD-R), erasable optical disk (CD-RW),
Read-only digital universal disc (such as, DVD-ROM, DVD-dual layer-ROM), various can imprinting/erasable DVD
(such as, DVD-RAM, DVD-RW, DVD+RW etc.), flash memories (such as, SD card, mini SD
Card, small-sized SD card etc.), magnetic or solid-state hard drive, read-only can imprinting Blu-ray Disc, ultra dense degree
CD, any other optically or magnetically medium and floppy disk.Computer-readable medium can store can be by extremely
The computer program that a few processing unit performs and comprises instruction set for performing various operation.Calculate
The example of machine program or computer code comprises the machine code such as produced and comprising by compiler to be made
With compiler by computer, electronic unit or the file of the code of the higher level of microprocessor execution.
Although above discussion relates generally to perform the microprocessor of software or polycaryon processor, but some
Embodiment is by one or more integrated circuits such as special IC (ASIC) or field programmable gate
Array (FPGA) performs.In some embodiments, this adhesive integrated circuit perform be stored on this circuit/
The instruction that self is interior.In some embodiments, FPGA, software is such as utilized to can be used for describing hardware
Circuit, the example of this software is that FPGA programs file.This type of FPGA programming file also can comprise computer
Program, machine code, microcode, firmware and other software.FPGA programming file can be stored in FPGA,
In ASIC, computer-readable recording medium, machine readable media or machinable medium.
As used in any claim of this specification and the application, term " computer ", " clothes
Business device ", " processor " and " memorizer " all referring to electronics or other technique device.These terms
Do not include people or crowd.For the purpose this specification, term display or display mean at electronic installation
Upper display.As used in any claim of this specification and the application, " computer can for term
Read medium " and " computer-readable medium " be wholly constrained to store information with computer-readable form
Tangible material object.These terms do not include any wireless signal, the signal of wired download and any other is of short duration
Signal.
It will be recognized by those skilled in the art that the other embodiments of the disclosure can have many classes
Implementing in the network computing environment of type computer system configurations, this computer system configurations comprises individual calculus
Machine, hand-held device, multicomputer system, system based on ASIC, system based on FPGA, based on
Microprocessor or programmable consumer electronics, network PC, minicomputer, mainframe computer etc..Real
Execute example also can implement in a distributed computing environment, wherein, performed by local and remote processing means
Task, this local and remote device by communication network (or by hard wired links, wireless link or logical
Cross the combination of this hard wired links or wireless link) link.In a distributed computing environment, program module
Can be positioned in this locality and distant memory storage device.
Should be understood that any particular order during being discussed or classification step are the examples of exemplary method
Card.Should be understood that, based on designing preferably requirement, particular order or classification step in this process can be weighed
Institute shown by new arrangement or execution is in steps.Some steps of this step can perform simultaneously.Such as, exist
In some cases, multitask and parallel processing are probably favourable.Additionally, various systems illustrated above
The separation of assembly is understood not to need this type of to separate, and it will be appreciated that described program assembly and be
System generally can be integrated together into single software product or be encapsulated in multiple software product.
Various amendments in terms of these be will be apparent from, and generic principles defined herein can be answered
For other side.Therefore, claim is not intended to be limited to aspects shown herein, but quilt
Give the four corner consistent with language claims, wherein, when with singular reference element, not purport
Should be " one or more ", unless stated otherwise meaning " one and only one of which ".Remove
Non-other special instruction, term " some " refers to one or more.Male pronoun (such as, he)
Including women and neutral (such as, his and it), and vice versa.If any, title and
Subtitle only merely for conveniently using, is not limiting as this technical theme.
Phrase, such as " aspect " do not imply that this aspect is that this technical theme is requisite, or the party
Face is applied to all configurations of this technical theme.Relate to the disclosure of aspect and can be applicable to all configurations or one
Or multiple configuration.Phrase, such as aspect can refer to one or more aspect, and vice versa.Phrase,
Such as " configure " that not imply that this is configured to this technical theme requisite, or this configuration is applied to this
All configurations of technical theme.The disclosure relating to configuration can be applicable to all configurations or one or more configuration.
Phrase, such as configuration can refer to one or more configuration, and vice versa.
Above-mentioned various embodiments provide only by means of illustration, and should not limit the scope of the present disclosure.
Those skilled in the art should be it is readily appreciated that can carry out various change to the principles described herein and change
Become, and without following example embodiment illustrated and described herein and application and without departing from the disclosure
Spirit and scope.
Although this specification comprises many detailed description of the invention details, but these embodiment details should not
Constitute scope or the restriction of claimed scope of any invention, but constitute and may specify to specific invention
The description of feature of specific embodiment.Certain described under the background of individual embodiment in this manual
A little features also can realize in conjunction with single embodiment.On the contrary, describe in the context of a single embodiment is each
Planting feature can also be real in the multiple embodiments provided in independent mode or in any suitable sub-portfolio
Existing.Although additionally, above-mentioned feature can be described as be in some combination and work even that inception requirements is such as
This, but in some cases, the one or more features from claimed combination can be from this combination
Implement, and claimed combination can relate to the modification of sub-portfolio or sub-portfolio.
Simultaneously, although each operation describes the most in a particular order, but should not be construed as needing this
Generic operation performs with shown particular order or consecutive order, or the operation all illustrated is performed to realize
Desired result.In some cases, multitask and parallel processing are probably favourable.On additionally,
The most separate various system components stated should not be construed as needing in all embodiments this type of
Separate, and it will be appreciated that described program assembly and system generally can be integrated together into single software
Product or be encapsulated in multiple software product.
As mentioned above, it has been described that the specific embodiment of this theme, but other embodiments is in Rights attached thereto
In the range of requirement.Such as, the behavior quoted in the dependent claims can be executed in different order
And still realize required result.Such as, the process drawn in the accompanying drawings it is not absolutely required to shown
Particular order or consecutive order realize required result.In some embodiments, multitask is with parallel
Process is probably favourable.
Conclusion
Have shown that in the above embodiments for effectively implementing for being taken out by full duplex queued command interface
As changing SATA and/or SAS storage medium device to increase performance, reduce main frame expense and simplify calibration and deposit
The system and method for the system and method for storage media device and system.Although being shown and described herein various excellent
Select embodiment, it should be understood that, it is no intended to limit the present invention to this disclosure, but be intended to
Enter all modifications in the spirit and scope of the present invention, as defined in the dependent claims.Such as,
The present invention should not limited by software/program, computing environment or specific computing hardware.
Claims (20)
1. by abstract protocol support can a routing packets exchange network, comprising:
At least one main frame；
Master controller, described master controller includes that Main Processor Unit connects with the master controller of described main-machine communication
Mouth and at least one main controller controls LI(link interface)；And
At least one margin control, described margin control includes edge treated unit, by described master control
Device processed control LI(link interface) communicate with described master controller margin control control LI(link interface) and with at least
At least one storage medium device interface of one storage medium device communication,
Wherein said master controller is communicated by described abstract protocol with described margin control, described abstract association
View includes the full-duplex protocol supporting the full command queuing of at least one storage medium device described.
The most according to claim 1 can routing packets exchange network, wherein said abstract protocol props up simultaneously
Hold serial ATA i.e. SATA and serial attached SCSI i.e. SAS storage medium device.
The most according to claim 2 can routing packets exchange network, wherein sent by described master controller
Single high-level command resolve to one or more SATA command and one or more SAS order.
The most according to claim 1 can routing packets exchange network, wherein said abstract protocol support string
Row ATA i.e. SATA.
The most according to claim 4 can routing packets exchange network, wherein sent by described master controller
Single high-level command resolve to one or more SATA command.
The most according to claim 1 can routing packets exchange network, wherein said abstract protocol support string
Row attachment SCSI i.e. SAS.
The most according to claim 6 can routing packets exchange network, wherein sent by described master controller
Single high-level command resolve to one or more SAS order.
The most according to claim 1 can routing packets exchange network, wherein in described master controller and institute
State the route between margin control based on any one in following: logical address, WWW number i.e. WWN
Or physical address.
The most according to claim 8 can routing packets exchange network, wherein in described master controller and institute
State the route between margin control based on the described logical address being mapped to described physical address.
The most according to claim 9 can routing packets exchange network, wherein at storage medium device quilt
A () inserts；B () removes；C () is energized；Or during (d) power-off, at described logical address and described thing
Mapping between reason address is dynamically updated based on recovery process.
11. according to claim 8 can routing packets exchange network, wherein at described master controller and
Route between described margin control is based on the described WWN being mapped to described physical address.
12. according to claim 11 can routing packets exchange network, wherein at storage medium device quilt
A () inserts；B () removes；C () is energized；Or during (d) power-off, described WWN and described physically
Mapping between location dynamically updates based on recovery process.
13. according to claim 1 can routing packets exchange network, wherein said margin control enters
One step includes at least one other master controller, in the described edge treated being associated with described margin control
When unit initiates the abstract protocol message being intended for other margin control, at least one other master control described
Device processed communicates with at least one other margin control further.
14. according to claim 1 can routing packets exchange network, wherein said margin control enters
One step includes at least one conversion link interface, at least one conversion link interface described and at least one other
Margin control communication also forwards abstract protocol packet from described master controller to other margin control.
15. according to claim 1 can routing packets exchange network, wherein said master controller and extremely
A few margin control is implemented in a physical unit, described physical unit be following in any one:
Field programmable gate array i.e. FPGA or special IC i.e. ASIC.
16. according to claim 1 can routing packets exchange network, wherein said Host Controler Interface
By any one in following interface and described main-machine communication: directly addressable memory interface, USB,
PCIe, Ethernet, Infiniband, thunder and lightning or fire wall.
17. 1 kinds by abstract protocol support can routing packets exchange network, comprising:
At least one main frame；
First master controller, described first master controller includes the first Main Processor Unit and described main-machine communication
The first Host Controler Interface and at least one the first main controller controls LI(link interface)；And
At least one first margin control, described first margin control includes:
First edge treated unit,
First margin control controls LI(link interface), and described first margin control controls LI(link interface) and passes through
Described first main controller controls LI(link interface) and described first master controller communication,
Second master controller, described second master controller includes the second Main Processor Unit and described first limit
Second Host Controler Interface of edge processing unit communication and communicate with the second margin control at least one the
Two main controller controls LI(link interface)s, described second margin control include the second edge treated unit, second
Margin control controls LI(link interface), and described second margin control controls LI(link interface) and allows described second limit
Edge processing unit and described second master controller communication；And
At least one the storage medium device interface communicated with at least one storage medium device,
Wherein said first master controller and the second master controller, described first margin control and the second edge
Controller is communicated by described abstract protocol, and described abstract protocol includes supporting at least one storage medium described
The full-duplex protocol of the full command queuing of device.
18. according to claim 17 can routing packets exchange network, wherein said first Edge position control
Device farther includes conversion link interface and at least one second master communicated with described second margin control
Controller controls LI(link interface), and described conversion link interface and described second margin control communication are with from described
First master controller forwards abstract protocol packet to described second margin control.
19. according to claim 17 can routing packets exchange network, wherein sent out by described master controller
The single high-level command gone out resolves to one or more SATA command.
20. according to claim 17 can routing packets exchange network, wherein sent out by described master controller
The single high-level command gone out resolves to one or more SAS order.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/099,830 | 2013-12-06 | ||
| US14/099,833 | 2013-12-06 | ||
| US14/099,830 US9582455B2 (en) | 2013-12-06 | 2013-12-06 | System and method for abstracting SATA and/or SAS storage media devices via a full duplex queued command interface to increase performance, lower host overhead, and simplify scaling storage media devices and systems |
| US14/099,833 US9529767B2 (en) | 2013-12-06 | 2013-12-06 | System and method for abstracting SATA and/or SAS storage media devices via a full duplex queued command interface to increase performance, lower host overhead, and simplify scaling storage media devices and systems |
| PCT/US2014/069149 WO2015085315A1 (en) | 2013-12-06 | 2014-12-08 | A system and method for abstracting storage media devices via a full duplex queued command interface |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105981001A true CN105981001A (en) | 2016-09-28 |
| CN105981001B CN105981001B (en) | 2020-06-02 |
Family
ID=53274215
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480075072.0A Expired - Fee Related CN105981001B (en) | 2013-12-06 | 2014-12-08 | System and method for abstracting storage media device through full-duplex queued command interface |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP3077915A4 (en) |
| CN (1) | CN105981001B (en) |
| WO (1) | WO2015085315A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110941580A (en) * | 2019-10-31 | 2020-03-31 | 苏州浪潮智能科技有限公司 | Method for reading information and serial small computer system interface SAS expander |
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| US20050182874A1 (en) * | 2003-02-28 | 2005-08-18 | Herz John P. | Disk array controller and system with automated detection and control of both ATA and SCSI disk drives |
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| US20120324137A1 (en) * | 2010-07-23 | 2012-12-20 | International Business Machines Corporation | Expander to control multipaths in a storage network |
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| US7574540B2 (en) * | 2006-01-03 | 2009-08-11 | Emc Corporation | Managing management controller communications |
| JP5395075B2 (en) * | 2008-07-22 | 2014-01-22 | パナソニック株式会社 | COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND COMMUNICATION METHOD |
| US8244937B2 (en) * | 2008-09-30 | 2012-08-14 | Micron Technology, Inc. | Solid state storage device controller with parallel operation mode |
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2014
- 2014-12-08 WO PCT/US2014/069149 patent/WO2015085315A1/en active Application Filing
- 2014-12-08 EP EP14867130.8A patent/EP3077915A4/en not_active Withdrawn
- 2014-12-08 CN CN201480075072.0A patent/CN105981001B/en not_active Expired - Fee Related
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| US20050182874A1 (en) * | 2003-02-28 | 2005-08-18 | Herz John P. | Disk array controller and system with automated detection and control of both ATA and SCSI disk drives |
| US20080022026A1 (en) * | 2006-07-21 | 2008-01-24 | Emulex Design & Manufacturing Corporation | Lock and release mechanism for out-of-order frame prevention and support of native command queueing in FC-SATA |
| CN101517541A (en) * | 2006-10-10 | 2009-08-26 | Lsi公司 | System and method for connecting SAS RAID controller device channels across redundant storage subsystems |
| US20120324137A1 (en) * | 2010-07-23 | 2012-12-20 | International Business Machines Corporation | Expander to control multipaths in a storage network |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110941580A (en) * | 2019-10-31 | 2020-03-31 | 苏州浪潮智能科技有限公司 | Method for reading information and serial small computer system interface SAS expander |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3077915A1 (en) | 2016-10-12 |
| CN105981001B (en) | 2020-06-02 |
| WO2015085315A1 (en) | 2015-06-11 |
| EP3077915A4 (en) | 2017-08-16 |
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