CN105974365A - Universal processing platform for radar signals - Google Patents
Universal processing platform for radar signals Download PDFInfo
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- CN105974365A CN105974365A CN201610169393.8A CN201610169393A CN105974365A CN 105974365 A CN105974365 A CN 105974365A CN 201610169393 A CN201610169393 A CN 201610169393A CN 105974365 A CN105974365 A CN 105974365A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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- Radar, Positioning & Navigation (AREA)
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- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The invention relates to a universal processing platform for radar signals, and belongs to the technical field of radar signal processing equipment. The universal processing platform is composed of a communication board, a processing board and the like, and is characterized in that the communication board, a timing board, an interface board I, an interface board II, the processing board, a signal source board are installed inside a case through a socket, and interfaces, which are respectively adaptive to the communication board, the timing board, the processing board and the signal source board are installed outside the case through the interface board I and the interface board II; and the communication board is provided with a man-machine operation interface. The universal processing platform realizes signal processing and monitoring integrated management, and is high in integration level; and the case supports various interfaces such as an optical fiber interface, a network interface and an RS422 interface, and the compatibility is good. The unified architecture and programming language improve the maintainability and the expansibility of a system. Universal hardware is high in adaptability, complete self-checking functions and test points are provided, the man-machine operation interface is user-friendly, and follow-up upgrading and reconstruction are facilitated. The universal processing platform solves problems in the prior art that interfaces and plug-ins are single in type and function, detection of built-in self-checking equipment is low in coverage rate, and the man-machine operation interface is not provided.
Description
Technical field
The present invention relates to a kind of radar signal general processing platform, belong to Radar Signal Processing Equipment technical field.
Background technology
Signal processing platform is the core component of modern radar, and its service behaviour directly affects the detection power of radar.In traditional design, signal processing platform is divided by function and designs hardware, and external interface kind is single, lacks system and plug-in unit test interface, and does not has man machine operation interface.This design structure the most greatly constrains the overall performance of radar, and brings difficulty to follow-up upgrading.Therefore, research and develop and a possess operation interface and multiple types interface, facilitate system and plug-in unit test, the beneficially high performance general signal processing platform of upgrading, to improving radar complete machine Development Level and service behaviour is significant, it is necessary.
Summary of the invention
It is an object of the invention to: providing one to use universal hardware, suitability is strong, and interface type enriches, possess perfect self-checking function and test point, and man machine operation interface is friendly, the beneficially radar signal general processing platform of upgrading；Solving prior-art interface, plug-in unit kind and function singleness, built-in test equipment detection coverage rate is low, and the problem at unmanned plane operation interface.
The present invention is to realize above-mentioned purpose by the following technical solutions:
This radar signal general processing platform is made up of communication board, timing plate, interface board I, interface board II, process plate, signal source board, cabinet, it is characterized in that: communication board, timing plate, interface board I, interface board II are installed by socket, process plate, signal source board, working power assembly in cabinet, casing is provided with the interface adaptive one by one with communication board, timing plate, process plate, signal source board by interface board I, interface board II；Man machine operation interface it is provided with on communication board；
Communication board includes nucleus module, FPGA embedded type control module, man machine operation interface；
Process plate and include FPGA embedded type control module, DSP；
Timing plate is made up of FPGA embedded type control module, and FPGA embedded type control module includes controlling message submodule, clock signal submodule, the ultimate output sub-module of signal；
Interface board I includes FPGA embedded type control module, optical fiber interface, opto-electronic conversion submodule, data distribution/processing unit；
Interface board II includes FPGA embedded type control module, optical fiber interface, one group of 32 bit data acquisition interface；
Signal source board includes FPGA embedded type control module, FLASH memory, optical fiber interface.
The nucleus module of described communication board is for grinding China's system core module；Standard operation system software kit can be reduced, it is ensured that man machine operation interface properly functioning according to man machine operation interface function；The man machine operation interface of communication board uses C++Builder
XE6 too development, runs on XPE operating system, with the transmitting-receiving typing instruction of RS232 serial port form and status information.
Described process plate includes FPGA embedded type control module, DSP, being its main operational unit, DSP carries out pulse compression, Beam synthesis, clutter recognition, pitch angle measurement, azimuth determination computing to pending data.
Described timing plate is by controlling the various control messages needed for the normal work of message submodule decoding；Communication board, timing plate, interface board I, interface board II are provided by clock signal submodule, process the clock signal needed for plate, signal source board work；Signal is finally processed by the output of signal ultimate output sub-module.
Described interface board I is at least provided with six optical fiber interfaces, and interface board I is first order signal processing unit, completes opto-electronic conversion by opto-electronic conversion submodule；By data distribution/processing unit, the pending data of input are distributed to each processing unit.
Described interface board II is at least provided with two optical fiber interfaces and one group of 32 bit data acquisition interface, forward and cache intermediate object program during signal processing platform work, meanwhile, by optical fiber interface and the duty of 32 bit data acquisition interface monitor signals in real time processing platforms.
Described signal source board is at least provided with an optical fiber interface, with optical fiber interface, the test data stored in FLASH memory is sent to interface board I, the most normal for detecting the performance state of signal processing platform of the present invention.
The present invention having the beneficial effects that compared with prior art:
This radar signal general processing platform builds a complete general signal processing platform by communication board, timing plate, interface board I, interface board II, process plate, signal source board and cabinet, realize the integrated management of signal processing and monitoring, improve the integrated level of system, convenient operation.The multiple interfaces forms such as optical fiber, network interface, RS422 supported by cabinet, improve the compatibility of system.Software design takes unified shader and programming language, improves maintainability and the autgmentability of system.Using universal hardware, suitability is strong, and interface type enriches, and possesses perfect self-checking function and test point, and man machine operation interface is friendly, and beneficially subsequent upgrade transformation effectively reduces development difficulty and the cost of signal processing system.Thoroughly solving prior-art interface, plug-in unit kind and function singleness, built-in test equipment detection coverage rate is low, and the problem at unmanned plane operation interface.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of a kind of radar signal general processing platform；
Fig. 2 is the structural representation processing plate；
Fig. 3 is the man machine operation interface schematic diagram of a kind of radar signal general processing platform.
In figure: 1, communication board, 2, timing plate, 3, interface board I, 4, interface board II, 5, process plate, 6, signal source board, 7, cabinet.
Detailed description of the invention
Below in conjunction with the accompanying drawings embodiments of the present invention are described in further detail:
This radar signal general processing platform is made up of communication board 1, timing plate 2, interface board I 3, interface board II 4, process plate 5, signal source board 6, cabinet 7, communication board 1, timing plate 2, interface board I 3, interface board II 4 are installed by socket, process plate 5, signal source board 6, working power assembly in cabinet 7, cabinet 1 shell is provided with and communication board 1, timing plate 2, the interface of process plate 5, signal source board 6 adaptation one by one by interface board I 3, interface board II 4；It is provided with man machine operation interface on communication board 1；
Communication board 1 includes nucleus module, FPGA embedded type control module, man machine operation interface；System core module uses grinds China's system core module；
Process plate 5 and include FPGA embedded type control module, DSP；
Timing plate 2 is made up of FPGA embedded type control module, and FPGA embedded type control module includes controlling message submodule, clock signal submodule, the ultimate output sub-module of signal；
Interface board I 3 includes FPGA embedded type control module, optical fiber interface, opto-electronic conversion submodule, data distribution/processing unit；
Interface board II 4 includes FPGA embedded type control module, optical fiber interface, one group of 32 bit data acquisition interface；
Signal source board 6 includes FPGA embedded type control module, FLASH memory, optical fiber interface.
The nucleus module of described communication board 1 is for grinding China's system core module；Standard operation system software kit can be reduced, it is ensured that man machine operation interface properly functioning according to man machine operation interface function；The man machine operation interface of communication board 1 uses C++Builder XE6 too development, runs on XPE operating system, with the transmitting-receiving typing instruction of RS232 serial port form and status information.
Described process plate 5 includes FPGA embedded type control module, DSP, being its main operational unit, DSP carries out pulse compression, Beam synthesis, clutter recognition, pitch angle measurement, azimuth determination computing to pending data.
Described timing plate 2 is by controlling the various control messages needed for the normal work of message submodule decoding；Communication board, timing plate, interface board I, interface board II are provided by clock signal submodule, process the clock signal needed for plate, signal source board work；Signal is finally processed by the output of signal ultimate output sub-module.
Described interface board I 3 is at least provided with six optical fiber interfaces, and interface board I is first order signal processing unit, completes opto-electronic conversion by opto-electronic conversion submodule；By data distribution/processing unit, the pending data of input are distributed to each processing unit.
Described interface board II 4 is at least provided with two optical fiber interfaces and one group of 32 bit data acquisition interface, forward and cache intermediate object program during signal processing platform work, meanwhile, by optical fiber interface and the duty of 32 bit data acquisition interface monitor signals in real time processing platforms.
The self-checking equipment of described signal source board 6 is the most normal for detecting the performance state of general signal processing platform of the present invention.(seeing Fig. 1～3)
Communication board 1, timing plate 2, interface board I 3, interface board II 4, process plate 5, signal source board 6, working power assembly are all made as plug-in unit.
Cabinet 7 is communication board 1, timing plate 2, interface board I 3, interface board II 4, process the voltage needed for plate 5, signal source board 6, each plug-in unit offer work of working power assembly and intrasystem data exchange channels, and the external interface of this radar signal general processing platform.
Cabinet 7 is connected to display, keyboard, mouse by the corresponding interface.
The workflow of this radar signal general processing platform is as follows:
Open man machine operation interface, communication board 1 passes through cabinet 7 to timing plate 2 transmitting control commands, control command is transmitted to interface board I 3 by cabinet 7 by timing plate 2 again, interface board I 3 is sent to process plate 5 by cabinet 7 after the control command received and data in data stream being packed, process the message in the plate 5 data in data stream to receiving and do matched filtering process, then it is sent to interface board II 4 by cabinet 7, the data received are done after detection processes and are sent to timing plate 2 by cabinet 7 by interface board II 4, the last result calculated signal processing system in timing plate 2 does the cycle and range alignment processes, finally result is delivered to external interface circuit and carries out subsequent treatment.
When needing the performance of radar signal general processing platform is carried out self-inspection, connect interface board I 3 and signal source board 6 with optical fiber, use the test Data Detection radar signal general processing platform properties of storage in signal source board 6 the most normal.
The operation principle processing plate 5 is as follows:
Process the hardware body framework of plate 5 by four pieces of DSP: DSP0, DSP1, DSP2, DSP3 and one piece of FPGA programmable logic device form.Data stream, clock signal generation that FPGA programmable logic device inputs according to outside process the work schedule within plate 5 and control command, then by control command, valid data are sent to DSP2 and DSP3 by high-speed chain crossing from FPGA programmable logic device, then in DSP0, DSP1, DSP2, DSP3, valid data are carried out pulse compression, MTI, MTD, interception angle, surveys the computings such as the angle of pitch, by 32 bit data bus, result is sent to FPGA programmable logic device by DSP0, DSP1 the most again and processes.
The communication board 1 of this radar signal general processing platform is made up of system core module (i.e. system platform) and FPGA embedded type control module；System platform uses grinds China's system core module, and CPU is ATOM
1.6GHz processor, internal memory 1G；Use Windows
XP embedded OS customizes XPE operating system with Componentized form.This operating system has EWF hard disk protection function, reduces standard operation system software kit according to man machine operation interface function, has low capacity, high-performance and high reliability, it is ensured that man machine operation interface properly functioning.Man machine operation interface uses C++Builder
XE6 too development, runs on XPE operating system, with typing instruction and the status information of RS232 serial port form transmitting-receiving (man machine operation interface).
The above is presently preferred embodiments of the present invention, the example above explanation not flesh and blood to the present invention makees any pro forma restriction, person of an ordinary skill in the technical field's any simple modification that above detailed description of the invention has been made by the technical spirit of the foundation present invention after having read this specification or deformation, and the technology contents possibly also with the disclosure above is changed or is modified to the Equivalent embodiments of equivalent variations, all still fall within the range of technical solution of the present invention, without departing from the spirit and scope of the invention.
Claims (7)
1. a radar signal general processing platform, it is made up of communication board (1), timing plate (2), interface board I (3), interface board II (4), process plate (5), signal source board (6), cabinet (7), it is characterised in that: communication board (1), timing plate (2), interface board I (3), interface board II (4) are installed by socket, process plate (5), signal source board (6), working power assembly in cabinet (7)；It is provided with and the interface of communication board (1), timing plate (2), process plate (5), signal source board (6) adaptation one by one by interface board I (3), interface board II (4) on cabinet (7) shell；Communication board is provided with man machine operation interface on (1)；
Communication board (1) includes nucleus module, FPGA embedded type control module, man machine operation interface；
Process plate (5) and include FPGA embedded type control module, DSP；
Timing plate (2) is made up of FPGA embedded type control module, and FPGA embedded type control module includes controlling message submodule, clock signal submodule, the ultimate output sub-module of signal；
Interface board I (3) includes FPGA embedded type control module, optical fiber interface, opto-electronic conversion submodule, data distribution/processing unit；
Interface board II (4) includes FPGA embedded type control module, optical fiber interface, one group of 32 bit data acquisition interface；
Signal source board (6) includes FPGA embedded type control module, FLASH memory, optical fiber interface.
A kind of radar signal general processing platform the most according to claim 1, the nucleus module of described communication board (1) is for grinding China's system core module；Standard operation system software kit can be reduced, it is ensured that man machine operation interface properly functioning according to man machine operation interface function；The man machine operation interface of communication board uses C++Builder XE6 too development, runs on XPE operating system, with the transmitting-receiving typing instruction of RS232 serial port form and status information.
A kind of radar signal general processing platform the most according to claim 1, described process plate (5) includes FPGA embedded type control module, DSP, processing plate (5) is its main operational unit, and DSP carries out pulse compression, Beam synthesis, clutter recognition, pitch angle measurement, azimuth determination computing to pending data.
A kind of radar signal general processing platform the most according to claim 1, described timing plate (2) is by controlling the various control messages needed for the normal work of message submodule decoding；Communication board (1), timing plate (2), interface board I (3), interface board II (4) are provided by clock signal submodule, process the clock signal needed for plate (5), signal source board (6) work；Signal is finally processed by the output of signal ultimate output sub-module.
A kind of radar signal general processing platform the most according to claim 1, described interface board I (3) is at least provided with six optical fiber interfaces, and interface board I (3) is first order signal processing unit, completes opto-electronic conversion by opto-electronic conversion submodule；By data distribution/processing unit, the pending data of input are distributed to each processing unit.
A kind of radar signal general processing platform the most according to claim 1, described interface board II (4) is at least provided with two optical fiber interfaces and one group of 32 bit data acquisition interface, forward and cache intermediate object program during signal processing platform work, meanwhile, by optical fiber interface and the duty of 32 bit data acquisition interface monitor signals in real time processing platforms.
A kind of radar signal general processing platform the most according to claim 1, described signal source board (6) is at least provided with an optical fiber interface, with optical fiber interface, the test data stored in FLASH memory are sent to interface board I, the most normal for detecting the performance state of signal processing platform of the present invention.
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| CN201610169393.8A CN105974365A (en) | 2016-03-22 | 2016-03-22 | Universal processing platform for radar signals |
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| CN201610169393.8A CN105974365A (en) | 2016-03-22 | 2016-03-22 | Universal processing platform for radar signals |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107831477A (en) * | 2017-10-20 | 2018-03-23 | 北京无线电测量研究所 | A kind of digital transmitting and receiving component Auto-Test System |
| CN108051813A (en) * | 2017-12-04 | 2018-05-18 | 湖南华诺星空电子技术有限公司 | For the radar-probing system and method for low latitude multiple target Classification and Identification |
| CN109581347A (en) * | 2018-12-10 | 2019-04-05 | 航天南湖电子信息技术股份有限公司 | A kind of radar fining distance measuring method |
| CN111932864A (en) * | 2020-07-16 | 2020-11-13 | 中国电子科技集团公司第十四研究所 | Conversion system and method for converting radar optical fiber signals into differential signals |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1949180A (en) * | 2006-09-18 | 2007-04-18 | 中国航天时代电子公司第七七一研究所 | Structuring method of distributed type simulated testing system series based on signal classification |
| CN201780478U (en) * | 2010-01-15 | 2011-03-30 | 国网电力科学研究院 | Modularized condition monitoring device based on FPGA |
| CN103257910A (en) * | 2013-04-26 | 2013-08-21 | 北京航空航天大学 | LX I embedded type reconfigurable general test platform capable of being used for on-site test |
| CN203587762U (en) * | 2013-11-05 | 2014-05-07 | 南京三乐电子信息产业集团有限公司 | General digital signal detector |
-
2016
- 2016-03-22 CN CN201610169393.8A patent/CN105974365A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1949180A (en) * | 2006-09-18 | 2007-04-18 | 中国航天时代电子公司第七七一研究所 | Structuring method of distributed type simulated testing system series based on signal classification |
| CN201780478U (en) * | 2010-01-15 | 2011-03-30 | 国网电力科学研究院 | Modularized condition monitoring device based on FPGA |
| CN103257910A (en) * | 2013-04-26 | 2013-08-21 | 北京航空航天大学 | LX I embedded type reconfigurable general test platform capable of being used for on-site test |
| CN203587762U (en) * | 2013-11-05 | 2014-05-07 | 南京三乐电子信息产业集团有限公司 | General digital signal detector |
Non-Patent Citations (2)
| Title |
|---|
| 刘小宁: "《通用机载雷达信号处理硬件平台设计》", 《计算机工程与应用》 * |
| 刘通: "《微波雷达测试系统研制》", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107831477A (en) * | 2017-10-20 | 2018-03-23 | 北京无线电测量研究所 | A kind of digital transmitting and receiving component Auto-Test System |
| CN108051813A (en) * | 2017-12-04 | 2018-05-18 | 湖南华诺星空电子技术有限公司 | For the radar-probing system and method for low latitude multiple target Classification and Identification |
| CN108051813B (en) * | 2017-12-04 | 2021-12-07 | 湖南华诺星空电子技术有限公司 | Radar detection system and method for low-altitude multi-target classification recognition |
| CN109581347A (en) * | 2018-12-10 | 2019-04-05 | 航天南湖电子信息技术股份有限公司 | A kind of radar fining distance measuring method |
| CN111932864A (en) * | 2020-07-16 | 2020-11-13 | 中国电子科技集团公司第十四研究所 | Conversion system and method for converting radar optical fiber signals into differential signals |
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Application publication date: 20160928 |