CN105959622A - Cache arbitration method and system applied to multi-channel video collecting and broadcasting system - Google Patents
Cache arbitration method and system applied to multi-channel video collecting and broadcasting system Download PDFInfo
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- CN105959622A CN105959622A CN201610274368.6A CN201610274368A CN105959622A CN 105959622 A CN105959622 A CN 105959622A CN 201610274368 A CN201610274368 A CN 201610274368A CN 105959622 A CN105959622 A CN 105959622A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
- H04N7/181—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/231—Content storage operation, e.g. caching movies for short term storage, replicating data over plural servers, prioritizing data for deletion
- H04N21/23103—Content storage operation, e.g. caching movies for short term storage, replicating data over plural servers, prioritizing data for deletion using load balancing strategies, e.g. by placing or distributing content on different disks, different memories or different servers
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Abstract
The invention discloses a cache arbitration method and a system applied to a multi-channel video collecting and broadcasting system, and the method comprises the steps: S11, the state of a request arbitration state machine is set as an idle state; S12, if a FrameStore video and audio task request exists in current period is queried, if yes, S13 is entered, if not, S14 is entered; S13, a FrameStore_Channel terminal interface control state machine is notified to process the FrameStore video and audio task request; and S14, if a PCIE DMA task request exists is queried, if yes, a PCIE DMA terminal interface control state machine is notified to process the PCIE DMA task request. According to the invention, a defect of low bandwidth utilization rate caused by solely relying on a polling mechanism can be avoided, and the bandwidth of DDR SDRAM can be fully utilized.
Description
Technical field
The present invention relates to video image technical field, be applied to multi-channel video particularly to one and adopt broadcast system
Cache arbitration method and system.
Background technology
Currently, for the development of adaptive video image technique, occur in that multi-channel video adopts broadcast system on the market,
This system proposes the highest requirement to the transmission after view data Real-time Collection and process performance.Especially
It is high-resolution, being widely used of high-frequency frame camera so that high bandwidth requirements is the most urgent.To these
During mass image data carries out Real-time Collection, caching is requisite ingredient, the most existing
At the more commonly used DDR SDRAM (i.e. Double Data Rate synchronous DRAM).Existing multichannel
Video is adopted the DDR SDRAM in broadcast system and is generally used polling mechanism as caching mechanism, so makes
Bandwidth availability ratio ratio is relatively low.
In sum it can be seen that the bandwidth availability ratio how improved in DDR SDRAM process of caching is
Problem demanding prompt solution at present.
Summary of the invention
In view of this, it is an object of the invention to provide a kind of multi-channel video that is applied to and adopt the caching of broadcast system
Referee method and system, improve the bandwidth availability ratio in DDR SDRAM process of caching.It is specifically square
Case is as follows:
A kind of multi-channel video that is applied to adopts the cache arbitration method of broadcast system, including:
Step S11: the state of request arbitration state machine is set to idle condition；
Step S12: whether inquiry current period has FrameStore video and audio task requests, if it is,
Enter step S13, if it is not, then enter step S14；
Step S13: the state of described request arbitration state machine is changed to the first request service state, and leads to
Know FrameStore_Channel end interface controlled state machine, FrameStore video and audio task requests is carried out
Process, and after this has processed, enter step S11；
Step S14: whether inquiry has PCIE DMA task requests, if it is not, then enter step S12, as
Fruit is then the state of described request arbitration state machine to be changed to the second request service state, and notify PCIE
DMA end interface controlled state machine, processes PCIE DMA task requests, and has processed when this
Cheng Hou, enters step S11.
Preferably, described idle condition is ARBITRATER_IDLE state, described first request service
State is VIDAUD_SERVE state, and described second request service state is PCIE_SERVE state.
Preferably, described notice FrameStore_Channel end interface controlled state machine, to FrameStore
Video and audio task requests carries out the process processed, including:
Send vidaud_serve_request order, to notify described FrameStore_Channel end interface control
State machine processed, processes FrameStore video and audio task requests.
Preferably, described notice PCIE DMA end interface controlled state machine, to PCIE DMA task requests
Carry out the process processed, including:
Send pcie_serve_request order, to notify described PCIE DMA end interface controlled state machine,
PCIE DMA task requests is processed.
Preferably, described FrameStore_Channel end interface controlled state machine is to FrameStore video and audio
Task requests carries out the process processed, including:
Step S21: obtain FrameStore video and audio task requests, and by described FrameStore_Channel
The state of end interface controlled state machine is changed to VID_GET_ADDR shape by initial VID_IDLE state
State；
Step S22: in VID_GET_ADDR state, output is currently needed for the passage processed, then
By the Status Change of described FrameStore_Channel end interface controlled state machine it is
VID_SERVE_START state, in a state, it is judged that the COS of current channel, if currently
The COS of passage is for writing, then by the state of described FrameStore_Channel end interface controlled state machine
It is changed to VID_WFIFO_SE state, and enters step S23；If the COS of current channel is for reading,
Then the Status Change by described FrameStore_Channel end interface controlled state machine is VID_RFIFO_SE
State, and enter step S24；
Step S23: complete corresponding write operation, and described FrameStore_Channel end interface is controlled
The Status Change of state machine is VID_UPDATE_ADDR state, subsequently into step S25；
Step S24: complete corresponding read operation, and described FrameStore_Channel end interface is controlled
The Status Change of state machine is VID_UPDATE_ADDR state, subsequently into step S25；
Step S25: in VID_UPDATE_ADDR state, OPADD more new signal, update and work as
The base address of prepass, then by the Status Change of FrameStore_Channel end interface controlled state machine be
VID_IDLE state.
Preferably, corresponding write operation is completed, and by described FrameStore_Channel end interface control described in
The Status Change of state machine processed is the process of VID_UPDATE_ADDR state, including:
In VID_WFIFO_SE state, after determining wrfifo exists sufficient space, by described
The Status Change of FrameStore_Channel end interface controlled state machine is VID_WFIFO_WRITE shape
Then corresponding data are write wrfifo, by described FrameStore_Channel end after having write by state
The Status Change of Interface Controller state machine is VID_CMDWF_SE state, and deposits in determining CMDfifo
After the storage order of space, by the Status Change of described FrameStore_Channel end interface controlled state machine
For VID_CMDWF_WRITE state, write space stores after ordering, by described
The Status Change of FrameStore_Channel end interface controlled state machine is VID_UPDATE_ADDR shape
State；
Described complete corresponding read operation, and by described FrameStore_Channel end interface controlled state machine
The process that Status Change is VID_UPDATE_ADDR state, including:
In VID_RFIFO_SE state, after determining rdfifo exists sufficient space, by described
The Status Change of FrameStore_Channel end interface controlled state machine is VID_CMDRF_SE state,
And in determining CMDfifo after Existential Space storage order, by described FrameStore_Channel end interface
The Status Change of controlled state machine is VID_CMDRF_WRITE state, after the storage order of write space,
By the Status Change of described FrameStore_Channel end interface controlled state machine it is
Then corresponding data are read out, after having read from rdfifo by VID_RFIFO_READ state
By the Status Change of described FrameStore_Channel end interface controlled state machine it is
VID_UPDATE_ADDR state.
Preferably, described PCIE DMA end interface controlled state machine to PCIE DMA task requests at
The process of reason, including:
Step S31: obtain PCIE DMA task requests, and described PCIE DMA end interface is controlled shape
The state of state machine is changed to PCIE_SERVE_START shape by initial PCIE_SERVE_IDLE state
State；
Step S32: in PCIE_SERVE_START state, it is judged that the class of PCIE DMA task requests
Type；If PCIE DMA task requests is write request, then by described PCIE DMA end interface controlled state machine
State change to WFIFO_SE state, and enter step S33；If PCIE DMA task requests is for reading
Request, then change to RFIFO_SE state by the state of described PCIE DMA end interface controlled state machine,
And enter step S34；
Step S33: complete corresponding write operation, and by described PCIE DMA end interface controlled state machine
State changes to PCIE_SERVE_IDLE state；
Step S34: complete corresponding read operation, and by described PCIE DMA end interface controlled state machine
State changes to PCIE_SERVE_IDLE state.
Preferably, corresponding write operation is completed, and by described PCIE DMA end interface controlled state machine described in
State change to the process of PCIE_SERVE_IDLE state, including:
In WFIFO_SE state, after determining wrfifo exists sufficient space, then by described PCIE
The state of DMA end interface controlled state machine changes to WFIFO_WRITE state, then will count accordingly
According to write wrfifo, after having write, the state of described PCIE DMA end interface controlled state machine is changed to
CMDWF_SE state, and in determining CMDfifo after Existential Space storage order, by described PCIE
The state of DMA end interface controlled state machine changes to CMDWF_WRITE state, write space storage life
After order, the state of described PCIE DMA end interface controlled state machine is changed to PCIE_SERVE_IDLE
State；
Described complete corresponding read operation, and by the state of described PCIE DMA end interface controlled state machine more
Change the process of PCIE_SERVE_IDLE state into, including:
In RFIFO_SE state, after determining rdfifo exists sufficient space, by described PCIE DMA
The state of end interface controlled state machine changes to CMDRF_SE state, and there is sky in determining CMDfifo
Between storage order after, the state of described PCIE DMA end interface controlled state machine is changed to
CMDRF_WRITE state, after the storage order of write space, controls described PCIE DMA end interface
The state of state machine changes to RFIFO_READ state, then corresponding data is read out from rdfifo
Come, after having read, the state of described PCIE DMA end interface controlled state machine is changed to
PCIE_SERVE_IDLE state.
The invention also discloses a kind of multi-channel video that is applied to and adopt the cache arbitration system of broadcast system, including shape
State arrange module, the first requesting query module, the first request processing module, the second requesting query module and
Second request processing module；Wherein,
Described state setting module, for being set to idle condition by the state of request arbitration state machine；
Described first requesting query module, is used for inquiring about whether current period has FrameStore video and audio task
Request, if it is, notify described first request processing module startup work；If it is not, then notice institute
State the second requesting query module startup work；
Described first request processing module, for changing to first by the state of described request arbitration state machine
Request service state, and notify FrameStore_Channel end interface controlled state machine, to FrameStore
Video and audio task requests processes, and after this has processed, notifies that described state setting module opens
Start building to make；
Whether described second requesting query module, have PCIE DMA task requests for inquiry, if it does not,
Then notify described first requesting query module startup work, if it is, notify that described second request processes
Module startup work；
Described second request processing module, for changing to second by the state of described request arbitration state machine
Request service state, and notify PCIE DMA end interface controlled state machine, to PCIE DMA task requests
Process, and after this has processed, notify described state setting module startup work.
The present invention further discloses a kind of multi-channel video based on PCIe interface and adopt broadcast system, including aforementioned
Cache arbitration system.
In the present invention, cache arbitration method includes: step S11: the state of request arbitration state machine be set to
Idle condition；Step S12: whether inquiry current period has FrameStore video and audio task requests, if
It is then to enter step S13, if it is not, then enter step S14；Step S13: arbitration state machine will be asked
State change to the first request service state, and notify FrameStore_Channel end interface controlled state
Machine, processes FrameStore video and audio task requests, and after this has processed, enters step
S11；Step S14: whether inquiry has PCIE DMA task requests, if it is not, then enter step S12,
If it is, the state of request arbitration state machine is changed to the second request service state, and notify PCIE
DMA end interface controlled state machine, processes PCIE DMA task requests, and has processed when this
Cheng Hou, enters step S11.Visible, the present invention, according to the difference of request type, correspondingly selects different
State machine makes requests on response, that is, when request is for FrameStore video and audio task requests, then utilize
This request is processed by FrameStore_Channel end interface controlled state machine, when request is PCIE
During DMA task requests, then utilize PCIE DMA end interface controlled state machine that this request is processed.
As can be seen here, the present invention is by leading to about data in FrameStore_Channel end interface controlled state machine
Excellent about PCIE DMA in poll arbitration mechanism between road and PCIE DMA end interface controlled state machine
First level arbitration mechanism is combined, it is possible to avoid relying on merely the bandwidth availability ratio that polling mechanism brought low
Shortcoming, take full advantage of the bandwidth of DDR SDRAM, improve the handling capacity of system, also have simultaneously
It is beneficial to the autgmentability of raising system.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to reality
Execute the required accompanying drawing used in example or description of the prior art to be briefly described, it should be apparent that below,
Accompanying drawing in description is only embodiments of the invention, for those of ordinary skill in the art, not
On the premise of paying creative work, it is also possible to obtain other accompanying drawing according to the accompanying drawing provided.
Fig. 1 is that disclosed in the embodiment of the present invention, a kind of multi-channel video that is applied to adopts the cache arbitration side of broadcast system
Method flow chart；
Fig. 2 is that disclosed in the embodiment of the present invention, a kind of multi-channel video that is applied to adopts the cache arbitration system of broadcast system
System structural representation.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out
Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the present invention, and
It is not all, of embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art are not doing
Go out the every other embodiment obtained under creative work premise, broadly fall into the scope of protection of the invention.
The embodiment of the invention discloses a kind of multi-channel video that is applied to and adopt the cache arbitration method of broadcast system, ginseng
As shown in Figure 1, the method includes:
Step S11: the state of request arbitration state machine is set to idle condition；
Step S12: whether inquiry current period has FrameStore video and audio task requests, if it is,
Enter step S13, if it is not, then enter step S14；
Step S13: the state of request arbitration state machine is changed to the first request service state, and notifies
FrameStore_Channel end interface controlled state machine, at FrameStore video and audio task requests
Reason, and after this has processed, enter step S11；
Step S14: whether inquiry has PCIE DMA task requests, if it is not, then enter step S12, as
Fruit is, then the state of request arbitration state machine is changed to the second request service state, and notify PCIE
DMA end interface controlled state machine, processes PCIE DMA task requests, and has processed when this
Cheng Hou, enters step S11.
It is understood that above-mentioned FrameStore video and audio task requests and PCIE DMA task requests are
It is received by request arbitration state machine.
It should be noted that above-mentioned FrameStore_Channel end interface controlled state machine specifically refers to
FrameStore_Serve_StateMachine state machine, above-mentioned PCIE DMA end interface controlled state facility
Body refers to Pcie_DMA_Serve_StateMachine state machine.
It addition, above-mentioned idle condition is ARBITRATER_IDLE state, the first request service state is
VIDAUD_SERVE state, the second request service state is PCIE_SERVE state.
Visible, the embodiment of the present invention, according to the difference of request type, correspondingly selects different state machines to enter
Row request response, that is, when request is for FrameStore video and audio task requests, then utilize
This request is processed by FrameStore_Channel end interface controlled state machine, when request is PCIE
During DMA task requests, then utilize PCIE DMA end interface controlled state machine that this request is processed.
As can be seen here, the embodiment of the present invention by by FrameStore_Channel end interface controlled state machine about
About PCIE in poll arbitration mechanism between data channel and PCIE DMA end interface controlled state machine
The priority arbitration mechanism of DMA is combined, it is possible to avoid relying on merely the bandwidth that polling mechanism is brought
The shortcoming that utilization rate is low, takes full advantage of the bandwidth of DDR SDRAM, improves the handling capacity of system,
It is simultaneously also beneficial to the autgmentability of raising system.
The embodiment of the invention discloses a kind of concrete multi-channel video that is applied to and adopt the cache arbitration side of broadcast system
Method, relative to a upper embodiment, technical scheme has been made further instruction and optimization by the present embodiment.Tool
Body:
In upper embodiment step S13, notify FrameStore_Channel end interface controlled state machine, right
FrameStore video and audio task requests carries out the process processed, including: send vidaud_serve_request
Order, to notify FrameStore_Channel end interface controlled state machine, appoints FrameStore video and audio
Business request processes.
Wherein, FrameStore video and audio is appointed by above-mentioned FrameStore_Channel end interface controlled state machine
Business request carries out the process processed, and comprises the steps S21～S25, particularly as follows:
Step S21: obtain FrameStore video and audio task requests, and FrameStore_Channel is terminated
The state of mouth controlled state machine is changed to VID_GET_ADDR state by initial VID_IDLE state；
Step S22: in VID_GET_ADDR state, output is currently needed for the passage processed, then
It is VID_SERVE_START by the Status Change of FrameStore_Channel end interface controlled state machine
State, in a state, it is judged that the COS of current channel, if the COS of current channel is for writing,
Then the Status Change by FrameStore_Channel end interface controlled state machine is VID_WFIFO_SE shape
State, and enter step S23；If the COS of current channel is for reading, then by FrameStore_Channel
The Status Change of end interface controlled state machine is VID_RFIFO_SE state, and enters step S24；
Step S23: complete corresponding write operation, and by FrameStore_Channel end interface controlled state
The Status Change of machine is VID_UPDATE_ADDR state, subsequently into step S25；
Step S24: complete corresponding read operation, and by FrameStore_Channel end interface controlled state
The Status Change of machine is VID_UPDATE_ADDR state, subsequently into step S25；
Step S25: in VID_UPDATE_ADDR state, OPADD more new signal, update and work as
The base address of prepass, then by the Status Change of FrameStore_Channel end interface controlled state machine be
VID_IDLE state.
Concrete, in above-mentioned steps S23, complete corresponding write operation, and by FrameStore_Channel
The process that Status Change is VID_UPDATE_ADDR state of end interface controlled state machine, specifically wraps
Include:
In VID_WFIFO_SE state, after determining wrfifo exist sufficient space, will
The Status Change of FrameStore_Channel end interface controlled state machine is VID_WFIFO_WRITE shape
Then corresponding data are write wrfifo, by FrameStore_Channel end interface after having write by state
The Status Change of controlled state machine is VID_CMDWF_SE state, and there is sky in determining CMDfifo
Between storage order after, by the Status Change of FrameStore_Channel end interface controlled state machine be
VID_CMDWF_WRITE state, after the storage order of write space, by FrameStore_Channel end
The Status Change of Interface Controller state machine is VID_UPDATE_ADDR state.
Further, in above-mentioned steps S24, complete corresponding read operation, and by FrameStore_Channel
The process that Status Change is VID_UPDATE_ADDR state of end interface controlled state machine, specifically wraps
Include:
In VID_RFIFO_SE state, after determining rdfifo exist sufficient space, will
The Status Change of FrameStore_Channel end interface controlled state machine is VID_CMDRF_SE state,
And in determining CMDfifo after Existential Space storage order, FrameStore_Channel end interface is controlled
The Status Change of state machine is VID_CMDRF_WRITE state, after the storage order of write space, and will
The Status Change of FrameStore_Channel end interface controlled state machine is VID_RFIFO_READ state,
Then corresponding data are read out from rdfifo, after having read, FrameStore_Channel is terminated
The Status Change of mouth controlled state machine is VID_UPDATE_ADDR state.
It addition, in upper embodiment step S14, notify PCIE DMA end interface controlled state machine, to PCIE
DMA task requests carries out the process processed, including: send pcie_serve_request order, with notice
PCIE DMA end interface controlled state machine, processes PCIE DMA task requests.
Wherein, the mistake that PCIE DMA task requests is processed by PCIE DMA end interface controlled state machine
Journey, comprises the steps S31～S34, particularly as follows:
Step S31: obtain PCIE DMA task requests, and by PCIE DMA end interface controlled state machine
State changed to PCIE_SERVE_START state by initial PCIE_SERVE_IDLE state；
Step S32: in PCIE_SERVE_START state, it is judged that the class of PCIE DMA task requests
Type；If PCIE DMA task requests is write request, then by the shape of PCIE DMA end interface controlled state machine
State changes to WFIFO_SE state, and enters step S33；If PCIE DMA task requests is read request,
Then the state of PCIE DMA end interface controlled state machine is changed to RFIFO_SE state, and enter step
S34；
Step S33: complete corresponding write operation, and by the state of PCIE DMA end interface controlled state machine
Change to PCIE_SERVE_IDLE state；
Step S34: complete corresponding read operation, and by the state of PCIE DMA end interface controlled state machine
Change to PCIE_SERVE_IDLE state.
Concrete, in above-mentioned steps S33, complete corresponding write operation, and by PCIE DMA end interface control
The state of state machine processed changes to the process of PCIE_SERVE_IDLE state, including:
In WFIFO_SE state, after determining wrfifo exists sufficient space, then by PCIE DMA
The state of end interface controlled state machine changes to WFIFO_WRITE state, then corresponding data is write
Wrfifo, changes to CMDWF_SE by the state of PCIE DMA end interface controlled state machine after having write
State, and in determining CMDfifo after Existential Space storage order, PCIE DMA end interface is controlled shape
The state of state machine changes to CMDWF_WRITE state, after the storage order of write space, by PCIE DMA
The state of end interface controlled state machine changes to PCIE_SERVE_IDLE state.
Further, in above-mentioned steps S34, complete corresponding read operation, and by PCIE DMA end interface
The state of controlled state machine changes to the process of PCIE_SERVE_IDLE state, including:
In RFIFO_SE state, after determining rdfifo exists sufficient space, PCIE DMA is terminated
The state of mouth controlled state machine changes to CMDRF_SE state, and Existential Space is deposited in determining CMDfifo
After storage order, the state of PCIE DMA end interface controlled state machine is changed to CMDRF_WRITE shape
State, after the storage order of write space, changes to the state of PCIE DMA end interface controlled state machine
Then corresponding data are read out from rdfifo by RFIFO_READ state, will after having read
The state of PCIE DMA end interface controlled state machine changes to PCIE_SERVE_IDLE state.
Accordingly, the embodiment of the invention discloses a kind of multi-channel video that is applied to and adopt the cache arbitration of broadcast system
System, shown in Figure 2, this system include state setting module the 21, first requesting query module 22,
One request processing module the 23, second requesting query module 24 and the second request processing module 25；Wherein,
State setting module 21, for being set to idle condition by the state of request arbitration state machine；
First requesting query module 22, is used for inquiring about whether current period has FrameStore video and audio task to ask
Ask, if it is, notify that the first request processing module 23 starts work；If it is not, then notify that second please
Enquiry module 24 is asked to start work；
First request processing module 23, for changing to the first request clothes by the state of request arbitration state machine
Business state, and notify FrameStore_Channel end interface controlled state machine, to FrameStore video and audio
Task requests processes, and after this has processed, notice state setting module 21 starts work；
Whether the second requesting query module 24, have PCIE DMA task requests for inquiry, if it is not, then
Notify that the first requesting query module 22 starts work, if it is, notify that the second request processing module 25 opens
Start building to make；
Second request processing module 25, for changing to the second request clothes by the state of request arbitration state machine
Business state, and notify PCIE DMA end interface controlled state machine, at PCIE DMA task requests
Reason, and after this has processed, notice state setting module 21 starts work.
Visible, the embodiment of the present invention, according to the difference of request type, correspondingly selects different state machines to enter
Row request response, that is, when request is for FrameStore video and audio task requests, then utilize
This request is processed by FrameStore_Channel end interface controlled state machine, when request is PCIE
During DMA task requests, then utilize PCIE DMA end interface controlled state machine that this request is processed.
As can be seen here, the embodiment of the present invention by by FrameStore_Channel end interface controlled state machine about
About PCIE in poll arbitration mechanism between data channel and PCIE DMA end interface controlled state machine
The priority arbitration mechanism of DMA is combined, it is possible to avoid relying on merely the bandwidth that polling mechanism is brought
The shortcoming that utilization rate is low, takes full advantage of the bandwidth of DDR SDRAM, improves the handling capacity of system,
It is simultaneously also beneficial to the autgmentability of raising system.
Further, the embodiment of the invention also discloses a kind of multi-channel video based on PCIe interface and adopt to broadcast and be
System, including aforementioned disclosed cache arbitration system.
Finally, in addition it is also necessary to explanation, in this article, the relational terms of such as first and second or the like
It is used merely to separate an entity or operation with another entity or operating space, and not necessarily requires
Or imply relation or the order that there is any this reality between these entities or operation.And, art
Language " includes ", " comprising " or its any other variant are intended to comprising of nonexcludability, thus
Make to include that the process of a series of key element, method, article or equipment not only include those key elements, and
Also include other key elements being not expressly set out, or also include for this process, method, article or
The key element that person's equipment is intrinsic.In the case of there is no more restriction, by statement " including ... "
The key element limited, it is not excluded that also deposit in including the process of described key element, method, article or equipment
In other identical element.
Above to provided by the present invention a kind of be applied to multi-channel video adopt broadcast system cache arbitration method and
System is described in detail, and principle and the embodiment of the present invention are entered by specific case used herein
Having gone elaboration, the explanation of above example is only intended to help to understand method and the core concept thereof of the present invention；
Simultaneously for one of ordinary skill in the art, according to the thought of the present invention, in detailed description of the invention and
All will change in range of application, in sum, this specification content should not be construed as the present invention
Restriction.
Claims (10)
1. one kind is applied to multi-channel video and adopts the cache arbitration method of broadcast system, it is characterised in that including:
Step S11: the state of request arbitration state machine is set to idle condition；
Step S12: whether inquiry current period has FrameStore video and audio task requests, if it is,
Then enter step S13, if it is not, then enter step S14；
Step S13: the state of described request arbitration state machine is changed to the first request service state, and leads to
Know FrameStore_Channel end interface controlled state machine, FrameStore video and audio task requests is entered
Row processes, and after this has processed, enters step S11；
Step S14: whether inquiry has PCIE DMA task requests, if it is not, then enter step S12,
If it is, the state of described request arbitration state machine is changed to the second request service state, and notify
PCIE DMA end interface controlled state machine, processes PCIE DMA task requests, and when this
After process completes, enter step S11.
The multi-channel video that is applied to the most according to claim 1 adopts the cache arbitration method of broadcast system, its
Being characterised by, described idle condition is ARBITRATER_IDLE state, described first request service shape
State is VIDAUD_SERVE state, and described second request service state is PCIE_SERVE state.
The multi-channel video that is applied to the most according to claim 2 adopts the cache arbitration method of broadcast system, its
Being characterised by, described notice FrameStore_Channel end interface controlled state machine, to FrameStore
Video and audio task requests carries out the process processed, including:
Send vidaud_serve_request order, to notify described FrameStore_Channel end interface
Controlled state machine, processes FrameStore video and audio task requests.
The multi-channel video that is applied to the most according to claim 2 adopts the cache arbitration method of broadcast system, its
Being characterised by, described notice PCIE DMA end interface controlled state machine, to PCIE DMA task requests
Carry out the process processed, including:
Send pcie_serve_request order, to notify described PCIE DMA end interface controlled state machine,
PCIE DMA task requests is processed.
The multi-channel video that is applied to the most according to claim 3 adopts the cache arbitration method of broadcast system, its
Being characterised by, described FrameStore_Channel end interface controlled state machine is to FrameStore video and audio
Task requests carries out the process processed, including:
Step S21: obtain FrameStore video and audio task requests, and by described FrameStore_Channel
The state of end interface controlled state machine is changed to VID_GET_ADDR by initial VID_IDLE state
State；
Step S22: in VID_GET_ADDR state, output is currently needed for the passage processed, then
By the Status Change of described FrameStore_Channel end interface controlled state machine it is
VID_SERVE_START state, in a state, it is judged that the COS of current channel, if currently
The COS of passage is for writing, then by the shape of described FrameStore_Channel end interface controlled state machine
State is changed to VID_WFIFO_SE state, and enters step S23；If the COS of current channel is
Read, then by the Status Change of described FrameStore_Channel end interface controlled state machine be
VID_RFIFO_SE state, and enter step S24；
Step S23: complete corresponding write operation, and described FrameStore_Channel end interface is controlled
The Status Change of state machine is VID_UPDATE_ADDR state, subsequently into step S25；
Step S24: complete corresponding read operation, and described FrameStore_Channel end interface is controlled
The Status Change of state machine is VID_UPDATE_ADDR state, subsequently into step S25；
Step S25: in VID_UPDATE_ADDR state, OPADD more new signal, update and work as
The base address of prepass, then by the Status Change of FrameStore_Channel end interface controlled state machine
For VID_IDLE state.
The multi-channel video that is applied to the most according to claim 5 adopts the cache arbitration method of broadcast system, its
It is characterised by,
Described complete corresponding write operation, and by described FrameStore_Channel end interface controlled state
The Status Change of machine is the process of VID_UPDATE_ADDR state, including:
In VID_WFIFO_SE state, after determining wrfifo exists sufficient space, by described
The Status Change of FrameStore_Channel end interface controlled state machine is VID_WFIFO_WRITE shape
Then corresponding data are write wrfifo, by described FrameStore_Channel after having write by state
The Status Change of end interface controlled state machine is VID_CMDWF_SE state, and is determining CMDfifo
After the storage order of middle Existential Space, by the shape of described FrameStore_Channel end interface controlled state machine
State is changed to VID_CMDWF_WRITE state, after the storage order of write space, by described
The Status Change of FrameStore_Channel end interface controlled state machine is VID_UPDATE_ADDR
State；
Described complete corresponding read operation, and by described FrameStore_Channel end interface controlled state
The Status Change of machine is the process of VID_UPDATE_ADDR state, including:
In VID_RFIFO_SE state, after determining rdfifo exists sufficient space, by described
The Status Change of FrameStore_Channel end interface controlled state machine is VID_CMDRF_SE state,
And in determining CMDfifo after Existential Space storage order, described FrameStore_Channel is terminated
The Status Change of mouth controlled state machine is VID_CMDRF_WRITE state, the storage order of write space
After, by the Status Change of described FrameStore_Channel end interface controlled state machine it is
Then corresponding data are read out from rdfifo by VID_RFIFO_READ state, and reading completes
After by the Status Change of described FrameStore_Channel end interface controlled state machine be
VID_UPDATE_ADDR state.
The multi-channel video that is applied to the most according to claim 4 adopts the cache arbitration method of broadcast system, its
Be characterised by, described PCIE DMA end interface controlled state machine to PCIE DMA task requests at
The process of reason, including:
Step S31: obtain PCIE DMA task requests, and described PCIE DMA end interface is controlled
The state of state machine is changed to by initial PCIE_SERVE_IDLE state
PCIE_SERVE_START state；
Step S32: in PCIE_SERVE_START state, it is judged that PCIE DMA task requests
Type；If PCIE DMA task requests is write request, then described PCIE DMA end interface is controlled
The state of state machine changes to WFIFO_SE state, and enters step S33；If PCIE DMA task
Request is read request, then the state of described PCIE DMA end interface controlled state machine changed to
RFIFO_SE state, and enter step S34；
Step S33: complete corresponding write operation, and by described PCIE DMA end interface controlled state machine
State change to PCIE_SERVE_IDLE state；
Step S34: complete corresponding read operation, and by described PCIE DMA end interface controlled state machine
State change to PCIE_SERVE_IDLE state.
The multi-channel video that is applied to the most according to claim 7 adopts the cache arbitration method of broadcast system, its
It is characterised by,
Described complete corresponding write operation, and by the state of described PCIE DMA end interface controlled state machine
Change to the process of PCIE_SERVE_IDLE state, including:
In WFIFO_SE state, after determining wrfifo exists sufficient space, then by described PCIE
The state of DMA end interface controlled state machine changes to WFIFO_WRITE state, then will count accordingly
According to write wrfifo, after having write, the state of described PCIE DMA end interface controlled state machine is changed
For CMDWF_SE state, and in determining CMDfifo after Existential Space storage order, by described PCIE
The state of DMA end interface controlled state machine changes to CMDWF_WRITE state, the storage of write space
After order, the state of described PCIE DMA end interface controlled state machine is changed to
PCIE_SERVE_IDLE state；
Described complete corresponding read operation, and by the state of described PCIE DMA end interface controlled state machine
Change to the process of PCIE_SERVE_IDLE state, including:
In RFIFO_SE state, after determining rdfifo exists sufficient space, by described PCIE DMA
The state of end interface controlled state machine changes to CMDRF_SE state, and exists in determining CMDfifo
After the storage order of space, the state of described PCIE DMA end interface controlled state machine is changed to
CMDRF_WRITE state, after the storage order of write space, controls described PCIE DMA end interface
The state of state machine changes to RFIFO_READ state, then corresponding data is read from rdfifo
Out, after having read, the state of described PCIE DMA end interface controlled state machine is changed to
PCIE_SERVE_IDLE state.
9. one kind is applied to multi-channel video and adopts the cache arbitration system of broadcast system, it is characterised in that include shape
State arrange module, the first requesting query module, the first request processing module, the second requesting query module and
Second request processing module；Wherein,
Described state setting module, for being set to idle condition by the state of request arbitration state machine；
Described first requesting query module, is used for inquiring about whether current period has FrameStore video and audio to appoint
Business request, if it is, notify described first request processing module startup work；If it is not, then notice
Described second requesting query module startup work；
Described first request processing module, for changing to first by the state of described request arbitration state machine
Request service state, and notify FrameStore_Channel end interface controlled state machine, to FrameStore
Video and audio task requests processes, and after this has processed, notifies that described state setting module opens
Start building to make；
Whether described second requesting query module, have PCIE DMA task requests for inquiry, if it does not,
Then notify described first requesting query module startup work, if it is, notify that described second request processes
Module startup work；
Described second request processing module, for changing to second by the state of described request arbitration state machine
Request service state, and notify PCIE DMA end interface controlled state machine, please to PCIE DMA task
Ask and process, and after this has processed, notify described state setting module startup work.
10. a multi-channel video based on PCIe interface adopts broadcast system, it is characterised in that include such as right
Require the cache arbitration system described in 9.
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