CN105957558A - Pulse parameter testing system based on two-terminal device - Google Patents
Pulse parameter testing system based on two-terminal device Download PDFInfo
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- CN105957558A CN105957558A CN201610248982.5A CN201610248982A CN105957558A CN 105957558 A CN105957558 A CN 105957558A CN 201610248982 A CN201610248982 A CN 201610248982A CN 105957558 A CN105957558 A CN 105957558A
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- terminal device
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- transistor
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
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- Tests Of Electronic Circuits (AREA)
Abstract
The invention provides a pulse parameter testing system based on a two-terminal device. The pulse parameter testing system comprises a pulse source, a two-channel oscilloscope with a first channel and a second channel, a probe bench, a two-terminal device to be tested and a transistor, wherein the two-terminal device to be tested and the transistor are located on the probe bench; the pulse source, the two-terminal device to be tested and the transistor compose a series branch; the input terminal of the first channel is connected with the input terminal of the two-terminal device to be tested; the output terminal of the first channel is grounded; the input terminal of the second channel is connected with the output terminal of the two-terminal device to be tested; and the output terminal of the second channel is grounded. The pulse parameter testing system has better current limiting effect, reduces parasitic capacitance in the testing system and lowers interference of charging and discharging in test accuracy, so more accurate test parameters are obtained.
Description
Technical field
The present invention relates to semiconductor test technical field, particularly relate to a kind of pulse parameter based on two terminal device
Test system.
Background technology
Substantial amounts of two terminal device is there is, such as resistance-variable storing device, ferroelectric memory, magnetic in novel memory devices
Memorizer, phase transition storage and the selector for memory interleave matrix.Based on device reliability examine
Consider, need to carry out corresponding parameter testing, specifically include dc sweeps test and pulse test, wherein, adopt
The read-write operation realizing memorizer by pulse mode is more nearly actual application.It addition, in order to prevent excessive electricity
The stream infringement to device performance, in the pulse parameter test system of two terminal device, needs to increase current-limiting circuit.
Here, as a example by resistance-variable storing device, illustrate that existing pulse parameter based on two terminal device tests system,
As it is shown in figure 1, existing pulse parameter based on resistance-variable storing device test system includes analyzing parameters of semiconductor
Instrument, switch matrix, pulse source, probe station, the resistance-variable storing device to be measured being positioned on described probe station, two
Oscilloscope channel and fixed value resistance.Wherein, described Semiconductor Parameter Analyzer passes through described switch matrix and institute
State pulse source to connect, so that described pulse source produces test under the control of described Semiconductor Parameter Analyzer
Required impulse waveform, described pulse source connects with described resistance-variable storing device to be measured, described fixed value resistance,
The other end ground connection of described fixed value resistance.The input of the first passage of described two oscilloscope channels is treated with described
The input of the resistance-variable storing device surveyed connects, its output head grounding, for capturing the arteries and veins of described pulse source output
Rush waveform；The input of the second channel of described two oscilloscope channels is defeated with described resistance-variable storing device to be measured
Go out end to connect, its output head grounding, for capturing the response impulse waveform of resistance-variable storing device to be measured, wherein,
Described fixed value resistance is for playing certain dividing potential drop metering function.
During realizing the present invention, inventor finds at least to exist in prior art following technical problem:
On the one hand, the existence of semiconductor analysis instrument, switch matrix so that the parasitic capacitance ratio in test system
Relatively big, thus the accuracy of test can be affected；On the other hand, it is in low resistance state when resistance-variable storing device to be measured
Time, if the resistance of fixed value resistance is smaller, the electric current in test system will be made very big, so that
Obtain described fixed value resistance and cannot play corresponding metering function；If the resistance value ratio of fixed value resistance is bigger, although
Metering function can be played so that the electric current of test system is smaller, but can extend the charging interval again, enters
And affect the accuracy of test.
Summary of the invention
Pulse parameter based on the two terminal device test system that the present invention provides, it is possible to test system is realized more
Good metering function, and reduce the parasitic capacitance in test system, reduce discharge and recharge to test accuracy
Interference, to obtain test parameter more accurately.
The present invention provide a kind of pulse parameter based on two terminal device test system, described system include pulse source,
There is first passage and two oscilloscope channels of second channel, probe station and be positioned at treating on described probe station
The two terminal device surveyed and transistor, wherein, described pulse source and described two terminal device to be measured, described crystal
Pipe composition series arm, the input of described first passage connects the input of described two terminal device to be measured,
The output head grounding of described first passage, the input of described second channel connects described two terminal device to be measured
Outfan, the output head grounding of described second channel.
Alternatively, described two terminal device is that resistance-variable storing device, ferroelectric memory, magnetic storage, phase transformation are deposited
Reservoir or the selector for memory crossover array.
Alternatively, the internal resistance of described first passage is 1M Ω, and the internal resistance of described second channel is 1M Ω.
Pulse parameter based on the two terminal device test system that the embodiment of the present invention provides, described system includes arteries and veins
Rush source, there is first passage and two oscilloscope channels of second channel, probe station and be positioned at described probe station
On two terminal device to be measured and transistor, wherein, described pulse source and described two terminal device to be measured, institute
Stating transistor composition series arm, the input of described first passage connects the defeated of described two terminal device to be measured
Entering end, the output head grounding of described first passage, the input of described second channel connects described to be measured two
The outfan of end-apparatus part, the output head grounding of described second channel.Compared with prior art, on the one hand, its
Eliminate analyzing parameters of semiconductor and switch matrix, greatly reduce the parasitic capacitance in test system, reduce
The discharge and recharge interference to test accuracy；On the other hand, it uses transistor to instead of fixed value resistance, this
The grid voltage that sample makes user have only to change transistor can be obtained by different cut-off currents, to play phase
The metering function answered, so that two terminal device can keep stable, not by excessive electricity in test process
Stream is punctured, and meanwhile, the characteristic that when utilizing transistor low-voltage, resistance is little also can reduce parasitic capacitance further
Impact such that it is able to reduce the discharge and recharge time；Utilizing transistor high voltage is that the characteristic that resistance is big again can
Make impulse waveform be easier to capture, thus obtain test parameter more accurately.
Accompanying drawing explanation
Fig. 1 is pulse parameter based on resistance-variable storing device test system in prior art；
Fig. 2 is pulse parameter based on the two terminal device test system of the present invention；
Fig. 3 is as a example by two terminal device to be measured is as resistance-variable storing device, the measured curve figure of transistor；
Fig. 4 is as a example by two terminal device to be measured is as resistance-variable storing device, two oscilloscope channel capture impulse waveforms
Schematic diagram.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with the present invention
Accompanying drawing in embodiment, is clearly and completely described the technical scheme in the embodiment of the present invention, it is clear that
Described embodiment is only a part of embodiment of the present invention rather than whole embodiments.Based on this
Embodiment in bright, the institute that those of ordinary skill in the art are obtained under not making creative work premise
There are other embodiments, broadly fall into the scope of protection of the invention.
The present invention provides a kind of pulse parameter based on two terminal device to test system, as in figure 2 it is shown, described system
Including pulse source, there is first passage and two oscilloscope channels of second channel, probe station and be positioned at described
Two terminal device to be measured on probe station and transistor, wherein, described pulse source and described two end-apparatus to be measured
Part, described transistor composition series arm, the input of described first passage connects described two end-apparatus to be measured
The input of part, the output head grounding of described first passage, the input of described second channel connect described in treat
The outfan of the two terminal device surveyed, the output head grounding of described second channel.
Specifically, described pulse source will put in two terminal device to be measured needed for test is provided
Impulse waveform, described first passage is for capturing the impulse waveform of described pulse source output, described second channel
For capturing the response impulse waveform of described two terminal device to be measured, described transistor is mainly used in as test system
System provides different cut-off currents, reaches corresponding metering function.
Pulse parameter based on the two terminal device test system that the embodiment of the present invention provides, compared with prior art,
On the one hand, that eliminate analyzing parameters of semiconductor and switch matrix, greatly reduce the parasitism in test system
Electric capacity, reduces the discharge and recharge interference to test accuracy；On the other hand, its use transistor instead of and determines
Value resistance, the voltage so making user have only to change transistor can be obtained by different cut-off currents, with
Play corresponding metering function, so that two terminal device can keep stable, not by mistake in test process
Big electric current is punctured, and meanwhile, the characteristic that when utilizing transistor low-voltage, resistance is little also can reduce further posts
The impact of raw electric capacity such that it is able to reduce the discharge and recharge time；Utilizing transistor high voltage is the characteristic that resistance is big
Enable to again impulse waveform and be easier to capture, thus obtain test parameter more accurately.
Wherein, described two terminal device to be measured can with resistance-variable storing device, ferroelectric memory, magnetic storage,
Phase transition storage or the selector for memory crossover array, but it is not limited to this.
Wherein, the internal resistance of described first passage is 1M Ω, and the internal resistance of described second channel is 1M Ω.
As a example by two terminal device to be measured is as resistance-variable storing device, can having of the use of transistor is above-mentioned excellent
Point is relevant with the characteristic of transistor, as it is shown on figure 3, be the measured curve of transistor, wherein, and the grid of transistor
Pole tension VgFor 2V, abscissa represents that drain voltage, vertical coordinate represent drain current.As seen from the figure,
User has only to change the voltage of transistor and can be obtained by different cut-off currents；Meanwhile, resistance-variable storing device is worked as
When being in high-impedance state, the pulse voltage in the test system shown in Fig. 2 mainly puts on resistance-variable storing device to be measured
On, the voltage on transistor is the least, and under small voltage, the resistance of transistor is the least, thus reduces further and post
Raw electric capacity, and reduce the discharge and recharge time；Dividing potential drop meeting when resistance-variable storing device is in low resistance state, on transistor
Suddenly increasing, transistor shows as a bigger resistance under high voltages, the most both can realize effectively
Ground current limliting, the pulse voltage that second channel can be made again to be detected is bigger, thus is easier to capture pulse voltage.
As shown in Figure 4, as a example by with two terminal device to be measured as resistance-variable storing device, two oscilloscope channel capture arteries and veins
Rushing the schematic diagram of waveform, wherein, the impulse waveform of described first passage capture is the arteries and veins that described pulse source sends
Rush waveform, the response impulse waveform that impulse waveform is resistance-variable storing device of described second channel capture, TsetFor resistance
In the transition storage erasing time, this is also the important parameter that resistance-variable storing device carries out that pulse parameter test needs to extract.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited to
This, any those familiar with the art, in the technical scope that the invention discloses, can readily occur in
Change or replacement, all should contain within protection scope of the present invention.Therefore, protection scope of the present invention
Should be as the criterion with scope of the claims.
Claims (3)
1. pulse parameter based on a two terminal device test system, it is characterised in that described system includes arteries and veins
Rush source, there is first passage and two oscilloscope channels of second channel, probe station and be positioned at described probe station
On two terminal device to be measured and transistor, wherein, described pulse source and described two terminal device to be measured, institute
Stating transistor composition series arm, the input of described first passage connects the defeated of described two terminal device to be measured
Entering end, the output head grounding of described first passage, the input of described second channel connects described to be measured two
The outfan of end-apparatus part, the output head grounding of described second channel.
System the most according to claim 1, it is characterised in that described two terminal device be resistance-variable storing device,
Ferroelectric memory, magnetic storage, phase transition storage or the selector for memory crossover array.
System the most according to claim 1, it is characterised in that the internal resistance of described first passage is 1M Ω,
The internal resistance of described second channel is 1M Ω.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610248982.5A CN105957558A (en) | 2016-04-20 | 2016-04-20 | Pulse parameter testing system based on two-terminal device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610248982.5A CN105957558A (en) | 2016-04-20 | 2016-04-20 | Pulse parameter testing system based on two-terminal device |
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| CN105957558A true CN105957558A (en) | 2016-09-21 |
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| CN201610248982.5A Pending CN105957558A (en) | 2016-04-20 | 2016-04-20 | Pulse parameter testing system based on two-terminal device |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060267573A1 (en) * | 2005-05-24 | 2006-11-30 | Hideki Horii | System and method of determining pulse properties of semiconductor device |
| CN102610273A (en) * | 2011-12-22 | 2012-07-25 | 北京大学 | Method for reducing converted currents of resistive random access memories |
-
2016
- 2016-04-20 CN CN201610248982.5A patent/CN105957558A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060267573A1 (en) * | 2005-05-24 | 2006-11-30 | Hideki Horii | System and method of determining pulse properties of semiconductor device |
| CN102610273A (en) * | 2011-12-22 | 2012-07-25 | 北京大学 | Method for reducing converted currents of resistive random access memories |
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Application publication date: 20160921 |