CN105933089B - A kind of device for encoding and decoding and modem based on extended pattern Manchester code - Google Patents
A kind of device for encoding and decoding and modem based on extended pattern Manchester code Download PDFInfo
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- CN105933089B CN105933089B CN201610227264.XA CN201610227264A CN105933089B CN 105933089 B CN105933089 B CN 105933089B CN 201610227264 A CN201610227264 A CN 201610227264A CN 105933089 B CN105933089 B CN 105933089B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1108—Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
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- Computer Networks & Wireless Communication (AREA)
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- Dc Digital Transmission (AREA)
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Abstract
The invention discloses a kind of device for encoding and decoding and modem based on extended pattern Manchester code.Modem of the invention is by extended pattern Manchester's code device, modulation module, demodulation module, the components such as extended pattern Manchester decoder composition, it is extended type Manchester's code to symbol to be passed by extended pattern Manchester's code device, exports coding clock and symbol, clock and signal after being modulated after it is modulated by modulation module, the signal obtains receiving signal after sampling after transmission, it is sent into demodulation module, Soft Inform ation after obtaining demodulation clock after demodulation module is demodulated and demodulating, it is sent into extended pattern Manchester decoder, clock and symbol after being decoded after the soft decoding of extended pattern Manchester.The present invention has the characteristics that preferable anti-carrier wave frequency deviation, anti-Doppler frequency displacement ability and realization are simple, especially suitable in the low speed transmissions communication system of the Bandwidth-Constrained with maximum Doppler frequency shift.
Description
Technical field
The present invention relates to the dresses of the parts such as extended pattern Manchester's code, extended pattern Manchester soft decoding in the communications field
It sets.Especially suitable in the low speed transmissions communication system of the Bandwidth-Constrained with maximum Doppler frequency shift.
Background technique
Existing manchester codec device indicates transmission code using the jump of two different phase binary codes
Member, timed-branching is abundant, it is simple to realize, and has certain interference free performance, but it encodes multiplying power and is fixed as true form rate 2
Times, and decoded after demodulation by the jump of symbol after judgement, it can not achieve the soft decoding based on demodulating information, lead to it
The bandwidth that cannot be supported according to channel flexibly changes coding multiplying power, and has certain performance loss on demodulation performance, when
When it is applied to the low speed transmissions communication system of Bandwidth-Constrained, do not have the ability of anti-maximum Doppler frequency shift.
Summary of the invention
Present invention aims at the manchester codec avoided in above-mentioned background technique coding multiplying power it is not flexible, do not have
The shortcoming of the ability of anti-maximum Doppler frequency shift and a kind of low speed transmissions communication system that can be suitable for Bandwidth-Constrained is provided
In the extended pattern Manchester code based on soft decoding device for encoding and decoding and modem.The present invention has coding multiplying power spirit
The features such as work, anti-maximum Doppler frequency shift and simple realization.
The object of the present invention is achieved like this:
A kind of extended pattern Manchester code encoding device, including frequency division module 5, pattern generation module 6 and coding module 7;
Frequency division module 5 receives external high frequency clock and is divided high frequency clock after obtaining encoded clock, and encoded clock is sent to code
Type generation module 6;Pattern generation module 6 generates corresponding coded pattern according to coding multiple, by encoded clock and coded pattern
It send to coding module 7;Coding module 7 receives external chip clock to be passed and external symbol to be passed, by coded pattern and to be passed
After symbol is aligned, code symbols are obtained after the two is carried out same or operation;Wherein, coding multiple is oneself more than or equal to 2
So number.
A kind of modulator, including modulation module 2 and extended pattern Manchester code encoding device 1, extended pattern Manchester are compiled
Code device 1 receives external high frequency clock, external chip clock to be passed and external symbol to be passed, and high frequency clock is divided to obtain
Encoded clock, and corresponding coded pattern is generated according to coding multiple, after coded pattern and symbol to be passed are carried out same or operation
Code symbols are obtained, and encoded clock and code symbols are exported to modulation module 2;
Modulation module 2 receives external high frequency clock, code symbols and encoded clock, the carrier wave and coding code that itself is generated
Member is modulated modulated after clock and modulation after signal, by after modulation signal be sent into channel transmit.
A kind of extended pattern Manchester decoder based on soft decoding, including the first hard decision module 8-1, second are firmly
Judging module 8-2, sliding correlation module 9, split-phase bit extraction module 10, accumulator module 11, comparison module 12, symbol mark generate
Module 13 and soft value merging module 14;First hard decision module 8-1 obtains judgement symbol after external Soft Inform ation is carried out hard decision,
And judgement symbol is sent to sliding correlation module 9;Sliding correlation module 9 slides the coded pattern of its own and judgement symbol
Dynamic relevant calculation obtains sliding correlation, and is passed to split-phase bit extraction module 10;Split-phase bit extraction module 10 will slide phase
Pass value is extracted in N number of different phase, obtains clock and correlation that the road N represents out of phase, and by clock and correlation
Value is sent to accumulator module 11;It is coded pattern that accumulator module 11 calculates separately correlation in the correlation of the road N in predetermined interval
The number of length, and the corresponding clock of the correlation is sent to comparison module 12;Every road correlation is by comparison module 12
The number of coded pattern length and be compared, it is biggish all the way to select numerical value, the road Bing Jianggai clock alternatively mark send to
Symbol mark generation module 13;When symbol mark generation module 13 will generate be aligned with a selection marker and width to demodulate
The pulse of clock length is sent as symbol mark to soft value merging module 14;The reception of soft value merging module 14 external clock, outside are soft
The external Soft Inform ation that length is coding multiple is carried out soft value merging using symbol mark as start bit by information and symbol mark, and
By after merging clock and Soft Inform ation send to the second hard decision module 8-2;Second hard decision module 8-2 is to the Soft Inform ation after merging
Clock after being decoded after progress hard decision and the symbol after decoding;It slides correlation module 9, split-phase bit extraction module 10, tire out
Module 11, comparison module 12 and symbol mark generation module 13 is added to receive external clock;Wherein, the value of N, coded pattern are long
Degree is identical as the coding value of multiple.
A kind of demodulator, including demodulation module 3 and extended pattern Manchester decoder 4, modulated signal pass through channel
Transmission post-sampling obtains receiving signal, will receive signal and sampling clock is sent into demodulation module 3;Demodulation module 3 is by sampling clock
Demodulation clock and Soft Inform ation after demodulation are obtained after signal is demodulated respectively with receiving, by Soft Inform ation one after demodulation clock and demodulation
One is sent into extended pattern Manchester decoder 4;
Extended pattern Manchester decoder 4 will demodulate after Soft Inform ation after hard decision, calculate hard decision result with
Coded pattern out of phase correlation, and in predetermined interval calculate correlation be coded pattern length number, choose
Correlation is that the number of coded pattern length and the maximum phase of middle numerical value carry out soft value merging, then carries out hard decision, obtains
Extended pattern Manchester code decoding after clock and decoding after symbol.
The present invention has the following advantages over the background art: coding multiplying power is flexible;Anti- maximum Doppler frequency shift;It realizes simple;
Low speed transmissions communication system suitable for Bandwidth-Constrained.
Detailed description of the invention
Fig. 1 is the electrical schematic block diagram of modem of the present invention.
Fig. 2 is the electrical schematic diagram of extended pattern Manchester code encoding device embodiment of the invention.
Fig. 3 is the electrical schematic diagram of extended pattern Manchester decoder embodiment of the invention.
Specific embodiment
Referring to Fig.1, modem of the invention is by extended pattern Manchester code encoding device 1, modulation module 2, demodulation
Module 3, extended pattern Manchester decoder 4 form.
The effect of extended pattern Manchester's code device 1 of the present invention is that coding multiple is set according to communication requirement, by encoding
Multiple selects corresponding coded pattern, and carries out Manchester's code to symbol to be passed.Fig. 2 is extended pattern Manchester code coding
The electrical schematic block diagram of device 1, embodiment press Fig. 2 connection line.It is by frequency division module 5, pattern generation module 6 and coding module
7 are constituted;Wherein, frequency division module 5 is divided out the clock of N times of (N is determined according to communication requirement) chip rate to be passed by high frequency clock;
Pattern generation module 6 generates the coded pattern that coding multiplying power is N using the clock;Coding module 7 is by coded pattern and code to be passed
Same or operation, symbol after the Manchester's code of being expanded property are carried out after member alignment.
The effect of extended pattern Manchester of the present invention decoder 4 is Soft Inform ation after demodulating after hard decision,
By calculating the correlation with coded pattern of out of phase, it is coding code that correlation is calculated in the section of a certain designated length
The number of type length N chooses the maximum phase of numerical value and carries out soft value merging, then carries out hard decision, the type that is expanded Man Chesi
Clock and symbol after special soft decoding.Fig. 3 is the electrical schematic block diagram of extended pattern Manchester of the present invention decoder 4, real
Example is applied by Fig. 3 connection line.It is by the first hard decision module 8-1, the second hard decision module 8-2, sliding correlation module 9, split-phase
Bit extraction module 10, accumulator module 11, comparison module 12, symbol mark generation module 13 and soft value merging module 14 are constituted;Its
In, the first hard decision module 8-1 will demodulate Soft Inform ation and carry out hard decision, obtain judgement symbol;Slide 9 pairs of judgement codes of correlation module
Member carries out sliding relevant calculation with coded pattern, obtains sliding correlation;Split-phase bit extraction module 10 will slide correlation N number of
Different phases are extracted, and clock and correlation that the road N represents out of phase are obtained;Accumulator module 11 is divided in predetermined interval
Correlation Ji Suan not represented in the correlation of the road out of phase N as the number of coded pattern length N;Comparison module 12 is related by every road
Value is that the number of coded pattern size N is compared, and selects that numerical value is biggish all the way, and the road Bing Jianggai clock alternatively indicates;
Symbol mark generation module 13 generates pulse of the width being aligned with selection marker for demodulation clock length as symbol mark
Will;Length is to encode the demodulation Soft Inform ation progress soft value conjunction of multiple N using symbol mark as start bit by soft value merging module 14
And second hard decision module 8-2 will merge after Soft Inform ation carry out hard decision, symbol after being decoded.
Fig. 1 is modem electrical schematic block diagram of the invention, and embodiment presses Fig. 1 connection line.Wherein, extended pattern is graceful
Che Site code device 1 receives high frequency clock, external chip clock to be passed and symbol to be passed respectively, and carries out to symbol to be passed
Extended pattern Manchester's code, the clock frequency after extended pattern Manchester's code are N times before coding, and wherein N is coding times
Number, for the natural number more than or equal to 2, clock after coding and symbol are exported to modulation module 2;After 2 pairs of modulation module codings
Clock and symbol are modulated, clock and signal after being modulated, and signal after modulation is sent into transmission;Modulated signal is passed through
It obtains receiving signal after receiving signal sampling clock sampling after transmission, is sent into demodulation module 3, demodulation module 3 will receive
Soft Inform ation after demodulation clock, demodulation is obtained after signal is demodulated, and Soft Inform ation after demodulation clock, demodulation is sent into extended pattern one by one
Manchester decoder 4;Extended pattern Manchester decoder 4 after hard decision, leads to the Soft Inform ation after demodulation
The correlation with coded pattern for calculating out of phase is crossed, it is coded pattern that correlation is calculated in the section of a certain designated length
The number of length N chooses the maximum phase of numerical value and carries out soft value merging, then carries out hard decision, the type that is expanded Manchester
Clock and symbol after soft decoding.
Claims (2)
1. a kind of extended pattern Manchester decoder based on soft decoding, including the first hard decision module (8-1), feature
It is: further includes the second hard decision module (8-2), sliding correlation module (9), split-phase bit extraction module (10), accumulator module
(11), comparison module (12), symbol mark generation module (13) and soft value merging module (14);First hard decision module (8-1)
Judgement symbol is obtained after external Soft Inform ation is carried out hard decision, and judgement symbol is sent to sliding correlation module (9);Sliding is related
The coded pattern of its own and judgement symbol are carried out sliding relevant calculation and obtain sliding correlation by module (9), and are passed to
Split-phase bit extraction module (10);Split-phase bit extraction module (10) will be slided correlation and be extracted in N number of different phase, obtain
The road N represents the clock and correlation of out of phase, and clock and correlation are sent to accumulator module (11);Accumulator module (11)
The number that correlation in the correlation of the road N is coded pattern length is calculated separately in predetermined interval, and the correlation is right with it
The clock answered is sent to comparison module (12);Comparison module (12) is by the number that every road correlation is coded pattern length and compares
Compared with selecting that numerical value is biggish all the way, and alternatively mark is sent to symbol mark generation module (13) road Bing Jianggai clock;Symbol mark
Will generation module (13) will generate pulse of be aligned with the selection marker and width for demodulation clock length as symbol mark
Will is sent to soft value merging module (14);Soft value merging module (14) receives external clock, external Soft Inform ation and symbol mark, with code
Member mark is start bit, be to encode the external Soft Inform ation progress soft value merging of multiple for length, and by clock after merging and soft
Information is sent to the second hard decision module (8-2);Second hard decision module (8-2) obtains after carrying out hard decision to the Soft Inform ation after merging
The symbol after clock and decoding after to decoding;Slide correlation module (9), split-phase bit extraction module (10), accumulator module (11),
Comparison module (12) and symbol mark generation module (13) receive external clock;Wherein, the value of N, coded pattern length with
The value for encoding multiple is identical.
2. a kind of demodulator, including demodulation module (3), it is characterised in that: further include that extended pattern as described in claim 1 is graceful thorough
This special decoder (4), modulated signal obtain receiving signal by transmission post-sampling, will receive signal and sampling clock
It is sent into demodulation module (3);Demodulation module (3) obtains demodulation clock reconciliation after being demodulated sampling clock and reception signal respectively
Soft Inform ation after demodulation clock and demodulation is sent into extended pattern Manchester decoder (4) by Soft Inform ation after tune one by one;
Soft Inform ation calculates hard decision result and compiles after hard decision after extended pattern Manchester decoder (4) will demodulate
Code pattern out of phase correlation, and in predetermined interval calculate correlation be coded pattern length number, choose phase
Pass value is that the number of coded pattern length and the maximum phase of middle numerical value carry out soft value merging, then carries out hard decision, is expanded
Exhibition type Manchester code decoding after clock and decoding after symbol.
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CN102045275A (en) * | 2009-10-16 | 2011-05-04 | 昆山九华电子设备厂 | Cable-transmitted Manchester coded signal receiver |
CN103647558A (en) * | 2013-12-03 | 2014-03-19 | 北京中电华大电子设计有限责任公司 | Manchester encoder circuit |
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CN102045275A (en) * | 2009-10-16 | 2011-05-04 | 昆山九华电子设备厂 | Cable-transmitted Manchester coded signal receiver |
CN103647558A (en) * | 2013-12-03 | 2014-03-19 | 北京中电华大电子设计有限责任公司 | Manchester encoder circuit |
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