CN105897184B - A kind of low-noise amplifier - Google Patents
A kind of low-noise amplifier Download PDFInfo
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- CN105897184B CN105897184B CN201610192381.7A CN201610192381A CN105897184B CN 105897184 B CN105897184 B CN 105897184B CN 201610192381 A CN201610192381 A CN 201610192381A CN 105897184 B CN105897184 B CN 105897184B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
- H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3036—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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Abstract
The invention discloses a kind of low-noise amplifiers, including：Match amplification grade circuit, including the first transistor, second transistor, the first output node and the second output node；The source level of the first transistor is coupled to antenna impedance, and drain electrode is coupled to the first output node；The grid of second transistor is coupled to the source level of the first transistor, and drain electrode is coupled to the second output node；Gain promotes grade circuit, including a pair of transistor and second pair of transistor for being coupled to a pair of transistor；A pair of transistor is coupled respectively to the first output node and the second output node.The advantageous effect of the invention is：The minimum that first order noise is ensured while realizing wideband impedance match realizes the output impedance balance of differential ends, eliminates the non-linear of gain elevator belt to promote the noiseproof feature of whole LNA.
Description
Technical field
The present invention relates to wireless communication transceiver technical field more particularly to a kind of low-noise amplifiers.
Background technology
With the development of technology, integrated wireless communications chip is widely used in combat system, extensive emergency communication system
System, navigator fix, Internet of Things, sensor network, digital television broadcasting, public safety, intelligent building household, radio station, shifting
Multiple industries such as dynamic terminal, Toy electronics, have accordingly also derived various communication protocol standard.In order to comply with the need in market
It asks, the research that Current wireless communication field is most popular is exactly to design the transponder chip of a compatible multi-protocols, to meet user
The demands such as growing voice, video, browsing data, this requires the first order as wireless communication transceiver signal processing
Amplifier (low-noise amplifier, English write a Chinese character in simplified form LNA) is needed with broadband, high-gain, high linearity, low noise, impedance
With etc. characteristic index.Meanwhile to make signal preferably handle, it is desirable that LNA can be with output difference signal.
LNA is the first order that chip is connected with antenna, it plays the role of being amplified aerial signal.In this mistake
Cheng Zhong, the useful signal in communication band are amplified by low-noise amplifier, and the noise generated by radio spatial channels is amplified
The gain of device inhibits, and it is very small to simultaneously amplify the additional noise of device itself so that had no effect on while useful signal is amplified
Its quality.All kinds of interference that radio spatial channels transmit will generate signal intermodulation amount, and the interference of this part will be good by amplifier
Linear properties inhibit.
From structure, LNA currently on the market is broadly divided into two classes：One kind is differential-input differential output type
LNA, this structure need the transformer of an external single-ended transfer difference, in a disguised form improve cost when being matched with antenna；
Another kind of is the LNA of single ended input, difference output, and this LNA needs not needing external transformer, while being eliminated using noise
Structure can eliminate input terminal a transistor noise (main noise source), but this structure often exist output
The unbalanced problem of impedance differential ends.
In terms of matching way, LNA currently on the market is broadly divided into following two categories：One kind be using piece external inductance capacitance into
Row impedance matching, but this solution increases passive devices outside piece, and often make LNA's to be operated in narrowband, it is applied to single-frequency point
Wireless communication；Another kind of is the source electrode input impedance characteristic using transistor, forms the matching of common gate pipe, and this matching can be with
Reach good effect in the frequency band of several GHz, but stringent due to requiring the mutual conductance of transistor, significantly limits LNA's
Gain performance.
Invention content
The technical problem to be solved in the present invention is, for the impedance matching of LNA, low noise, High Linear in background technology
Compromise problem between the characteristics such as degree, impedance balance, high-gain, provides a kind of low-noise amplifier.
The technical solution adopted by the present invention to solve the technical problems is：A kind of low-noise amplifier is constructed, including：
Match amplification grade circuit, including input node, the first transistor, second transistor, the first output node and second
Output node；The source level of the first transistor is coupled to the input node, and drain electrode is coupled to first output node,
The noise current at the input node to be converted to the first noise voltage of first output node；Second crystal
The grid of pipe is coupled to the source level of the first transistor, and drain electrode is coupled to second output node, by the input
Noise current at node is converted to the second noise voltage of second output node；Pass through second noise voltage and institute
The summation of the first noise voltage is stated to eliminate the noise of the first transistor；And
Gain promotes grade circuit, including a pair of transistor and second pair of crystal for being coupled to described a pair of transistor
Pipe；Described a pair of transistor is coupled respectively to first output node and second output node, described in setting
The current polarity of a pair of transistor and second pair of transistor is to inhibit the noise of the second transistor.
In low-noise amplifier of the present invention, described a pair of transistor includes：
Third transistor, grid are coupled to first output node；And
4th transistor, grid are coupled to second output node.
In low-noise amplifier of the present invention, second pair of transistor includes：
5th transistor, grid are coupled to the grid of the third transistor, and the two of the mutual conductance of the 5th transistor
Order derivative is opposite with the quadratic derivative symbols of the mutual conductance of the third transistor；And
6th transistor, grid are coupled to the grid of the 4th transistor, and the two of the mutual conductance of the 6th transistor
Order derivative is opposite with the quadratic derivative symbols of mutual conductance of the 4th transistor.
In low-noise amplifier of the present invention, it further includes the first capacitance and the second electricity that the gain, which promotes grade circuit,
Hold；Described first is capacitively coupled between the grid of the third transistor and the grid of the 5th transistor, and described second
It is capacitively coupled between the grid and the grid of the 6th transistor of the 4th transistor.
In low-noise amplifier of the present invention, it further includes first resistor and the second electricity that the gain, which promotes grade circuit,
Resistance；The first resistor is coupled to the drain electrode of the third transistor, and the second resistance is coupled to the 4th transistor
Drain electrode.
In low-noise amplifier of the present invention, the first transistor is total gate transistor, second crystal
Pipe is common source transistors.
In low-noise amplifier of the present invention, the matching amplification grade circuit further includes：
Gate resistance altogether, is coupled to the drain electrode of the first transistor；And
Common source resistance is coupled to the drain electrode of the second transistor.
In low-noise amplifier of the present invention, the matching amplification grade circuit further includes input capacitance, described defeated
Between the grid for entering the source level for being capacitively coupled to the first transistor and the second transistor.
In low-noise amplifier of the present invention, the matching amplification grade circuit further includes piece external inductance, described
External inductance is coupled to the source level of the first transistor.
A kind of low-noise amplifier disclosed above has the advantages that：By being adopted in the matching amplifying stage by prime
Structure is eliminated with noise, the minimum of first order noise is ensured while realizing wideband impedance match, to promote entirety
The noiseproof feature of LNA；Grade is promoted in the gain by rear class, multiple transistor multiplexing structure is used, since it is a kind of symmetry
The output impedance of structure, differential ends is balance.This structure eliminates gain elevator belt while promoting entire gain
That comes is non-linear.At the same time, since the transistor of weak transoid is in the rear stage of LNA, the noise introduced is can to ignore
Disregard.It sees on the whole, such technical solution effectively improves the noiseproof feature of LNA circuits, gain performance, while simultaneously
Its linear properties is not deteriorated.
Description of the drawings
Fig. 1 is a kind of functional block diagram of low-noise amplifier provided by the invention；
Fig. 2 is a kind of structural schematic diagram of low-noise amplifier provided by the invention；
Fig. 3 is g ＂ provided by the inventionmElimination principle schematic.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that described herein, specific examples are only used to explain the present invention, not
For limiting the present invention.
It is provided by the invention that the present invention provides one kind being combined with noise cancellation technique and more field-effect multiplexing technologies
The LNA of (Multi-gated Transistor, MGTR), the rear class that structure is eliminated in a kind of noise use the slow of MGTR forms
Device is rushed, solves the compromise problem between the characteristics such as impedance matching, low noise, high linearity, impedance balance, the high-gain of LNA.Ginseng
See that Fig. 1, Fig. 1 are a kind of functional block diagram of low-noise amplifier provided by the invention.The low-noise amplifier includes two-stage, respectively
It is that matching amplifying stage promotes grade with gain.Wherein, matching amplifying stage uses total grid input matching and eliminates structure with noise, realizes
Conversion and the extremely low noiseproof feature of the Broadband Matching of LNA, single-ended-to-difference.Its introduce the unbalanced problem of output impedance by
Second stage gain promotes grade and solves, while gain promotes grade and provides positive gain, so that whole LNA gains is got a promotion, solves
Amplifying stage is matched because of the low problem of the next gain of grid matching strip altogether.Furthermore gain promoted grade use two be operated in it is weak anti-
The NMOS transistor in type area, the amplifying transistor of third-order non-linear current polarity and this grade that they are promoted on the contrary, offset each other,
To eliminate the nonlinear problem that amplifying transistor is brought, therefore this grade provides gain and excellent linear properties simultaneously.
Referring to Fig. 2, Fig. 2 is a kind of structural schematic diagram of low-noise amplifier 100 provided by the invention, the low noise amplification
Device 100 includes that matching amplification grade circuit 1 and gain promote grade circuit 2.
One, amplification grade circuit 1 is matched
It includes input node 10, the first transistor 11, second transistor 12, the first output node to match amplification grade circuit 1
13 and second output node 14；The source level of the first transistor 11 is coupled to the input node 10 (i.e. antenna impedance),
Drain electrode is coupled to first output node 13, and the noise current at the input node 10 is converted to first output
First noise voltage of node 13；The grid of the second transistor 12 is coupled to the source level of the first transistor 11, leakage
Pole is coupled to second output node 14, and the noise current at the input node 10, which is converted to second output, to be saved
Second noise voltage of point 14；Differential signal is formed by second noise voltage and first noise voltage to eliminate the
The noise of one transistor 11；Specifically, the first transistor 11 is total gate transistor (M1), the second transistor 12 is total
Source transistor (M2).The matching amplification grade circuit 1 further includes input capacitance 17, piece external inductance 18, altogether 15 (R of gate resistanceCG) and
16 (R of common source resistanceCS).Gate resistance 15 is coupled to the drain electrode of the first transistor 11 altogether；Common source resistance 16 is coupled to described
The drain electrode of two-transistor 12.The input capacitance 17 is coupled to the source level and the second transistor 12 of the first transistor 11
Grid between.Described external inductance 18 is coupled to the source level of the first transistor 11.
The parameter matched in amplification grade circuit 1 is as follows：
iin：By the equivalent input small-signal current of aerial signal；
gM, CG：The mutual conductance of the total gate transistor M1 of input；
gM, CS：Input the mutual conductance of common source transistors M2；
VN, in：The noise voltage generated by M1 is in the equivalent of its source electrode；
VN, CG：Noise equivalent voltages of the M1 in output end (drain electrode)；
VN, CS：Noise equivalent voltages of the M2 in output end (drain electrode)；
AV, CG：Gain amplifiers of the M1 to signal；
AV, CS：Gain amplifiers of the M2 to signal.
Matching amplifying stage is composed of total grid input transistors M1 and common source input transistors M2.Grid input transistors altogether
Input impedance can be considered the inverse of its mutual conductance, i.e. 1/gM, CG, antenna impedance is regarded as RS, then only need the two equal, so that it may in phase
When realizing impedance matching in wide frequency range, i.e.,
The principle that its single-ended signal switchs to differential signal is as follows：Firstly, for from antenna impedance RsIt is input to the source electrode of M1
Signal, it is believed that the signal is a small-signal current iin, which will pass through M1, in the load R of M1CGIt is upper
It crosses, according to Kirchhoff's current law (KCL), input small-signal current is calculated as：
This means that the input impedance of gate transistor M1 can be expressed as altogether：
From (2), formula can obtain, the gain A that M1 is providedV, CGFor AV, CG=gM, CG·RCG.And for M2, it is standard
Common source input amplifying transistor, therefore its gain is equal to being multiplied for mutual conductance and load, while generating reversion to the phase of signal,
As AV, Cs=-gM, CS·RCS.It integrates, then has：
AV, CG=-AV, Cs=gM, CG·RCG=gM, Cs·RCs (3)
From (3), formula can see, and for the same aerial signal, M1 is identical to its gain amplifier size as M2, but pole
Property on the contrary, therefore the leakage output in M1 and M2 is formed that amplitude is identical and phase differs 180 ° of differential signal, to complete
Transition process of the single-ended signal to differential signal.
Its low noise principle is to be amplified the noise Vn of M1 sources using common source transistors M2, is generated with M1 drain terminals namely
RCGLocate that phase is identical and the identical noise of amplitude, to which in the differential signal of output, this noise can offset each other, this
Sample sees that the noise that M1 is generated just is eliminated on the whole.Since M1 is the transistor in the first order, there is amplification to signal
Effect, therefore this partial noise is eliminated will greatly be conducive to the Low Noise Design of LNA.This process needs to meet some
Part, first, the noise current generated by M1 is from RCGIt flow to the R of antenna endS, this noise current will be in the source electrode and drain electrode of M1 point
Noise voltage is not generated
Meanwhile VN, inIt is amplified via the grid of M2, according to formula (3), this noise voltage is enlarged into：
VN, CS=VN, in·AV, CS=α in·RS·(-gM, CS·RCS) (4)
By formula (2), (3), formula (4) can be scaled：
VN, CS=-α in·RCG=VN, CG (5)
It can be seen that in the drain terminal of M1 and M2, the noise voltage that is generated by M1 be same-phase and amplitude one to.Due to difference
Sub-signal is that both ends signal subtraction is got, therefore in dii iotaererifiars iotajgn ' al transmission, this noise is during subtracting each other due to phase
Amplitude one to and be cancelled, to which the noise of M1 is completely eliminated.Significantly, since M1 and M2 is to be in the first order
Amplifying transistor, their noise influences to be the largest for LNA, and the noiseproof feature of LNA can be made by eliminating the noise of M1
Greatly optimized.
On the other hand, the noise of M2 can not be eliminated by this structure, but due to the work of impedance matching mainly by
M1 is completed, therefore it is not absolutely required to it to keep specific mutual conductance for the size of M2, it is possible to which the size by increasing M2 (carries
High mutual conductance) inhibit the noise of M2.In order to meet (3) formula, mutually in requisition for the load resistance R for reducing M2CS, cause in this way
Output impedance with amplifying stage is uneven, this problem promotes grade by the second stage gain and solves.
Two, gain promotes grade circuit 2
It includes a pair of transistor 21 and second pair of crystalline substance for being coupled to described a pair of transistor 21 that gain, which promotes grade circuit 2,
Body pipe 22；Described a pair of transistor 21 is coupled respectively to first output node 13 and second output node 14, leads to
The current polarity for setting described a pair of transistor 21 and second pair of transistor 22 is crossed to inhibit the second transistor 12
Noise.Specifically, described a pair of transistor 21 includes third transistor 211 (M3) and the 4th transistor 212 (M4).Third
The grid of transistor 211 is coupled to first output node 13；The grid of 4th transistor 212 is coupled to second output
Node 14.Second pair of transistor 22 includes the 5th transistor 221 (M5) and the 6th transistor 222 (M6).5th transistor
221 grid is coupled to the grid of the third transistor 211, the second dervative of the mutual conductance of the 5th transistor 221 and institute
The quadratic derivative symbols for stating the mutual conductance of third transistor 211 are opposite；The grid of 6th transistor 222 is coupled to the 4th crystal
The grid of pipe 212, the second order of the second dervative of the mutual conductance of the 6th transistor 222 and the mutual conductance of the 4th transistor 212
Derived indice is opposite.It further includes first resistor 25 (Rout), second resistance 26 (Rout), first that the gain, which promotes grade circuit 2,
Capacitance 23 and the second capacitance 24；First capacitance 23 is coupled to the grid of the third transistor 211 and the 5th crystal
Between the grid of pipe 221, second capacitance 24 is coupled to the grid of the 4th transistor 212 and the 6th transistor
Between 222 grid.The first resistor 25 is coupled to the drain electrode of the third transistor 211, and the second resistance 26 couples
To the drain electrode of the 4th transistor 212.
The parameter that gain is promoted in grade circuit 2 is as follows：
gm：The mutual conductance of transistor；
g″m：The second dervative of transistor transconductance.
IIP3：Input Third Intercept Point input third order intermodulation point, and characterization circuit linear properties are bigger
Better.
In matching amplifying stage, promote mutual conductance although M2 in Fig. 2 can change size and inhibit noise, its gain due to
It keeps in the same size with M1, therefore is still limited by M1.And M1 is in order to realize that impedance matching needs to meet
Also its mutual conductance g is limitedM, CGValue, to having prodigious limitation to gain.If excessively negative by promoting it
Carry resistance RCGSeek the promotion of gain, then out-put dynamic range can be caused to decline because of the limitation of supply voltage again, or even lead
Cause M1 because drain terminal undertension is difficult to work normally.Therefore, it is difficult to high-gain performance in matching amplifying stage.
This technology promotes grade in gain and has sought the promotion of gain, while it is uneven to solve matching amplifying stage output impedance
The problem of.And it is different from general technology, bring serious nonlinear problem, the present invention to promote grade in gain when gain is promoted
Multiple transistor multiplexing technology (MGTR) is introduced, the non-linear electricity of amplifying transistor is eliminated using additional weak transoid transistor
Stream, the nonlinear problem come by gain elevator belt to removal.
M3 and M4 is to be operated in the amplifying transistor of saturation region, and M5 and M6 is the extra transistor for being operated in weak inversion regime
(faint to signal amplifying function).For a transistor, third order intermodulation point IIP3Be calculated as：
From formula (6) as can be seen that in order to make IIP3Maximum value, the second dervative mutual conductance g " of transistor are obtained as far as possiblemIt needs
Close to 0.However, for one is operated in the transistor of saturation region (to obtain excellent amplification effect), g "mFor
Negative value leads to IIP to generate third-order non-linear3Index declines.Unlike the transistor for being operated in saturation region, work
In the g of the transistor of weak inversion regime "mFor positive value.Carried in gain used in the present invention it is during upgrading, by introduce work in it is weak anti-
The M5 and M6 in type area provide positive g "m, the negative sense g " with amplifying transistor M3 and M4mIt offsets each other, it is non-to eliminate three ranks
Linearly so that the denominator in formula (6) radical levels off to 0, is greatly improved IIP3Index level, principle is as shown in Figure 3.
As shown in figure 3, carrying out input voltage scanning to M3~M6, the second order for measuring it in different input voltages is led
Number mutual conductance g "m.It is shown in figure, is operated in the g " of the amplifying transistor M3 and M4 of saturation regionmFor negative value, and it is operated in weak inversion regime
Transistor M5 and M6 then produce the g " of a positive valuem, after the two collective effect, the equivalent g " that combinesmIn small signal model
0 (close to the curve of middle part in figure) is close in enclosing, as a result, according to formula (6), this structure can promote great IIP3
Value.This structure solves the problems, such as gain design simultaneously, since M3 and M4 work in saturation region, plays the amplification of signal,
It is to the gain of signal：
Av=-gm·Rout (7)
This gain can effectively make up the gain limitation that the matching amplifying stage of front is generated by total grid mating structure
The problem of.
In conclusion the technical program, which creatively combines noise, eliminates the excellent of structure and multiple transistor multiplexing structure
Gesture.Because in Radio-Frequency Wireless Communication module, there are such laws：1, the module of prime is leaned on, noise is to whole logical
It is bigger to believe that link influences, and it is smaller to the linear properties influence degree of link；2, the module of rear class, linear properties pair are leaned on
The influence of integrated communication link is bigger, and smaller to the noiseproof feature influence degree of link；3, the elevator belt of gain carrys out noiseproof feature
Optimization and linear properties deterioration.So in the matching amplifying stage by prime, structure is eliminated using noise, is realizing broadband resistance
The minimum that first order noise is ensured while anti-matching, to promote the noiseproof feature of whole LNA；In the gain by rear class
Grade is promoted, multiple transistor multiplexing structure is used, since it is a kind of symmetrical structure, the output impedance of differential ends is balance
's.This structure eliminates the non-linear of gain elevator belt while promoting entire gain.At the same time, due to weak anti-
The transistor of type is in the rear stage of LNA, and the noise introduced is negligible.It sees on the whole, such technology
Scheme effectively improves the noiseproof feature of LNA circuits, gain performance, while not deteriorating its linear properties.
To sum up, the technical program solves impedance matching, impedance balance, noiseproof feature, the gain of LNA circuits simultaneously
Performance, the design challenges of linear properties.
For the prior art proposed in background technology promoted LNA linear properties when using low gain design or such as
Compensatory design in technical solution one.But it is operated in weak inversion regime since the technical solution just introduces two in the first order
PMOS transistor, the noise that they are generated will generate tremendous influence to LNA.
Noise cancellation technique is used when promoting the noiseproof feature of LNA for the prior art proposed in background technology.This
Broadband Matching may be implemented simultaneously in kind technology, but its negative effect is that gain design is restrained by antenna impedance, leads to LNA very
Difficulty reaches higher gain, and in order to reach output difference impedance balance, it is necessary to introduce buffer stage.If added in buffer stage
Gain can then be in because of the grade and lean on rear class, generate a large amount of nonlinear influences.And if without gain or born in buffer stage use
The structure of gain is then helpless to promote natively not high circuit gain.
The first order of this programme in LNA uses the similar structure of sound technology for eliminating in the prior art, it is ensured that influence of noise
The maximum first order can possess minimum noise, while realize Broadband Matching.And in the second level of LNA, introduce multiple transistor
Multiplexing structure, while the noise for the transistor for realizing the performances such as output impedance balance, high-gain, high linearity, while introducing
Due to being in the second level, overall noise influence can be ignored.
There is provided herein the various operations of embodiment.In one embodiment, one or more operations can be with structure
At the computer-readable instruction stored on one or more computer-readable mediums, will make to succeed in one's scheme when being executed by electronic equipment
It calculates equipment and executes the operation.Describing the sequences of some or all of operations, to should not be construed as to imply that these operations necessarily suitable
Sequence is relevant.It will be appreciated by those skilled in the art that the alternative sequence of the benefit with this specification.Furthermore, it is to be understood that
Not all operation must exist in each embodiment provided in this article.
Moreover, word " preferred " used herein means serving as example, example or illustration.It is described herein as " preferably
" any aspect or design be not necessarily to be construed as than other aspect or design it is more advantageous.On the contrary, the use purport of word " preferred "
Concept is being proposed in specific ways.Term "or" as used in this application is intended to mean the "or" for including and non-excluded
"or".That is, unless specified otherwise or clear from the context, " X uses A or B " means that nature includes any one of arrangement.
That is, if X uses A；X uses B；Or X uses A and B both, then " X uses A or B " is met in aforementioned any example.
Moreover, although the disclosure, this field skill has shown and described relative to one or more realization methods
Art personnel will be appreciated that equivalent variations and modification based on the reading and understanding to the specification and drawings.The disclosure include it is all this
The modifications and variations of sample, and be limited only by the scope of the following claims.In particular, to by said modules (such as element,
Resource etc.) various functions that execute, the term for describing such component is intended to correspond to the specified work(for executing the component
The random component (unless otherwise instructed) of energy (such as it is functionally of equal value), even if illustrated herein with execution in structure
The disclosure exemplary implementations in function open structure it is not equivalent.In addition, although the special characteristic of the disclosure
Through being disclosed relative to the only one in several realization methods, but this feature can with such as can be to given or specific application
For be it is expected and one or more other features combinations of other advantageous realization methods.Moreover, with regard to term " comprising ", " tool
Have ", " containing " or its deformation be used in specific implementation mode or claim for, such term be intended to with term
The similar mode of "comprising" includes.
Each functional unit in the embodiment of the present invention can be integrated in a processing module, can also be each unit list
Solely be physically present, can also two or more units be integrated in a module.Above-mentioned integrated module both may be used
The form of hardware is realized, can also be realized in the form of software function module.If the integrated module is with software function
The form of module is realized and when sold or used as an independent product, can also be stored in a computer-readable storage and be situated between
In matter.Storage medium mentioned above can be read-only memory, disk or CD etc..Above-mentioned each device or system, can be with
Execute the method in correlation method embodiment.
In conclusion although the present invention is disclosed above with preferred embodiment, above preferred embodiment is not to limit
The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention
Decorations, therefore protection scope of the present invention is subject to the range that claim defines.
Claims (5)
1. a kind of low-noise amplifier, which is characterized in that including：
Match amplification grade circuit, including input node, the first transistor, second transistor, the first output node and the second output
Node；The source level of the first transistor is coupled to the input node, and drain electrode is coupled to first output node, will
Noise current at the input node is converted to the first noise voltage of first output node；The second transistor
Grid is coupled to the source level of the first transistor, and drain electrode is coupled to second output node, by the input node
The noise current at place is converted to the second noise voltage of second output node；Pass through second noise voltage and described the
One noise voltage is summed to eliminate the noise of the first transistor；And
Gain promotes grade circuit, including a pair of transistor and second pair of transistor for being coupled to described a pair of transistor；Institute
It states a pair of transistor and is coupled respectively to first output node and second output node, by setting described first pair
The current polarity of transistor and second pair of transistor is to inhibit the noise of the second transistor；
Described a pair of transistor includes：
Third transistor, grid are coupled to first output node；And
4th transistor, grid are coupled to second output node；
Second pair of transistor include：
5th transistor, grid are coupled to the grid of the third transistor, and the second order of the mutual conductance of the 5th transistor is led
Number is opposite with the quadratic derivative symbols of the mutual conductance of the third transistor；And
6th transistor, grid are coupled to the grid of the 4th transistor, and the second order of the mutual conductance of the 6th transistor is led
Number is opposite with the quadratic derivative symbols of mutual conductance of the 4th transistor；
It further includes the first capacitance and the second capacitance that the gain, which promotes grade circuit,；Described first is capacitively coupled to the third crystal
Between the grid of pipe and the grid of the 5th transistor, described second is capacitively coupled to the grid of the 4th transistor and institute
Between the grid for stating the 6th transistor；
It further includes first resistor and second resistance that the gain, which promotes grade circuit,；The first resistor is coupled to the third crystal
The drain electrode of pipe, the second resistance are coupled to the drain electrode of the 4th transistor.
2. low-noise amplifier according to claim 1, which is characterized in that the first transistor is total gate transistor,
The second transistor is common source transistors.
3. low-noise amplifier according to claim 1 or 2, which is characterized in that the matching amplification grade circuit further includes：
Gate resistance altogether, is coupled to the drain electrode of the first transistor；And
Common source resistance is coupled to the drain electrode of the second transistor.
4. low-noise amplifier according to claim 1, which is characterized in that the matching amplification grade circuit further includes input
Capacitance, the input capacitance are coupled between the source level of the first transistor and the grid of the second transistor.
5. low-noise amplifier according to claim 1, which is characterized in that the matching amplification grade circuit further includes outside piece
Inductance, described external inductance are coupled to the source level of the first transistor.
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| CN201610192381.7A CN105897184B (en) | 2016-03-30 | 2016-03-30 | A kind of low-noise amplifier |
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| CN105897184B true CN105897184B (en) | 2018-08-14 |
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| TWI659616B (en) * | 2017-10-11 | 2019-05-11 | 財團法人工業技術研究院 | Input buffer and noise cancellation methhod thereof |
| CN114221624B (en) * | 2021-11-11 | 2024-03-26 | 华南理工大学 | Low-noise amplifier and chip |
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|---|---|---|---|---|
| US6127887A (en) * | 1998-07-23 | 2000-10-03 | Level One Communications, Inc. | High gain, impedance matching low noise RF amplifier circuit |
| CN103633946A (en) * | 2013-12-03 | 2014-03-12 | 天津大学 | Low-noise amplifier for realizing on-chip input and output of 50-ohm matching |
| CN104579184A (en) * | 2015-02-11 | 2015-04-29 | 中国科学技术大学 | High-linearity broadband barron low-noise amplifier |
| CN205453643U (en) * | 2016-03-30 | 2016-08-10 | 武汉芯泰科技有限公司 | Low noise amplifier |
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| US6127887A (en) * | 1998-07-23 | 2000-10-03 | Level One Communications, Inc. | High gain, impedance matching low noise RF amplifier circuit |
| CN103633946A (en) * | 2013-12-03 | 2014-03-12 | 天津大学 | Low-noise amplifier for realizing on-chip input and output of 50-ohm matching |
| CN104579184A (en) * | 2015-02-11 | 2015-04-29 | 中国科学技术大学 | High-linearity broadband barron low-noise amplifier |
| CN205453643U (en) * | 2016-03-30 | 2016-08-10 | 武汉芯泰科技有限公司 | Low noise amplifier |
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