CN105871894A - IEC61850 communication protocol conversion SOC chip with encryption and decryption functions and implementing method - Google Patents
IEC61850 communication protocol conversion SOC chip with encryption and decryption functions and implementing method Download PDFInfo
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- CN105871894A CN105871894A CN201610327046.3A CN201610327046A CN105871894A CN 105871894 A CN105871894 A CN 105871894A CN 201610327046 A CN201610327046 A CN 201610327046A CN 105871894 A CN105871894 A CN 105871894A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
- H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0637—Modes of operation, e.g. cipher block chaining [CBC], electronic codebook [ECB] or Galois/counter mode [GCM]
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- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
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- Computer Hardware Design (AREA)
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- General Engineering & Computer Science (AREA)
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Abstract
The invention discloses an IEC61850 communication protocol conversion SOC chip with encryption and decryption functions and an implementing method. The IEC61850 communication protocol conversion SOC chip comprises a high-performance ARM microprocessor, on-chip buses, an Ethernet module, a super encryption and decryption AES module, a storage module, a communication interface module, a clock module, a DMA module, a reset module and a PLL phase-locked loop module. The on-chip buses include the AHN high-speed system bus and the APB low-speed system bus which are connected through an AHB2APB Bridge module. The IEC103 protocol adopted in communication of a traditional transformer substation and the international communication standard protocol IEC61850 are converted, all functions of a traditional protocol converter are integrated on one chip, protocol conversion reliability is improved, cost is reduced, optical fiber communication and super encryption and decryption are supported, speed of data transmission is increased, and safety of data transmission is improved.
Description
Technical field
The present invention relates to the technical field of power communication, particularly to a kind of, there is encrypting and decrypting function
IEC61850 communication protocol conversion SOC and implementation method.
Background technology
IEC61850 standard is as the unique universal standard of International Power system automation field communication, logical
Cross a series of standardization to substation equipment communication so that it is form the output of a specification, it is achieved power train
The seamless communication of system.IEC61850 have interoperability, freely configure, stability, opening, integrity
Etc. feature, along with the development in an all-round way of China's intelligent substation, communication of power system stipulations are used uniformly across
IEC61850 standard is the pith of intelligent substation.
Domestic traditional first and second equipment supplier is owing to being mostly good to manufacture, and the relay produced is protected
The equipment that protects mainly or uses IEC103 standard, but the development ability of new technique is the weakest, right
The understanding of IEC61850 series standard is not enough, and the reasons such as development cost is big cause a lot of terminal producer finally to abandon
Oneself exploitation, and take the equipment external IEC61850 protocol converter as interim solution.At present
Equipment accesses IEC61850 protocol converter and mainly uses the mode of external box-packed IEC61850 protocol converter
Or insert IEC61850 stipulations transition card mode to the communication jacks that manufacturer is reserved and realize stipulations conversion, but
It is that these modes exist the problems such as hardware circuit connects complicated, and structure is complicated, and volume is big, and input cost is high.
Additionally IEC61850 standard does not the most make corresponding specification in terms of safety, how to realize transformer station
After being used uniformly across IEC61850 communication standard, it is ensured that the confidentiality and integrity of communication data, it is ensured that electric power
System communications security is that transformer station realizes intelligentized key issue.
Along with the fast development of Electric Power Automation Equipment SOC(system on a chip), by IEC61850 stipulations conversion chip,
Contribute to reducing development cost and difficulty, the shortening construction cycle of substation IED, simplify hardware circuit,
And security module is integrated in chip, contribute to the safety and reliability of communication of power system data.
Summary of the invention
It is an object of the invention to the shortcoming overcoming prior art with not enough, it is provided that one has encrypting and decrypting merit
The IEC61850 communication protocol conversion SOC of energy and implementation method, it is achieved IEC103 standard handovers is
The conversion of IEC61850 standard, and integrated superencipherment deciphering AES module is in chip, improves communication number
According to safety and reliability.
First purpose of the present invention is achieved through the following technical solutions:
A kind of IEC61850 communication protocol conversion SOC with encrypting and decrypting function, described stipulations turn
Change SOC and include that high-performance ARM microprocessor, bus on chip, ethernet module, superencipherment are deciphered
AES module, storage module, communication interface modules, clock module, dma module；
Described bus on chip includes AHB high speed system bus and APB low-speed peripheral bus, and passes through AHB2APB
Bridge bridge module connects；
Described ethernet module includes ethernet mac controller and physical interface transceiver PHY；
Described memory module includes ROM, EFLASH, SRAM memory and sdram controller；
Described communication interface modules includes UART, SPI and I2C interface；
Described clock module include RTC Controller real-time clock controller, watch dog house dog,
Timer timer and OSC32K crystal oscillator；
Described high-performance ARM microprocessor, ethernet module, superencipherment deciphering AES module, store mould
Block, dma module are connected with described AHB high speed system bus；
Described communication interface modules, clock module are connected with APB low-speed peripheral bus.
Further, described high-performance ARM microprocessor is 32 ARM926EJ-S high-performance processors,
For realizing the mutual conversion of IEC103 stipulations and IEC61850 stipulations；
Described 32 ARM926EJ-S high-performance processors are write under Keil4 development environment, and chip embeds
UCOS-II real-time operation program, by each module in instruction control chip, it is achieved conventions data reception,
Conversion between IEC103 stipulations and IEC61850 hough transformation, conventions data transmission, tasks carrying, work
Status monitoring function.
Further, described superencipherment deciphering AES module uses block length and the 128bits of 128bits
The aes algorithm of key length, encryption mode uses CBC group mode, for realizing the encryption of communication data
With deciphering function.
Further, described ROM memory is the 16KB ROM of Embedded, for storing SOC
Control program；
Described EFLASH memorizer is Embedded 10M EFLASH, is used for storing boot loader program
With stipulations translation-profile；
Described SRAM memory is Embedded 16KB SRAM, the storage of data in stipulations are changed；
Described sdram controller is used for extending outside SDRAM memory, real-time operation when meeting chip operation
System and the demand of stipulations converse routine internal memory.
Further, described ethernet module include 2 10/100M self adaptation ethernet mac controllers and
2 physical interface transceiver PHY, are respectively used to support that Ethernet interface and optical fiber port connect.
Further, described dma module is for the data transmission between memory module and external equipment；Pass through
Configuration dma module set up described memory module and communication interface modules, described high-performance ARM microprocessor with
Straight between memory module, described AES module and memory module and described ethernet module and AES module
Connect access path, improve the speed of data transmission.
Further, described communication interface modules includes 2 UART interface, 2 SPI interface, 2 I2C
Interface；Above-mentioned 2 UART interface support RS232 physical interface and RS485 physical interface respectively, use
IEC103 conventions data is sent in receiving；Above-mentioned SPI interface and I2C interface are expanded function interface, use
In the equipment outside connection；
Described clock module include RTC Controller real-time clock controller, watch dog house dog,
Timer timer and OSC32K crystal oscillator, wherein RTC Controller real-time clock controller is real-time
Clock is driven by 32KHz crystal oscillator, provides real-time clock, various clock signals in synchronizing chip for chip；Described
Watch dog house dog provides monitoring in real time for chip running status, prevents program fleet occur under interference；
Described Timer intervalometer provides counting, interrupt function for chip program.
Further, described stipulations conversion SOC also includes: reseting module and PLL phase-locked loop module；
Described reseting module is connected with described high-performance ARM microprocessor, sends reset signal；With described
Watch dog house dog connects, and receives reset signal；
Described PLL phase-locked loop module is used for the frequency dividing to clock and frequency multiplication, produces multi-level clock, calibrates at different levels
Clock amplitude and phase place.
Another object of the present invention is achieved through the following technical solutions:
A kind of implementation method of the IEC61850 communication protocol conversion SOC with encrypting and decrypting function,
Comprise the following steps:
It is as follows that S1, IEC103 Standards Code turns IEC61850 Standards Code process:
Advise when described stipulations conversion SOC receives IEC103 by the UART interface of communication interface modules
About packet, packet will be stored in the SDRAM memory of memory module, by ARM926EJ-S height
Data can be read from SDRAM memory by processor, complete the data of IEC103 stipulations to IEC61850 stipulations
Conversion；Packet after conversion stores in the SDRAM memory of memory module, deciphers AES through superencipherment
Module from SDRAM memory read data packet complete encryption after be stored again in SDRAM memory, through with
After the too ethernet controller MAC and physical interface transceiver PHY of net module, packet is dealt into Ethernet interface
Or optical fiber network interface；
When described stipulations conversion SOC receives IEC103 conventions data bag from Ethernet interface or optical fiber port,
Packet, after the physical interface transceiver PHY and ethernet controller MAC of ethernet module, is stored in
In the SDRAM memory of memory module, read from SDRAM memory ARM926EJ-S high-performance processor
Fetching data, the data completing IEC103 stipulations are changed to IEC61850 stipulations；Packet storage after conversion
In the SDRAM memory of memory module, read from SDRAM memory through superencipherment deciphering AES module
Packet is stored again in SDRAM memory, through the ethernet controller of ethernet module after completing encryption
After MAC and physical interface transceiver PHY, packet is dealt into Ethernet interface or optical fiber network interface；
It is as follows that S2, IEC61850 Standards Code turns IEC103 Standards Code process:
When described stipulations conversion SOC receives IEC61850 conventions data from Ethernet interface or optical fiber port
Bag, packet, after the physical interface transceiver PHY and ethernet controller MAC of ethernet module, is deposited
Storage, in the SDRAM memory of memory module, is read from SDRAM memory by superencipherment deciphering AES module
The bag that fetches data complete deciphering after be stored again in SDRAM memory, ARM926EJ-S high-performance processor from
SDRAM memory reads data, and the data completing IEC61850 stipulations are changed to IEC103 stipulations；Conversion
After packet store in the SDRAM memory of memory module, through the UART interface of communication interface modules
Export or exported to Ethernet interface and optical fiber network interface by ethernet module.
Further, described IEC103 Standards Code turns IEC61850 Standards Code or IEC61850 standard
Stipulations also include before turning IEC103 Standards Code:
After S0, described stipulations conversion SOC electrifying startup, first complete high-performance ARM microprocessor
ARM926EJ-S and the reset function of each functional module, then read from the EFLASH memorizer of memory module
Take boot loader program and stipulations translation-profile.
The present invention has such advantages as relative to prior art and effect:
1) present invention achieves electric power communication protocol IEC103 standard handovers is IEC61850 standard, for becoming
Power station automation communication protocol realizes the unified solution providing transition.
2) present invention achieves protocol converter chip and instead of existing box-packed protocol converter and stipulations
Transition card, simplifies external hardware circuit, improves the reliability that stipulations convert, and reduces electric intelligent equipment and opens
Send out cost and difficulty.
3) superencipherment is deciphered AES module and is integrated in chip by the present invention, improves transformer substation communication number
According to safety.
4) MAC Yu PHY is integrated on chip by the present invention, need not need external PHY chip.
5) Embedded FLASH of the present invention, ROM and SRAM memory, reduce the quantity of external memorizer.
6) present invention supports optical fiber interface, improves speed and the reliability of data transmission.
Accompanying drawing explanation
Fig. 1 is the IEC61850 communication protocol conversion SOC core with encrypting and decrypting function that the present invention proposes
The structured flowchart of sheet.
Detailed description of the invention
For the technological means making the present invention realize, creation characteristic, reach purpose and be easy to understand with effect,
The present invention is described in more detail for the embodiment that develops simultaneously referring to the drawings.Should be appreciated that described herein
Specific embodiment only in order to explain the present invention, is not intended to limit the present invention.
Embodiment one
A kind of IEC61850 communication protocol conversion SOC core with encrypting and decrypting function that the present embodiment proposes
Sheet, by this SOC built-in in modern power systems protection equipment production, i.e. can realize stipulations conversion
Function.
Its structure is as it is shown in figure 1, its structure includes high-performance ARM microprocessor, bus on chip, Ethernet
Module, superencipherment deciphering AES module, storage module, communication interface modules, clock module, DMA mould
Block, reseting module, PLL phase-locked loop module.Described bus on chip includes AHB high speed system bus and APB
Low-speed peripheral bus, and connected by AHB2APB Bridge bridge module；Described ethernet module include with
Too net mac controller and physical interface transceiver PHY；Described memory module includes ROM, EFLASH, SRAM
And sdram controller；Described communication interface modules includes UART, SPI and I2C interface；Described clock mould
Block include RTC Controller real-time clock controller, watch dog house dog, Timer timer with
And OSC32K crystal oscillator；High-performance ARM microprocessor, ethernet module, superencipherment deciphering AES module,
Store module, dma module is connected with AHB high speed system bus；Communication interface modules, clock module and APB
Low-speed peripheral bus connects.
Above-mentioned high-performance ARM microprocessor is 32 ARM926EJ-S high-performance processors of ARM company,
Mutually change in IEC61850 stipulations for realizing IEC103 stipulations.At 32 ARM926EJ-S high-performance
Reason device is write under Keil4 development environment, and chip embeds UCOS-II real-time operation program, is controlled by instruction
Each module in coremaking sheet, it is achieved conventions data receives, between IEC103 stipulations and IEC61850 hough transformation
Convert, the functions such as conventions data sends, tasks carrying, working state monitoring.
Above-mentioned superencipherment deciphering AES module uses block length and the 128bits key length of 128bits
The aes algorithm of method, encryption mode uses CBC group mode, for realizing encryption and the deciphering of communication data
Function.
Above-mentioned memory module includes: ROM, EFLASH, SRAM memory and sdram controller, wherein sheet
Interior integrated 16KB ROM is for storing the control program of SOC, and Embedded 10M EFLASH is used for
Storage boot loader program and stipulations translation-profile, Embedded 16KB SRAM turns for stipulations
Changing the storage of middle data, sdram controller is used for extending outside SDRAM memory, when meeting chip operation
Real time operating system and the demand of stipulations converse routine internal memory.
Above-mentioned ethernet module includes that 2 10/100M self adaptation ethernet mac controllers and 2 physics connect
Mouth transceiver PHY, supports that Ethernet interface and optical fiber port connect.
Above-mentioned dma module is for the data transmission between memory module and external equipment；By configuring DMA mould
Block sets up memory module and communication interface modules, high-performance ARM microprocessor and memory module, AES module
And it is directly accessed passage between memory module and ethernet module and AES module, improves data transmission
Speed.
Above-mentioned communication interface modules includes 2 UART interface, 2 SPI interface, 2 I2C interfaces.UART
Interface includes that 1 interface supports that RS232 physical interface, 1 interface are supported RS485 physical interface, be used for
Receive and send IEC103 conventions data；SPI, I2C interface is expanded function interface, for connecting outside
Equipment.
Above-mentioned clock module include RTC Controller real-time clock controller, watch dog house dog,
Timer timer and OSC32K crystal oscillator.Wherein RTC Controller real-time clock controller is real-time
Clock is driven by 32KHz crystal oscillator, provides real-time clock, various clock signals in synchronizing chip for chip；watch
Dog house dog provides monitoring in real time for chip running status, prevents program fleet occur under interference；Timer
Intervalometer provides the functions such as counting, interruption for chip program.
Above-mentioned reseting module is connected with high-performance ARM microprocessor, sends reset signal；With watch dog
House dog connects, and receives reset signal.
Above-mentioned PLL phase-locked loop module is used for the frequency dividing to clock and frequency multiplication, produces multi-level clock, calibrates at different levels
Clock amplitude and phase place.
Embodiment two
Present embodiment discloses a kind of IEC61850 communication protocol conversion SOC core with encrypting and decrypting function
The implementation method of sheet, it is as follows that described communication protocol conversion SOC realizes function detailed process:
1., after chip electrifying startup described in, first complete high-performance ARM microprocessor ARM926EJ-S and each merit
The reset function of energy module, then reads boot loader program from memory module EFLASH and stipulations turns
Change configuration file.
It is as follows that 2.IEC103 Standards Code turns IEC61850 Standards Code process:
(1) connect by the UART of communication interface modules when described IEC61850 communication protocol conversion SOC
Mouth receives IEC103 conventions data bag, and packet will be stored in memory module SDRAM, by
ARM926EJ-S reads data from SDRAM, and the data completing IEC103 stipulations are changed to IEC61850 stipulations.
Packet after conversion stores in the SDRAM of memory module, reads from SDRAM through AES encryption deciphering module
The bag that fetches data is stored again in SDRAM, through the ethernet controller MAC of ethernet module after completing encryption
With after physical interface transceiver PHY, packet is dealt into Ethernet interface or optical fiber network interface.
(2) receive from Ethernet interface or optical fiber port when described IEC61850 communication protocol conversion SOC
IEC103 conventions data bag, packet is through the physical interface transceiver PHY of ethernet module and ether network control
After device MAC processed, it is stored in memory module SDRAM, ARM926EJ-S reads data from SDRAM,
The data completing IEC103 stipulations are changed to IEC61850 stipulations.Packet storage mould after conversion
In the SDRAM of block, again store after SDRAM read data packet completes encryption through AES encryption deciphering module
In SDRAM, after the ethernet controller MAC and physical interface transceiver PHY of ethernet module, will
Packet is dealt into Ethernet interface or optical fiber network interface.
3.IEC61850 it is as follows that Standards Code turns IEC103 Standards Code process:
When described IEC61850 communication protocol conversion SOC receives from Ethernet interface or optical fiber port
IEC61850 conventions data bag, packet is through the physical interface transceiver PHY of ethernet module and Ethernet
After controller MAC, it is stored in memory module SDRAM, AES encryption deciphering module reads from SDRAM
Packet is stored again in SDRAM after completing deciphering, and ARM926EJ-S reads data from SDRAM, completes
The data of IEC61850 stipulations are changed to IEC103 stipulations.Packet after conversion stores memory module
In SDRAM, through the UART interface of communication interface modules export or by ethernet module to Ethernet interface and
Optical fiber network interface exports.
Above-described embodiment is the present invention preferably embodiment, but embodiments of the present invention are not by above-mentioned reality
Execute the restriction of example, the change made under other any spirit without departing from the present invention and principle, modification,
Substitute, combine, simplify, all should be the substitute mode of equivalence, within being included in protection scope of the present invention.
Claims (10)
1. having an IEC61850 communication protocol conversion SOC for encrypting and decrypting function, its feature exists
In, described stipulations conversion SOC include high-performance ARM microprocessor, bus on chip, ethernet module,
Superencipherment deciphering AES module, storage module, communication interface modules, clock module, dma module；
Described bus on chip includes AHB high speed system bus and APB low-speed peripheral bus, and passes through AHB2APB
Bridge bridge module connects；
Described ethernet module includes ethernet mac controller and physical interface transceiver PHY；
Described memory module includes ROM, EFLASH, SRAM memory and sdram controller；
Described communication interface modules includes UART, SPI and I2C interface；
Described clock module include RTC Controller real-time clock controller, watch dog house dog,
Timer timer and OSC32K crystal oscillator；
Described high-performance ARM microprocessor, ethernet module, superencipherment deciphering AES module, store mould
Block, dma module are connected with described AHB high speed system bus；
Described communication interface modules, clock module are connected with APB low-speed peripheral bus.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that described high-performance ARM microprocessor is 32 ARM926EJ-S height
Energy processor, for realizing the mutual conversion of IEC103 stipulations and IEC61850 stipulations；
Described 32 ARM926EJ-S high-performance processors are write under Keil4 development environment, and chip embeds
UCOS-II real-time operation program, by each module in instruction control chip, it is achieved conventions data reception,
Conversion between IEC103 stipulations and IEC61850 hough transformation, conventions data transmission, tasks carrying, work
Status monitoring function.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that the packet of described superencipherment deciphering AES module employing 128bits is long
Degree and the aes algorithm of 128bits key length, encryption mode uses CBC group mode, is used for realizing leading to
The encryption of letter data and deciphering function.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that
Described ROM memory is the 16KB ROM of Embedded, for storing the control program of SOC；
Described EFLASH memorizer is Embedded 10M EFLASH, is used for storing boot loader program
With stipulations translation-profile；
Described SRAM memory is Embedded 16KB SRAM, the storage of data in stipulations are changed；
Described sdram controller is used for extending outside SDRAM memory, real-time operation when meeting chip operation
System and the demand of stipulations converse routine internal memory.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that
Described ethernet module includes that 2 10/100M self adaptation ethernet mac controllers and 2 physics connect
Mouth transceiver PHY, is respectively used to support that Ethernet interface and optical fiber port connect.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that
Described dma module is for the data transmission between memory module and external equipment；By configuring DMA mould
Block set up described memory module and communication interface modules, described high-performance ARM microprocessor and memory module,
Being directly accessed between described AES module and memory module and described ethernet module and AES module is logical
Road, improves the speed of data transmission.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that
Described communication interface modules includes 2 UART interface, 2 SPI interface, 2 I2C interfaces；On
State 2 UART interface and support RS232 physical interface and RS485 physical interface respectively, send out for receiving
Send IEC103 conventions data；Above-mentioned SPI interface and I2C interface are expanded function interface, outside being used for connecting
The equipment in portion；
Described clock module include RTC Controller real-time clock controller, watch dog house dog,
Timer timer and OSC32K crystal oscillator, wherein RTC Controller real-time clock controller is real-time
Clock is driven by 32KHz crystal oscillator, provides real-time clock, various clock signals in synchronizing chip for chip；Described
Watch dog house dog provides monitoring in real time for chip running status, prevents program fleet occur under interference；
Described Timer intervalometer provides counting, interrupt function for chip program.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 1 turns
Change SOC, it is characterised in that
Described stipulations conversion SOC also includes: reseting module and PLL phase-locked loop module；
Described reseting module is connected with described high-performance ARM microprocessor, sends reset signal；With described
Watch dog house dog connects, and receives reset signal；
Described PLL phase-locked loop module is used for the frequency dividing to clock and frequency multiplication, produces multi-level clock, calibrates at different levels
Clock amplitude and phase place.
9. there is an implementation method for the IEC61850 communication protocol conversion SOC of encrypting and decrypting function,
It is characterized in that, comprise the following steps:
It is as follows that S1, IEC103 Standards Code turns IEC61850 Standards Code process:
Advise when described stipulations conversion SOC receives IEC103 by the UART interface of communication interface modules
About packet, packet will be stored in the SDRAM memory of memory module, by ARM926EJ-S height
Data can be read from SDRAM memory by processor, complete the data of IEC103 stipulations to IEC61850 stipulations
Conversion；Packet after conversion stores in the SDRAM memory of memory module, deciphers AES through superencipherment
Module from SDRAM memory read data packet complete encryption after be stored again in SDRAM memory, through with
After the too ethernet controller MAC and physical interface transceiver PHY of net module, packet is dealt into Ethernet interface
Or optical fiber network interface；
When described stipulations conversion SOC receives IEC103 conventions data bag from Ethernet interface or optical fiber port,
Packet, after the physical interface transceiver PHY and ethernet controller MAC of ethernet module, is stored in
In the SDRAM memory of memory module, read from SDRAM memory ARM926EJ-S high-performance processor
Fetching data, the data completing IEC103 stipulations are changed to IEC61850 stipulations；Packet storage after conversion
In the SDRAM memory of memory module, read from SDRAM memory through superencipherment deciphering AES module
Packet is stored again in SDRAM memory, through the ethernet controller of ethernet module after completing encryption
After MAC and physical interface transceiver PHY, packet is dealt into Ethernet interface or optical fiber network interface；
It is as follows that S2, IEC61850 Standards Code turns IEC103 Standards Code process:
When described stipulations conversion SOC receives IEC61850 conventions data from Ethernet interface or optical fiber port
Bag, packet, after the physical interface transceiver PHY and ethernet controller MAC of ethernet module, is deposited
Storage, in the SDRAM memory of memory module, is read from SDRAM memory by superencipherment deciphering AES module
The bag that fetches data complete deciphering after be stored again in SDRAM memory, ARM926EJ-S high-performance processor from
SDRAM memory reads data, and the data completing IEC61850 stipulations are changed to IEC103 stipulations；Conversion
After packet store in the SDRAM memory of memory module, through the UART interface of communication interface modules
Export or exported to Ethernet interface and optical fiber network interface by ethernet module.
A kind of IEC61850 communication protocol with encrypting and decrypting function the most according to claim 9
The implementation method of conversion SOC, it is characterised in that
Described IEC103 Standards Code turns IEC61850 Standards Code or IEC61850 Standards Code turns
Also include before IEC103 Standards Code:
After S0, described stipulations conversion SOC electrifying startup, first complete high-performance ARM microprocessor
ARM926EJ-S and the reset function of each functional module, then read from the EFLASH memorizer of memory module
Take boot loader program and stipulations translation-profile.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610327046.3A CN105871894A (en) | 2016-05-17 | 2016-05-17 | IEC61850 communication protocol conversion SOC chip with encryption and decryption functions and implementing method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610327046.3A CN105871894A (en) | 2016-05-17 | 2016-05-17 | IEC61850 communication protocol conversion SOC chip with encryption and decryption functions and implementing method |
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| CN105871894A true CN105871894A (en) | 2016-08-17 |
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