CN105867949A - Online BIOS (basic input/output system) refreshing method for multi-node server - Google Patents
Online BIOS (basic input/output system) refreshing method for multi-node server Download PDFInfo
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- CN105867949A CN105867949A CN201610276757.2A CN201610276757A CN105867949A CN 105867949 A CN105867949 A CN 105867949A CN 201610276757 A CN201610276757 A CN 201610276757A CN 105867949 A CN105867949 A CN 105867949A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
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Abstract
The invention discloses an online BIOS (basic input/output system) refreshing method for a multi-node server. The method comprises steps as follows: a two-stage gating switch circuit comprising a first-stage gating switch and second-stage gating switches is arranged between a BMC (baseboard management controller) and CPU (central processing unit) nodes, after initialization of the BMC is completed, a driver of an SPI (serial peripheral interface) controller is uploaded, an online BIOS refreshing command on a user side is waited, when the online BIOS refreshing command is received, target CPU nodes are determined, the two-stage gating switch circuit is set for gating of BIOS Flash of the target CPU nodes, a BIOS updating file is obtained from the user side, the BIOS updating file is executed for updating, and the state of the two-stage gating switch circuit is restored. With the adoption of the method, the problem about BIOS refreshing of high-density server nodes can be effectively solved, CPUs on a main board can be updated without electrification, the single BMC can manage BIOS refreshing of the multiple CPU nodes, and the method has the advantages that remote operation is realized, the method is simple and convenient, the hardware logic complexity is low, embedded software is simple to realize, the method is convenient to use and the user experience is good.
Description
Technical field
The present invention relates to the server node BIOS method for refreshing of computer realm, be specifically related to one and take towards many nodes
The BIOS on line refreshable method of business device.
Background technology
In modern server design, more and more higher to aspects such as server performance, energy consumption, spaces in order to meet client
Requirement, motherboard design becomes increasingly sophisticated, and density is more and more higher.General the most integrated multiple (>=2) only on single mainboard
Vertical calculating node, and these nodes are when development or debugging maintenance, it is often necessary to update the firmware (Basic of node
Input Output System, BIOS), and update BIOS the most efficiently and easily, particularly in highdensity server,
Have higher requirement undoubtedly.Traditional server is usually and uses refresh tool to update firmware under an operating system, this
There are two problems in the update mode of sample: one is that the operating system of CPU must be able to work, and the when of renewal, it is necessary to step on
Recording each node and carry out burning, for high density node server, this mode excessively takes time and effort；Two is to cannot be carried out far
Cheng Zuoye, refresh tool is typically all performed locally program, need to use the instrument such as FTP by locally downloading for recordable paper,
Operation inconvenience.It is now equipped with the service of baseboard management controller (Baseboard Management Controller, BMC)
Device, also simply part achieves the refreshing problem of single node BIOS.
Summary of the invention
The technical problem to be solved in the present invention: for the problems referred to above of prior art, it is provided that one can effectively solve the problem that height
The BIOS on line refreshable method towards many nodes server of the BIOS on line refreshable problem of the many nodes of density server, the method
CPU on mainboard just can be updated without powering up, and single baseboard management controller BMC can manage multiple CPU node
BIOS update, have remotely operation, simple and convenient, hardware logic complexity is low, embedded software realize simple, use just
Profit, the advantage that Consumer's Experience is good.
In order to solve above-mentioned technical problem, the technical solution used in the present invention is:
A kind of BIOS on line refreshable method towards many nodes server, step includes:
1) in advance by the SPI controller of baseboard management controller BMC by one-level gating switch respectively with each CPU node phase
Even, the SPI interface of CPU in each CPU node and the SPI interface of BIOS Flash are passed through two grades of gating switches and respectively
Level gating switch is connected, and controls one-level gating switch and the gating shape of two grades of gating switches by baseboard management controller BMC
State, under default conditions, described two grades of gating switches gating CPU is connected with one-level gating switch；
2) after baseboard management controller BMC has initialized, by firmware loads SPI of described baseboard management controller BMC
The driver of controller, and generate the memory techniques equipment for reading and writing BIOS Flash；
3) baseboard management controller BMC waits that user side sends the BIOS being accompanied with target CPU node information based on IPMI protocol
On line refreshable order, when receiving the BIOS on line refreshable order being accompanied with target CPU node information, redirects execution step 4)；
4) obtain the target CPU node information that BIOS on line refreshable order is subsidiary, determine target according to target CPU node information
CPU node, and respectively one-level gating switch and the strobe state of two grades of gating switches are set by baseboard management controller BMC,
Make one-level gating switch gating target CPU node, the BIOS Flash of two grades of gating switch gating target CPU nodes；
5) baseboard management controller BMC sends BIOS renewal file request based on IPMI protocol to user side, and prepares to receive
BIOS updates file；User side response BIOS file request, updates BIOS file and is sent to substrate management based on IPMI protocol
Controller BMC；
6), after baseboard management controller BMC receives BIOS renewal file, started for target by described memory techniques equipment
The read-write capability of the BIOS Flash of CPU node, completes the renewal of the BIOS Flash of target CPU node, and by status information
It is sent to user side；
7) baseboard management controller BMC recovers the default conditions of the corresponding two grades of gating switches of target CPU node, redirects execution step
3).
Preferably, the detailed step of described step 1) includes:
1.1) in advance by the SPI controller of baseboard management controller BMC by multiselect one gating switch respectively with each CPU
Node is connected, and multiselect one gating switch includes higher level's port and multiple subordinates port, and the higher level of multiselect one gating switch
Port is connected with the SPI controller of baseboard management controller BMC, subordinate's port is connected with each CPU node；
1.2) in advance the SPI interface of CPU in each CPU node and the SPI interface of BIOS Flash are passed through one two respectively
Selecting a gating switch to be connected with subordinate's port of multiselect one gating switch, alternative gating switch includes higher level's port
With Liang Ge subordinate port, and higher level's port of alternative gating switch is connected with subordinate's port of multiselect one gating switch,
One subordinate's port is connected with the CPU of CPU node, another subordinate's port is connected with the BIOS Flash of CPU node；
1.3) control multiselect one gating switch respectively by the GPIO port of baseboard management controller BMC and each alternative gates
The strobe state of switch, alternative gating switch gating CPU and subordinate's port of multiselect one gating switch under default conditions
It is connected.
Preferably, the detailed step of described step 6) includes:
6.1), after baseboard management controller BMC receives BIOS renewal file, wiping purposes is started by described memory techniques equipment
The BIOS Flash of mark CPU node, and in the completed current state information is sent to user side based on IPMI protocol；
6.2) baseboard management controller BMC updates file for the BIOS Flash burning BIOS of target CPU node, and will be current
Status information is sent to user side based on IPMI protocol；
6.3) baseboard management controller BMC updates file for the BIOS Flash burning BIOS of target CPU node, and completes
After current state information is sent to user side based on IPMI protocol；
6.4) baseboard management controller BMC for the BIOS Flash of target CPU node carry out file verification that burning enters and
BIOS Flash verifies, and in the completed based on IPMI protocol, current state information is sent to user side.
The present invention has an advantage that towards the BIOS on line refreshable method of many nodes server
1, the present invention is directed to the server blade of multiple independent processing unit, first by one-level gating switch and two grades of gating switches
The SPI interface controlling CPU is connected to the SPI controller of BMC, then loads driving the life of SPI controller in the firmware of BMC
Becoming the memory techniques equipment (MTD equipment) for reading and writing BIOS Flash, user passes through remote I PMI(Intelligent
Platform Management Interface, standard intelligent platform management) interface is connected to baseboard management controller BMC also
Send the order refreshing CPU BIOS, transmitted by baseboard management controller BMC simultaneously and treat that recordable paper controls to substrate management
Device BMC is local, and baseboard management controller BMC starts the BIOS of corresponding node and updates, thus reaches to update the purpose of node BIOS,
Can effectively solve the problem that the BIOS of high density server node refreshes problem, the CPU on mainboard just can update without powering up, single
Baseboard management controller BMC can manage the BIOS of multiple CPU node and update, there is remotely operation, simply and easily advantage.
2, the present invention has the advantage that hardware logic complexity is low.The SPI of baseboard management controller BMC is controlled by the present invention
Device is connected with each CPU node, by SPI interface and BIOS in CPU in each CPU node respectively by one-level gating switch
The SPI interface of Flash is connected with one-level gating switch by two grades of gating switches respectively, and by baseboard management controller BMC
Control one-level gating switch and the strobe state of two grades of gating switches, by the two-stage gating switch on hardware, it is achieved that different
Gating function between SPI interface and the SPI interface of BIOS Flash in CPU between CPU node, in same CPU node, also
Realize gating switching by baseboard management controller BMC, there is the advantage that hardware logic complexity is low.
3, the present invention is directed to embedded software and realize the problem that difficulty is big, the present invention is except the two-stage gating switch on hardware
Simplify baseboard management controller BMC and realize beyond the logic of gating switching, also by considering different node BIOS flash
Chip is different, after baseboard management controller BMC has initialized, is controlled by firmware loads SPI of baseboard management controller BMC
The driver of device processed, and generate the memory techniques equipment for reading and writing BIOS Flash, therefore, it is possible to realize different BIOS
The support of flash chip, and simplify the read-write operation to BIOS flash chip, there is embedded software and realize the most excellent
Point.
4, baseboard management controller BMC of the present invention waits that user side sends based on IPMI protocol and is accompanied with target CPU node
The BIOS on line refreshable order of information, and BIOS on line refreshable order based on user side realizes BIOS on line refreshable, so uses
Family is when there being any node BIOS demand of renewal, it is only necessary to input the standard commands of a customization it is achieved that provide the user with
Outside access mode, has an advantage easy-to-use, that Consumer's Experience is good easily.
Accompanying drawing explanation
Fig. 1 is the basic procedure schematic diagram of embodiment of the present invention method.
Fig. 2 is the hardware topology schematic diagram of two-stage gating switch in the embodiment of the present invention.
Detailed description of the invention
Hereafter will be to comprise many nodes server of 4 CPU nodes (CPU0～3) and a baseboard management controller BMC
As a example by, the present invention is described in further detail towards the BIOS on line refreshable method of many nodes server.
As it is shown in figure 1, the present embodiment includes towards the step of the BIOS on line refreshable method of many nodes server:
1) in advance by the SPI controller of baseboard management controller BMC by one-level gating switch respectively with each CPU node phase
Even, by the SPI interface of SPI interface and BIOS Flash in the CPU of each CPU node respectively by two grades of gating switches and
Level gating switch is connected, and controls one-level gating switch and the gating shape of two grades of gating switches by baseboard management controller BMC
State, default conditions lower two grades of gating switches gating CPU is connected with one-level gating switch；
2) after baseboard management controller BMC has initialized, controlled by firmware loads SPI of baseboard management controller BMC
The driver of device, and generate the memory techniques equipment (MTD equipment) for reading and writing BIOS Flash；
3) baseboard management controller BMC waits that user side sends the BIOS being accompanied with target CPU node information based on IPMI protocol
On line refreshable order (BMC OEM order), when receiving the BIOS on line refreshable order being accompanied with target CPU node information, jumps
Turn and perform step 4)；In the present embodiment, target CPU node information accounts for a byte of BIOS on line refreshable order, if 0,1,
2 and 3, the CPU node that target CPU node is CPU0, CPU1, CPU2 and CPU3 place the most corresponding；
4) obtain the target CPU node information that BIOS on line refreshable order is subsidiary, determine target according to target CPU node information
CPU node, and respectively one-level gating switch and the strobe state of two grades of gating switches are set by baseboard management controller BMC,
Make one-level gating switch gating target CPU node, the BIOS Flash of two grades of gating switch gating target CPU nodes；
5) baseboard management controller BMC sends BIOS renewal file request based on IPMI protocol to user side, and prepares to receive
BIOS updates file；User side response BIOS file request, updates BIOS file and is sent to substrate management based on IPMI protocol
Controller BMC, load mode uses IPMI protocol, it is possible to reduce the requirement to network environment；
6), after baseboard management controller BMC receives BIOS renewal file, started by memory techniques equipment and tie for target CPU
The read-write capability of the BIOS Flash of point, completes the renewal of the BIOS Flash of target CPU node, and status information is sent to
User side；
7) baseboard management controller BMC recovers the default conditions of the corresponding two grades of gating switches of target CPU node, redirects execution step
3).
In the present embodiment, the detailed step of step 1) includes:
1.1) in advance by the SPI controller of baseboard management controller BMC by one four select a gating switch respectively with each CPU
Node is connected, and four select a gating switch to include higher level's port and multiple subordinates port, and four higher levels selecting a gating switch
Port is connected with the SPI controller of baseboard management controller BMC, subordinate's port is connected with each CPU node, sees Fig. 2；
1.2) in advance the SPI interface of CPU in each CPU node and the SPI interface of BIOS Flash are passed through one two respectively
Selecting a gating switch and four to select subordinate's port of a gating switch to be connected, alternative gating switch includes higher level's port
With Liang Ge subordinate port, and higher level's port and four of alternative gating switch select a gating switch subordinate's port be connected,
One subordinate's port is connected with the CPU of CPU node, another subordinate's port is connected with the BIOS Flash of CPU node；
1.3) controlling four respectively by the GPIO port of baseboard management controller BMC selects a gating switch and each alternative to gate
The strobe state of switch, under default conditions, alternative gating switch gating CPU and four selects subordinate's port of a gating switch
It is connected.The present embodiment controls four states selecting a gating switch by two GPIO port of baseboard management controller BMC, when
When the output of both of the aforesaid GPIO port is respectively 0b ' 00,0b ' 01,0b ' 10 and 0b ' 11, four select a gating switch correspondence choosing respectively
Path between the SPI controller of the baseboard management controller BMC of logical CPU0, CPU1, CPU2 and CPU3；The present embodiment passes through
One GPIO port of baseboard management controller BMC controls the state of an alternative gating switch, and alternative gating switch
Selection switch (SPI_SEL) be connected, therefore corresponding four GPIO port of four CPU, four GPIO port of this group are operated in defeated
Exit pattern, acquiescence (Default) pattern is high level signal, now gates the SPI interface of CPU, in order to CPU at ordinary times opens
Dynamic.When output level is low, the SPI interface of gating BIOS Flash, burning pattern can be entered.Therefore, if user thinks burning
The BIOS of CPU0, first selects two GPIO of a gating switch to export 0b ' 00 four, CPU0 correspondence alternative is selected simultaneously
Open up the GPIO port output 0 of pass, i.e. gate the BIOS SPI path of CPU0.
It should be noted that the present embodiment is only the exemplary illustration carried out as a example by 4 CPU nodes, this enforcement
Example method is clearly not limited to concrete CPU node quantity, and correspondingly, four select a gating switch to should also be as using correspondence
Multiselect one gating switch, such as should use when should use one-out-three gating switch, 5 CPU nodes during 3 CPU nodes
Five select a gating switch, the like, do not repeat them here.
In the present embodiment, the detailed step of step 6) includes:
6.1), after baseboard management controller BMC receives BIOS renewal file, erasing target CPU is started by memory techniques equipment
The BIOS Flash of node, and in the completed current state information is sent to user side based on IPMI protocol；
6.2) baseboard management controller BMC updates file for the BIOS Flash burning BIOS of target CPU node, and will be current
Status information is sent to user side based on IPMI protocol；
6.3) baseboard management controller BMC updates file for the BIOS Flash burning BIOS of target CPU node, and completes
After current state information is sent to user side based on IPMI protocol；
6.4) baseboard management controller BMC for the BIOS Flash of target CPU node carry out file verification that burning enters and
BIOS Flash verifies, and in the completed based on IPMI protocol, current state information is sent to user side.
See abovementioned steps 6.1) ~ 6.4), after receiving file, baseboard management controller BMC starts erasing BIOS
Flash, file is downloaded in burning, the flow process of file and BIOS Flash is entered in inspection burning, each operating process use based on
The command delivery status information of IPMI protocol is to user, in order to user understands the progress of each step, it is provided that good user
Experience.After burning completes, need to switch alternative contactor, the GPIO signal of SPI_SEL is output as high level, this
Sample CPU just can start from new BIOS.During the execution of BIOS on line refreshable order (BMC OEM order), if appointed
What step is made mistakes, and baseboard management controller BMC needs to notify user side program, simultaneously cleaning baseboard management controller BMC
The various transitory state retained, the resource of release reservation and the acquiescence shape of the corresponding two grades of gating switches of recovery target CPU node
State, in order to user restarts BIOS on line refreshable order.
The above is only the preferred embodiment of the present invention, and protection scope of the present invention is not limited merely to above-mentioned enforcement
Example, all technical schemes belonged under thinking of the present invention belong to protection scope of the present invention.It should be pointed out that, for the art
Those of ordinary skill for, some improvements and modifications without departing from the principles of the present invention, these improvements and modifications are also
Should be regarded as protection scope of the present invention.
Claims (3)
1. the BIOS on line refreshable method towards many nodes server, it is characterised in that step includes:
1) in advance by the SPI controller of baseboard management controller BMC by one-level gating switch respectively with each CPU node phase
Even, the SPI interface of CPU in each CPU node and the SPI interface of BIOS Flash are passed through two grades of gating switches and respectively
Level gating switch is connected, and controls one-level gating switch and the gating shape of two grades of gating switches by baseboard management controller BMC
State, under default conditions, described two grades of gating switches gating CPU is connected with one-level gating switch；
2) after baseboard management controller BMC has initialized, by firmware loads SPI of described baseboard management controller BMC
The driver of controller, and generate the memory techniques equipment for reading and writing BIOS Flash；
3) baseboard management controller BMC waits that user side sends the BIOS being accompanied with target CPU node information based on IPMI protocol
On line refreshable order, when receiving the BIOS on line refreshable order being accompanied with target CPU node information, redirects execution step 4)；
4) obtain the target CPU node information that BIOS on line refreshable order is subsidiary, determine target according to target CPU node information
CPU node, and respectively one-level gating switch and the strobe state of two grades of gating switches are set by baseboard management controller BMC,
Make one-level gating switch gating target CPU node, the BIOS Flash of two grades of gating switch gating target CPU nodes；
5) baseboard management controller BMC sends BIOS renewal file request based on IPMI protocol to user side, and prepares to receive
BIOS updates file；User side response BIOS file request, updates BIOS file and is sent to substrate management based on IPMI protocol
Controller BMC；
6), after baseboard management controller BMC receives BIOS renewal file, started for target by described memory techniques equipment
The read-write capability of the BIOS Flash of CPU node, completes the renewal of the BIOS Flash of target CPU node, and by status information
It is sent to user side；
7) baseboard management controller BMC recovers the default conditions of the corresponding two grades of gating switches of target CPU node, redirects execution step
3).
BIOS on line refreshable method towards many nodes server the most according to claim 1, it is characterised in that described step
Rapid 1) detailed step includes:
1.1) in advance by the SPI controller of baseboard management controller BMC by multiselect one gating switch respectively with each CPU
Node is connected, and multiselect one gating switch includes higher level's port and multiple subordinates port, and the higher level of multiselect one gating switch
Port is connected with the SPI controller of baseboard management controller BMC, subordinate's port is connected with each CPU node；
1.2) in advance the SPI interface of CPU in each CPU node and the SPI interface of BIOS Flash are passed through one two respectively
Selecting a gating switch to be connected with subordinate's port of multiselect one gating switch, alternative gating switch includes higher level's port
With Liang Ge subordinate port, and higher level's port of alternative gating switch is connected with subordinate's port of multiselect one gating switch,
One subordinate's port is connected with the CPU of CPU node, another subordinate's port is connected with the BIOS Flash of CPU node；
1.3) control multiselect one gating switch respectively by the GPIO port of baseboard management controller BMC and each alternative gates
The strobe state of switch, alternative gating switch gating CPU and subordinate's port of multiselect one gating switch under default conditions
It is connected.
BIOS on line refreshable method towards many nodes server the most according to claim 2, it is characterised in that described step
Rapid 6) detailed step includes:
6.1), after baseboard management controller BMC receives BIOS renewal file, wiping purposes is started by described memory techniques equipment
The BIOS Flash of mark CPU node, and in the completed current state information is sent to user side based on IPMI protocol；
6.2) baseboard management controller BMC updates file for the BIOS Flash burning BIOS of target CPU node, and will be current
Status information is sent to user side based on IPMI protocol；
6.3) baseboard management controller BMC updates file for the BIOS Flash burning BIOS of target CPU node, and completes
After current state information is sent to user side based on IPMI protocol；
6.4) baseboard management controller BMC for the BIOS Flash of target CPU node carry out file verification that burning enters and
BIOS Flash verifies, and in the completed based on IPMI protocol, current state information is sent to user side.
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Cited By (14)
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| CN107092509A (en) * | 2017-04-19 | 2017-08-25 | 济南浪潮高新科技投资发展有限公司 | A kind of method that use BMC updates firmware |
| CN107153558A (en) * | 2017-05-17 | 2017-09-12 | 郑州云海信息技术有限公司 | A kind of principal and subordinate's BMC firmware upgrade methods based on SPI interface |
| CN107193594A (en) * | 2017-05-17 | 2017-09-22 | 郑州云海信息技术有限公司 | A kind of USB interface-based principal and subordinate BMC firmware upgrade methods |
| CN107861760A (en) * | 2017-11-24 | 2018-03-30 | 联想(北京)有限公司 | BIOS collocation method, terminal and server |
| CN108170451A (en) * | 2017-12-28 | 2018-06-15 | 曙光信息产业股份有限公司 | A kind of method and system of server B MC controls bios version upgrading |
| CN108170476A (en) * | 2018-01-26 | 2018-06-15 | 郑州云海信息技术有限公司 | A kind of method and system for recording server B ios release information |
| CN111414184A (en) * | 2020-04-14 | 2020-07-14 | 山东超越数控电子股份有限公司 | BIOS firmware updating method under domestic server |
| CN111949294A (en) * | 2020-08-06 | 2020-11-17 | 曙光信息产业(北京)有限公司 | Firmware refreshing method, device, server and computer readable storage medium |
| CN112988207A (en) * | 2021-03-24 | 2021-06-18 | 山东英信计算机技术有限公司 | BIOS updating method, device, equipment and readable storage medium based on Setup interface |
| CN113111001A (en) * | 2021-04-29 | 2021-07-13 | 苏州大学 | Remote software debugging method for embedded terminal |
| CN113741921A (en) * | 2021-06-11 | 2021-12-03 | 深圳市同泰怡信息技术有限公司 | Method and device for automatically upgrading double BIOS firmware |
| CN113791807A (en) * | 2021-06-11 | 2021-12-14 | 深圳市同泰怡信息技术有限公司 | BIOS firmware updating method and system based on four-way server and computer readable storage medium |
| CN114090095A (en) * | 2022-01-19 | 2022-02-25 | 苏州浪潮智能科技有限公司 | BIOS loading method and related components of CPU in multi-path server |
| CN116841358A (en) * | 2023-06-09 | 2023-10-03 | 启朔(深圳)科技有限公司 | Server refreshing method, refreshing structure, system, computer equipment and medium |
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