CN105825888B - The assembling structure of memory memory module and sensor module - Google Patents
The assembling structure of memory memory module and sensor module Download PDFInfo
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- CN105825888B CN105825888B CN201510008228.XA CN201510008228A CN105825888B CN 105825888 B CN105825888 B CN 105825888B CN 201510008228 A CN201510008228 A CN 201510008228A CN 105825888 B CN105825888 B CN 105825888B
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Abstract
A kind of assembling structure of memory memory module and sensor module, it includes a sensor controller, an in-line memory storage controller, a microcontroller and a nonvolatile memories.Identical microcontroller and identical nonvolatile memory are shared by the way that the sensor controller and the in-line memory storage controller to be integrated into, thus reduces the complexity of production cost and encapsulation.
Description
Technical field
The present invention relates to a kind of assembling structure, in particular to a kind of memory memory module and one or more single (a) sensings
The assembling structure of device module.
Background technique
Currently, electronic device (especially handheld apparatus, such as mobile phone, smart phone and tablet computer etc.) generallys use
The memory of large capacity carrys out storing data, commonly uses for example non-volatile flash memory (Flash of memory of large capacity
Memory), there are many kinds of the interfaces that non-volatile flash memory is connected with electronic device, such as: multimedia card
(Multimedia Card, MMC), in-line memory storage device interface (such as eMMC) and eMCP(its in eMMC framework
One dynamic memory of lower increase) etc., other have safe digital card (Secure Digital Card, SD card), UFS
(Universal Flash Storage), ONFI(Open NAND Flash Interface) and Toggle Flash
Interface etc..
The record media of electronic device (especially portable electric device) generallys use the memory for following MMC standard,
This electronic device (such as intelligent machine) can use this efficient MMC standard recording media inside device with inline mode,
The embedded storage device of this i.e. so-called eMMC interface.The memory storage apparatus of this type typically includes eMMC control
Device, microcontroller and nonvolatile memory etc., these elements can be encapsulated with ball grid array (Ball Grid Array, BGA)
Mode, which encapsulates, to be integral.
Fig. 1 shows the memory configuration block schematic diagram in a kind of existing electronic device 10.This electronic device 10 can be with
It is various electronic products, especially portable electric device, such as smart phone and tablet computer etc..As shown in Figure 1, with insertion
It is explained for formula memory storage apparatus interface eMMC, existing electronic device 10 is stored comprising a primary processor 110, one
Device memory module (herein by taking eMMC module as an example) 120 and a sensor module 130.EMMC module 120 is controlled comprising an eMMC
Device 122 processed and the first microcontroller 124 for being allocated to eMMC controller 122, eMMC module 120 are simultaneously non-volatile with one first
Property memory 126, eMMC controller 122 be by the first microcontroller 124 access the first nonvolatile memory 126 in number
According to.Sensor module 130 includes a sensor controller 132 and the second microcontroller for being allocated to sensor controller 132
134, sensor module 130 simultaneously has one second nonvolatile memory 136, and sensor controller 132 passes through the second micro-control
Device 134 processed accesses the data in the second nonvolatile memory 136.First nonvolatile memory 126 and second is non-volatile
Memory 136 may be, for example, flash memory, such as the first nonvolatile memory 126 is anti-and lock flash memory (NAND
Flash), the second nonvolatile memory 136 is NOR Flash or other kinds of nonvolatile memory, may be integrated
Enter in sensor controller 132, or exists in a manner of stacking and be packaged in sensor module 130.
In general, it can be configured with a static random access memory (not shown) (such as SRAM) in eMMC module 120,
It is usually located in the first microcontroller 124, is used for the first microcontroller 124.In addition, usually sensor module 130 can also configure
One SRAM and its be integrated in the second microcontroller 134, for the second microcontroller 134 use.Whereby, the first (or second) is non-easy
The property lost memory 126(or 136) in data can first read static random access memory, then by the first (or second) micro-control
134) device 124(processed accesses static random access memory, to increase the speed of its reading.
In existing electronic device 10, by taking embedded storage device eMMC interface as an example for, eMMC module 120 and pass
Sensor module 130(such as touch sensing module) be to be provided by different manufacturer, this because of technical difference or always with
The division of labor habit come, manufacturer will not production inventory device memory module and touch sensing module simultaneously, therefore show module
On encapsulating structure, eMMC module 120 and sensor module 130 will not be packaged in the same encapsulating structure.For example, existing
Have in technology, in 120 this respect of eMMC module, generallys use multi-chip package (MCP) technology for eMMC controller 122 and first
Nonvolatile memory 126 is packaged together, and the first nonvolatile memory 126 can be used the mode of stacking and progress capacity is facilitated to set
Meter.And in the aspect of sensor module 130, sensor controller 132(such as touch sensing), the second microcontroller 134 and second
Nonvolatile memory 136 is usually packaged in a packaging body or is integrated in same IC wafer, and other sensors such as inertia
Sensor, gyro sensor, height sensor, temperature sensor and audio sensor etc. and the production of the second microcontroller 134
In different IC wafers or it is packaged in different packaging bodies.Furthermore also due to eMMC module 120 and sensor module 130 are
Corresponding different function is operated, in the prior art the element in the element and sensor module 130 in eMMC module 120
Direct correlation is had no, eMMC module 120 and sensor module 130 are connected to primary processor by different transmission interfaces respectively
110, as shown in Figure 1.
Existing electronic device 10 has the following technical problems: the first, due to memory memory module such as eMMC module 120
Itself uses a microcontroller and a nonvolatile memory and static random access memory (such as SRAM), sensor module
130 itself also use a microcontroller and a nonvolatile memory and static random access memory (such as SRAM), because
Memory memory module 120 and sensor module 130 are used respectively using microcontroller and nonvolatile memory and SRAM
Close or identical function silicon intelligence wealth is repeated, its cost is increased；The second, in the prior art, memory memory module such as eMMC
Module 120 and sensor module 130 are respectively to be packaged, and cause higher packaging cost and increase printed circuit board (Printed
Circuit Board, PCB) area use.
Summary of the invention
One of present invention is designed to provide the assembling structure of a kind of memory memory module and sensor module, to reduce
Silicon intelligence wealth usage quantity and reduction packaging cost etc..
To reach above-mentioned purpose, the present invention provides the assembling structure of a kind of memory memory module and sensor module, packet
Contain: an in-line memory storage controller；One microcontroller, with the in-line memory storage controller coupling
It connects；One nonvolatile memory is coupled with the microcontroller, and the in-line memory storage controller passes through described
Microcontroller is read to the nonvolatile memory or storing data；And a sensor controller, for controlling sensing
Part is to generate or receive sensing signal；Wherein the sensor controller and the microcontroller couple, the sensor control
Device is read by the microcontroller to the nonvolatile memory or storing data.
In the present invention, in-line memory storage controller (such as eMMC controller) and sensor controller are shared
Microcontroller and nonvolatile memory, in-line memory storage controller and sensor controller are all to same micro-control
Device processed is operated to access the data in nonvolatile memory, journey relevant to in-line memory storage controller
Sequence code and data are all stored in nonvolatile memory simultaneously with and to the relevant procedure code of sensor controller and data, this
Sensor element sensing signal generated can also be subject to operation by microcontroller.Compared to existing electronic device, due to this
Microcontroller and nonvolatile memory are shared by in-line memory storage controller and sensor controller in invention,
There is no need to such as in-line memory storage controller and sensor controller need each self-configuring microcontroller in the prior art
Device and nonvolatile memory, thus compared to the prior art for, the present invention use less silicon intelligence wealth, wafer cost thus drop
It is low, and also reduce packaging cost.
Detailed description of the invention
Fig. 1 shows the memory configuration block schematic diagram in a kind of existing electronic device.
Fig. 2 shows the block schematic diagram of device according to a first embodiment of the present invention.
Fig. 3 shows the sensor controller of the present invention and the block schematic diagram of sensor.
Fig. 4 shows the block schematic diagram of device according to a second embodiment of the present invention.
Fig. 5 shows the block schematic diagram of device according to a third embodiment of the present invention.
Fig. 6 shows the block schematic diagram of device according to a fourth embodiment of the present invention.
Fig. 7 shows the block schematic diagram of device according to a fifth embodiment of the present invention.
Fig. 8 shows the block schematic diagram of device according to a sixth embodiment of the present invention.
Fig. 9 shows the block schematic diagram of device according to a seventh embodiment of the present invention.
Specific embodiment
In order to which the above-mentioned and other purposes of the present invention, feature, advantage can be clearer and more comprehensible, hereafter by spy lift the present invention compared with
Good embodiment, and cooperate institute's accompanying drawings, it is described in detail below, and in different schemas, identical numbers
The same or similar element.
Fig. 2 shows the block schematic diagram of the device 20 of first embodiment of the invention.Device 20 can be various electronic products,
Especially portable electric device, such as mobile phone, smart phone and tablet computer etc..Device 20 includes a primary processor 210, one
Memory memory module 220 and a sensor module 230.
Memory memory module 220 includes an in-line memory storage controller (such as eMMC(embedded
Multimedia Card) controller 222) and it is allocated to the microcontroller 224 that eMMC controller 222 uses, memory stores
Module 220 simultaneously has a nonvolatile memory 226, and eMMC controller 222 accesses non-volatile deposit by microcontroller 224
Data in reservoir 226.
In-line memory storage device also can be follow multimedia card (Multimedia Card, MMC), eMCP(its
Increase by a dynamic memory under eMMC framework), safe digital card (Secure Digital Card, SD card), UFS
(Universal Flash Storage), ONFI(Open NAND Flash Interface), Toggle Flash
Interface and the standard of other specifications etc..It is noted that herein in-line memory storage controller be with
It is illustrated, and is not limited thereto for eMMC controller 222.
Sensor module 230 has a sensor controller 232, as shown in Fig. 2, sensor controller 232 passes through sensing
Transmission interface between device controller 232 and memory memory module 220 utilizes the microcontroller in memory memory module 220
Device 224 accesses the data in the nonvolatile memory 226 of the module, that is to say, that in memory memory module 220
Sensor controller 232 in eMMC controller 222 and sensor module 230 shares microcontroller 224 and non-volatile memories
Device 226, and this shared microcontroller 224 also can provide operation other than the data in access nonvolatile memory 226
Function gives eMMC controller 222 and sensor controller 232.
Primary processor 210 is, for example, the central processing unit (CPU) in smart phone, and memory memory module 220 is usual
It is preferably realized with in-line memory storage device, sensor module 230 may include but be not limited to touch sensing, non-volatile
Property memory 226 it is implementable be a flash memory (Flash Memoery), such as anti-and lock flash memory (NAND
Flash) and/or NOR Flash, the storage array of the flash memory include several blocks (Blocks), each area
Block includes several pages (Pages).
As shown in Fig. 2, by taking in-line memory storage controller is eMMC controller 222 as an example, in described device
In 20, primary processor 210 passes through the eMMC controller 222 in the connection of MMC bus (bus) 211 memory memory module 220, and
Mutual send instructions and data, and primary processor 210 and sensor is connect with microcontroller 224 by sensor bus 212
Sensor controller 232 in module 230, and by the mutual send instructions of microcontroller 224 and data, wherein the sensor
The specification of bus 212 is generally I2C/SPI bus, but not limited to this.
In first embodiment of the invention, nonvolatile memory 226 is stored with and memory memory module 220 and sensor
Module 230 relevant data, such as procedure code, firmware, operating parameter or other data etc..When primary processor 210 carries out and deposits
When the relevant procedure code of reservoir memory module 220 or the accessing operation of data, primary processor 210 passes through MMC bus 211 to storage
EMMC controller 222 in device memory module 220 sends reading or write instruction, just according to described instruction eMMC controller 222
Procedure code relevant to memory memory module 220 or data are read from nonvolatile memory 226 by microcontroller 224
Out, it or is written into nonvolatile memory 226.When primary processor 210 carries out procedure code relevant to sensor module 230
Or data accessing operation when, primary processor 210 is by sensor bus 212 and microcontroller 224 into sensor module 230
Sensor controller 232 send read or write instruction, according to described instruction sensor controller 232 just utilize itself and storage
Transmission interface between device memory module 220, will journey relevant to sensor module 230 by sharing microcontroller 224 jointly
Sequence code or data are read from nonvolatile memory 226, or are written into nonvolatile memory 226.Wherein, microcontroller
Device 224 is stored by 232 institute of sensor controller in the eMMC controller 222 and sensor module 230 in memory module 220
Shared, algorithm needed for simultaneous memory memory module 220 and sensor module 230 and other related operations are also all common
Microcontroller 224 execute, nonvolatile memory 226 simultaneously store with memory memory module 220 and and sensor module
230 relevant procedure codes or data.
In first embodiment of the invention, as shown in Fig. 2, eMMC controller 222 and micro-control in memory memory module 220
Device 224 processed is packaged in the same packaging body, and multi-chip package (MCP) technology also can be used by eMMC in memory memory module 220
Controller 222 and nonvolatile memory 226 are packaged together, and the mode of stacking also can be used by 226 heap of nonvolatile memory
Repeatedly in eMMC controller 222 and microcontroller 224, this stacks the visual demand increase and decrease of mode and stacks number of plies adjustment memory appearance
Amount, facilitates carry out Capacity design.Sensor controller 232 in sensor module 230 is packaged in another packaging body, different
Sensor controller 232 in the packaging body of memory memory module 220, sensor module 230 is deposited by it with memory
Store up module 220 between transmission interface, be able to using with operation setting in the intracorporal micro-control of the encapsulation of memory memory module 220
Device 224 and nonvolatile memory 226 processed.
In first embodiment of the invention, memory memory module 220 and sensor module 230 have shared microcontroller 224
With nonvolatile memory 226, the sensor control of the eMMC controller 222 and sensor module 230 of memory memory module 220
Device 232 processed all shares use the same microcontroller 224, are operated to access the number in nonvolatile memory 226
According to, procedure code relevant to eMMC controller 222 and data with and with the relevant procedure code of sensor controller 232 and data it is same
When be all stored in nonvolatile memory 226, calculation needed for simultaneous memory memory module 220 and sensor module 230
Method and other related operations are also all executed in common microcontroller 224.Compared to existing electronic device, due to the present embodiment
Middle microcontroller 222 and nonvolatile memory 226 are shared by memory memory module 220 and sensor module 230, therefore nothing
Such as memory memory module and sensor module need each self-configuring microcontroller and nonvolatile memory to need in the prior art, because
This compared to the prior art for, the present embodiment use less silicon intelligence wealth, wafer cost thus reduce, and also reduce be packaged into
This.
Referring to figure 3., in various embodiments, sensor controller 232 can be used to control one or more
Sensor.Above-mentioned sensor may include touch sensing 241, inertial sensor 242, gyro sensor 243, acceleration biography
Sensor 244, audio sensor 245, height flowmeter sensor 246, humidity temperature pickup 247, photoinduction sensor 248 and pressure
Sensor 249.It should be noted that above-mentioned cited sensor 241 ~ 249 only as an example, but not limited to this.In addition,
When sensor module 230 is to control more than one sensor, the sensor module 230 can be used as a sensor line concentration
Device (Sensor Hub).
The microcontroller 224 of the present invention in addition to as shown in first embodiment be arranged in memory memory module 220 with
Outside, it can also be arranged in sensor module 230.The device 40 of shown second embodiment of the invention is referring to figure 4.
System block diagram.The device 40 of second embodiment of the invention is similar to the device 20 of first embodiment, the difference is that microcontroller 224
It is arranged in sensor module 230, microcontroller 224 is packaged in same with the sensor controller 232 in sensor module 230
In encapsulating structure, and sensor module 230 is coupled by a transmission interface and memory memory module 220, so that sensor
Module 230 and memory memory module 220 can carry out the transmission of data each other.Specifically, it in described device 40, deposits
EMMC controller 222 in reservoir memory module 220 by its transmission interface between sensor module 230, using being packaged in
The resource of microcontroller 224 in sensor module 230 carries out access action to nonvolatile memory 226；Sensor die
Sensor controller 232 in block 230 can be used directly the microcontroller 224 being packaged together with it, is situated between by the transmission
Face carries out access action to nonvolatile memory 226.
Fig. 5 shows the block schematic diagram of the device 50 of third embodiment of the invention.The device 50 of third embodiment of the invention
It is the difference is that described device 50 further includes a random access memory 250 similar to the device 20 of first embodiment
A kind of memory dedicated for portable electric device, random access memory 250 are, for example, low-power Double Data Rate (Low-
Power Double Data Rate) dynamic random access memory (LPDDR), but not limited to this, random access memory
250 be that special configuration is used to primary processor 210.As shown in figure 5, by random access memory 250 and memory memory module
220 encapsulation in the same packaging structure, form a kind of embedded multi-chip package (such as eMCP).That is, the present invention also fits
For the memory memory module under eMCP framework.In this encapsulating structure, primary processor 210 is connected by LPDDR bus 213
Random access memory 250.In the present invention, the packaging method of any encapsulating structure can be realized by various technologies, example
Such as wire bonds (Wire Bonding), brilliant (Flip-chip) or stacking encapsulate (Package on Package, POP) etc.
Technology.
As shown in figure 5, including a sensing in the encapsulating structure of memory memory module 220 and random access memory 250
Device bus 212.Sensor bus 212 is connected to primary processor 210 and memory memory module 220 and random access memory
Between 250 encapsulating structure, sensor controller 230 is then connect by another transmission interface with the encapsulating structure.Therefore, main place
Reason device 210 can pass through the encapsulating structure of inductor bus 212 and memory memory module 220 and random access memory 250
Another transmission interface between sensor controller 232 is linked up with sensor controller 232 and is operated.
Fig. 6 shows the block schematic diagram of the device 60 of fourth embodiment of the invention.The structure of described device 60 is similar to this
Invention 3rd embodiment, the difference is that as shown in fig. 6, MMC bus 211 and sensor bus 212 and 213 structure of LPDDR bus
It is connected between primary processor 210 and memory memory module 220 and the encapsulating structure of random access memory 250 at one
Transfer bus 215, compared to the prior art, this transfer bus 215 are a compatible specifications, in addition to the needle of MMC bus 211
Outside foot, the stitch of the sensor controller 232 corresponding to sensor module 230 is further comprised.
Fig. 7 shows the block schematic diagram of the device 70 of fifth embodiment of the invention.The structure of described device 70 is similar to this
Invention fourth embodiment, the difference is that bus 211 ' is new a crossfire interface or novel state in fifth embodiment of the invention
Interface may replace original interface, and bus 211 ' can be adjusted under the framework of original MMC bus, so that the stitch of bus 211 '
Signal transmission is carried out for eMMC controller 222 and sensor controller 232 to use.New crossfire is situated between in fifth embodiment of the invention
Face 211 ' is unlike the prior art.
In a specific embodiment, pass through this transfer bus 215 or 215 ', primary processor 210 can directly transmit instruction to
Microcontroller 224, the type based on described instruction are micro- if described instruction is instruction relevant to memory memory module 220
Described instruction is transferred to eMMC controller 222 and handled by controller 224；If described instruction is and 230 phase of sensor module
The instruction of pass, the then encapsulating structure and biography that microcontroller 224 passes through memory memory module 220 and random access memory 250
Described instruction is transferred to sensor controller 232 and handled by the transmission interface between sensor module 230.
Fig. 8 shows the block schematic diagram of the device 80 of sixth embodiment of the invention.As shown in figure 8, in described device 80,
EMMC controller 222 and sensor controller 232 share a microcontroller 224, while eMMC controller 222 and sensor control
Device 232 processed has also shared a static random access memory (such as SRAM) 228, and static random access memory 228 shares
The data in nonvolatile memory 226 may make first to read static random access memory 228, then by microcontroller 224
Volatile storage 228 is accessed, to improve access efficiency.In addition, the driver code or firmware of eMMC controller 222
(Firmware) the driver code or firmware FW2 of FW1 and sensor controller 232 separatedly or with integrating are configured at non-volatile
In property memory 226.When system starts or initializes or needs, the eMMC in nonvolatile memory 226 can will be configured at
Firmware FW1, FW2 (or integrating firmware) of controller 222 and sensor controller 232 are loaded into static random access memory 228
In, and in system operation, a part of procedure code in firmware FW1, FW2 can be read, also to execute the required correspondence portion
The function of branch code.
Particularly, eMMC controller 222, sensor controller 232, microcontroller 224 and static random access memory
228 are made in same wafer, as shown in figure 8, multi-chip package (MCP) technology is then used, by these in same platelet
Element and nonvolatile memory 226(and random access memory 250 in member) it is packaged together, that is, be packaged in same
In encapsulating structure.The mode that middle eMMC controller and sensor controller are respectively packaged compared to the prior art, the present invention
Sixth embodiment is that encapsulation can be effectively reduced in packaged type used by integrating memory memory module and sensor module
Cost, and reduce module number.
Fig. 9 shows that the block schematic diagram of the device 90 of seventh embodiment of the invention states the structure of device 90 similar to the present invention
Sixth embodiment, the difference is that eMMC controller 222 is produced on sensor controller 232 in seventh embodiment of the invention
In different wafers, only eMMC controller 222, sensor controller 232, microcontroller 224, volatile storage 228 and non-
Volatile memory 226(and random access memory 250) it still encapsulates in the same packaging structure.
It should be noted that in other embodiments, device, which can have, is similar to third embodiment of the invention to the 7th reality
The structure of any embodiment in example is applied, the difference is that microcontroller 224 is arranged in sensor module 230.Related above-mentioned implementation
The concept of microcontroller and the nonvolatile memory integration of example is similar to the first to seven embodiment of the present invention, is not subject to herein
It repeats.
Although the present invention has used preferred embodiment disclosed above, however, it is not to limit the invention, skill belonging to the present invention
Have usually intellectual in art field, without departing from the spirit and scope of the invention, may make various changes and modifications, because
The scope of protection of the present invention shall be subject to the definition of the patent scope appended hereto for this.
Claims (10)
1. the assembling structure of a kind of memory memory module and sensor module, characterized by comprising:
One in-line memory storage controller；
One microcontroller is coupled with the in-line memory storage controller；
One nonvolatile memory, couples with the microcontroller, and the in-line memory storage controller passes through institute
Microcontroller is stated to read the nonvolatile memory or storing data；
One sensor controller generates for controlling sensing element or receives sensing signal；And
One primary processor passes through a bus and the in-line memory storage controller and the microcontroller coupling
It connects,
Wherein the sensor controller and the microcontroller couple, and the sensor controller passes through the microcontroller pair
The nonvolatile memory is read or storing data；
Wherein the in-line memory storage controller and the sensor controller share the microcontroller and institute
State nonvolatile memory；And
Wherein the sensor controller and at least one sensor couple, at least one described sensor is sensed comprising touch-control
The one at least within of device, inertial sensor, gyro sensor, acceleration transducer and audio sensor.
2. the assembling structure of memory memory module and sensor module according to claim 1, it is characterised in that: described
In-line memory storage controller, the microcontroller and the nonvolatile memory are packaged in same encapsulating structure
In or the in-line memory storage controller, the sensor controller, the microcontroller and described non-volatile
Property memory package is in same encapsulating structure.
3. the assembling structure of memory memory module and sensor module according to claim 2, it is characterised in that: described
Nonvolatile memory is sealed in a manner of stacking with the in-line memory storage controller and the sensor controller
Dress is in the same packaging structure.
4. the assembling structure of memory memory module and sensor module according to claim 1, it is characterised in that: described
Sensor controller and the microcontroller are packaged in same encapsulating structure.
5. the assembling structure of memory memory module and sensor module according to claim 1, it is characterised in that: described
In-line memory storage controller and the sensor controller pass through respectively one first bus and one second bus with
The primary processor is connected, wherein first bus and second bus are the bus of different frameworks.
6. the assembling structure of memory memory module and sensor module according to claim 1, it is characterised in that: described
Sensor controller passes through its one first transmission between the encapsulating structure of the in-line memory storage controller
One second between interface and the encapsulating structure and the primary processor of the in-line memory storage controller passes
Defeated interface carries out signal transmission with the primary processor.
7. the assembling structure of memory memory module and sensor module according to claim 6, it is characterised in that: described
Second transmission interface includes a sensor bus, the input interface of signal the transmitting type and the sensor controller of stitch
It is corresponding.
8. the assembling structure of memory memory module and sensor module according to claim 6, it is characterised in that: described
Sensor controller and the in-line memory storage controller pass through same bus and processor progress signal
Transmission.
9. the assembling structure of memory memory module and sensor module according to claim 1, it is characterised in that: described
Primary processor, which directly transmits, to be instructed to the microcontroller, the type based on described instruction, if described instruction is and the insertion
The relevant instruction of formula memory storage apparatus controller, then described instruction is transferred to the embedded storage by the microcontroller
Device storage controller is handled；If described instruction is instruction relevant to the sensor controller, the micro-control
Described instruction is transferred to the sensor controller and handled by device processed.
10. the assembling structure of memory memory module and sensor module according to claim 1, it is characterised in that: institute
State the driver code of in-line memory storage controller or the driver code of firmware and the sensor controller
Or firmware configuration is in the nonvolatile memory.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1732449A (en) * | 2002-11-21 | 2006-02-08 | 桑迪士克股份有限公司 | Combination non-volatile memory and input-output card with direct memory access |
| CN101373437A (en) * | 2007-04-10 | 2009-02-25 | 标准微系统公司 | Accessing safety memory by embedded controller to increase system safety |
| CN101599295A (en) * | 2008-06-02 | 2009-12-09 | 联阳半导体股份有限公司 | Integrated storage device and control method thereof |
| CN103035282A (en) * | 2011-09-30 | 2013-04-10 | 群联电子股份有限公司 | Memory storage device, memory controller and temperature management method |
| CN103389880A (en) * | 2012-05-07 | 2013-11-13 | 擎泰科技股份有限公司 | Operating method, apparatus, and memory module integrated with wireless communication component |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US8117445B2 (en) * | 2006-12-20 | 2012-02-14 | Spansion Llc | Near field communication, security and non-volatile memory integrated sub-system for embedded portable applications |
-
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1732449A (en) * | 2002-11-21 | 2006-02-08 | 桑迪士克股份有限公司 | Combination non-volatile memory and input-output card with direct memory access |
| CN101373437A (en) * | 2007-04-10 | 2009-02-25 | 标准微系统公司 | Accessing safety memory by embedded controller to increase system safety |
| CN101599295A (en) * | 2008-06-02 | 2009-12-09 | 联阳半导体股份有限公司 | Integrated storage device and control method thereof |
| CN103035282A (en) * | 2011-09-30 | 2013-04-10 | 群联电子股份有限公司 | Memory storage device, memory controller and temperature management method |
| CN103389880A (en) * | 2012-05-07 | 2013-11-13 | 擎泰科技股份有限公司 | Operating method, apparatus, and memory module integrated with wireless communication component |
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