CN105810592A - Copper needle structure used for stacking type packaging and preparation method therefor - Google Patents
Copper needle structure used for stacking type packaging and preparation method therefor Download PDFInfo
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- CN105810592A CN105810592A CN201610301929.7A CN201610301929A CN105810592A CN 105810592 A CN105810592 A CN 105810592A CN 201610301929 A CN201610301929 A CN 201610301929A CN 105810592 A CN105810592 A CN 105810592A
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract
The invention provides a copper needle structure used for stacking type packaging and a preparation method therefor. The copper needle structure comprises a structure of a to-be-prepared copper cylinder convex block, and a copper needle structure, wherein the copper needle structure is fixedly connected to the structure of the to-be-prepared copper cylinder convex block through welding; each copper needle is corresponding to the position of the corresponding to-be-prepared copper cylinder convex block separately; and each formed copper needle of the copper needle structure is inserted and fixedly welded on the structure of the to-be-prepared copper cylinder convex block. The pre-prepared copper needle is directly inserted into a position where the copper cylinder convex block needs to be manufactured, of a chip or a packaging structure to replace a conventional process for manufacturing the copper cylinder through electroplating, so that the process time and the process cost are saved, and the packaging and stacking capability of the copper pins is improved; perpendicular integration of multiple layers of active electronic equipment can be realized; the processes of electroplating and the like are not required, so that the process requirement and influence are lowered; the stacking capability and the performance of the POP stacked type packaging structure can be improved; and in addition, the copper needle structure can be effectively applied to PCB substrates, TSV and other technologies.
Description
Technical field
The present invention relates to a kind of semiconductor package and method, particularly relate to a kind of copper needle construction for stacked package and preparation method thereof.
Background technology
Along with the function of integrated circuit is increasingly stronger, performance and the more and more higher and novel integrated circuit of integrated level occur, encapsulation technology plays more and more important role in IC products, and ratio shared in the value of whole electronic system is increasing.Meanwhile, along with integrated circuit feature size reaches nanoscale, transistor is to more high density, the development of higher clock frequency, and encapsulation also develops to more highdensity direction.Along with packaging density improves constantly, narrow pitch electricity interlinkage and the reliability thereof of chip and chip or chip and base plate for packaging have become challenge.Traditional lead-free solder Bumping Technology is difficult to meet the further growth requirement of thin space interconnection.Copper pillar bump interconnection technique, with its good electric property, deelectric transferred ability, is just becoming the key technology of chip narrow pitch interconnection of future generation.
Microelectronics Packaging is that semiconductor chip provides the electrical connection being connected to circuit substrate, fragile sensitive chip is protected by simultaneously, it is simple to tests, reprocess, standardization input, output port, and improves the thermal mismatching of semiconductor chip and circuit substrate.In order to comply with development and the environmental conservation decree demand to microelectronics Packaging of silicon-based semiconductor chip technology, microelectronics Packaging interconnection technique (structure and material) is also in continuous differentiation: interconnects from wire bonding to flip-chip, be interconnected to the interconnection of lead-free solder salient point from tin-lead/high kupper solder salient point, be interconnected to copper pillar bump interconnection from solder bump.As chip package interconnection technique of future generation, copper pillar bump interconnection is adopted by increasing chip package designs just gradually.Copper pillar bump technology makes foot from densification (FinePitch), low clearance, higher input and output, has better reliability than C4 projection, is therefore widely used in the technical fields such as PMIC, storage facilities, application processor.
But, traditional copper post technique generally adopts the method such as electroplating technology or chemical plating process to prepare, and these processing steps are complicated, it is difficult to the copper post of preparation larger thickness, and the equipment price needed is expensive, not only loses time, and substantially increases production cost.
In view of the above, it is provided that a kind of structure and step are simple, copper needle construction for stacked package of low cost and preparation method thereof is necessary.
Summary of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of copper needle construction for stacked package and preparation method thereof, is used for solving copper pillar bump complex process in prior art, relatively costly problem.
For achieving the above object and other relevant purposes, the preparation method that the present invention provides a kind of copper needle construction for stacked package, described preparation method includes step: step 1), make some copper pins；Step 2), it is provided that a half tone, described half tone is formed some holes, described half tone is arranged on the structure being intended to preparation copper pillar bumps, and make the position of each hole corresponding with the position being intended to preparation copper pillar bumps in structure；Step 3), plant copper pin in each hole being intended to preparation copper pillar bumps position.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, also include step 4), adopt and plant ball technique and each copper pin is fixedly connected on the structure being intended to preparation copper pillar bumps.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, further comprise the steps of: step 5), by step 1)～step 4) the first bronze medal needle construction is prepared on chip；Step 6), it is provided that one supports substrate, forms adhesive layer in described support substrate surface, and forms re-wiring layer in described adhesive layer surface；Step 7), there is the chip of copper needle construction to be installed on described re-wiring layer preparation；Step 8), by step 1)～4) the second bronze medal needle construction is prepared on described re-wiring layer；Step 9), adopt encapsulating material to encapsulate each chip, and expose the second bronze medal needle construction, peel off and remove described adhesive layer and support substrate, form the first encapsulating structure；Step 10), by step 1)～step 4) the 3rd bronze medal needle construction is prepared in the re-wiring layer back side, it is provided that the second encapsulating structure, and realize the interconnection between the first encapsulating structure and the second encapsulating structure by described 3rd bronze medal needle construction.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, step 1) including: a copper cash is provided, described copper cash is split into multiple copper pin.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, step 1) adopt the method for wire drawing machine or precise forming to prepare described some copper pins.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, the length range of described copper pin is 50～200 μm, copper pin diameter range for 50-200 μm.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, described copper needle construction is for one or more combinations in the copper pillar bumps structure of chip, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure.
Further, described chip includes the one in one chip and compound chip.
As a kind of preferred version of preparation method of the copper needle construction for stacked package of the present invention, step 3) in, prior to being intended to the making solder tack coat of preparation copper pillar bumps position before inserting copper pin.
Further, described solder tack coat includes Sn layer and Colophonium
Further, the technique making described Sn layer includes the one in evaporation process, electroplating technology, chemical plating process and typography.
A kind of preferred version of preparation method as the copper needle construction for stacked package of the present invention, step 3) including: step 3-1), based on adsorbent equipment, a large amount of copper pins are released on described half tone, the copper pin making Partial angle suitable is inserted in some perforations, and is bonded in bottom hole by solder tack coat；Step 3-2), based on adsorbent equipment, the copper pin not being inserted in hole is adsorbed again, be then again released on described half tone, be repeatedly performed till above step makes all to be plugged with copper pin in institute's hole.
Further, described adsorbent equipment is selected as vacuum absorption device.
The present invention also provides for a kind of copper needle construction for stacked package, including: it is intended to the structure of preparation copper pillar bumps；And copper needle construction, it is fixedly connected by welding on the described structure being intended to preparation copper pillar bumps, the position of each copper pin is corresponding with being intended to preparation copper pillar bumps position, plants and be fixedly welded on the described structure being intended to preparation copper pillar bumps after each copper pin molding of described copper needle construction.
As a kind of preferred version of copper needle construction for stacked package of the present invention, the length range of described copper pin is 50-200 μm, copper pin diameter range for 50-200 μm.
As a kind of preferred version of the copper needle construction for stacked package of the present invention, each copper pin is welded and fixed by solder layer and Colophonium and is connected on the described structure being intended to preparation copper pillar bumps.
As a kind of preferred version of the copper needle construction for stacked package of the present invention, described copper needle construction is for one or more combinations in the copper pillar bumps structure of chip, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure.
Further, described chip includes the one in one chip and compound chip.
As a kind of preferred version of the copper needle construction for stacked package of the present invention, including: the first encapsulating structure and the second encapsulating structure, including: chip, described chip surface is formed with the first bronze medal needle construction, and is installed on the first re-wiring layer；First re-wiring layer, described first re-wiring layer is formed the second bronze medal needle construction；Encapsulating material, is packaged on described chip and the first re-wiring layer, and exposes described second bronze medal needle construction；Described first encapsulating structure and the second encapsulating structure realize interconnection by the 3rd bronze medal needle construction.
As mentioned above, copper needle construction for stacked package of the present invention and preparation method thereof, have the advantages that the present invention previously prepared good copper pin is inserted directly into chip or encapsulating structure need make copper pillar bumps position, with the technique replacing conventionally employed plating to make copper post, greatly save process time and process costs, and substantially increase the ability of copper pin package storehouse.The present invention can realize the vertical integration of the active electronic devices of multilamellar, owing to the techniques such as plating need not be adopted, reduce process conditions demand, and reduce the impact of technological factor, when POP is stacking, replace stannum ball with copper pin and can realize less spacing (Pitch), it is possible to be greatly improved stacking ability and the performance of POP stack encapsulation structure.Present invention process and simple in construction, can be effectively improved encapsulating structure performance, reduces cost, is with a wide range of applications in field of semiconductor manufacture.
Accompanying drawing explanation
Fig. 1～Figure 10 is shown as the structural representation that each step of preparation method of the copper needle construction for stacked package of the present invention presents.
Figure 11～Figure 15 is shown as the technique in the copper needle construction copper pillar bumps structure for chip of the present invention, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure and structural representation.
Element numbers explanation
101 structures being intended to preparation copper pillar bumps
102 half tones
103Sn layer
104 Colophonium
105 bronze medal pins
106 adsorbent equipments
201 chips
202 re-wiring layers
105a the first bronze medal pin
105b the second bronze medal pin
105c the 3rd bronze medal pin
203 support substrate
204 adhesive layers
205 encapsulating materials
Detailed description of the invention
Below by way of specific instantiation, embodiments of the present invention being described, those skilled in the art the content disclosed by this specification can understand other advantages and effect of the present invention easily.The present invention can also be carried out by additionally different detailed description of the invention or apply, and the every details in this specification based on different viewpoints and application, can also carry out various modification or change under the spirit without departing from the present invention.
Refer to Fig. 1～Figure 15.It should be noted that, the diagram provided in the present embodiment only illustrates the basic conception of the present invention in a schematic way, then only display component count with relevant assembly in the present invention but not when implementing according to reality, shape and size drafting in diagram, during its actual enforcement, the kenel of each assembly, quantity and ratio can be a kind of random change, and its assembly layout kenel is likely to increasingly complex.
As shown in Fig. 1～Figure 15, the preparation method that the present embodiment provides a kind of copper pin 105 structure for stacked package, described preparation method includes step:
As shown in Fig. 1～Fig. 2, first carry out step 1), make some copper pins 105.
As shown in Fig. 1～Fig. 2, exemplarily, step 1) including: a copper cash is provided, described copper cash is split into multiple copper pin 105.The length of described copper pin 105 can be determined according to process conditions, to meet the demand of different types of pin in different chip-packaging structures.In the present embodiment, the length range of described copper pin 105 is 50～200 μm, and copper pin diameter is at 50-200 μm.
It addition, step 1) in, it is also possible to adopt some copper pins 105 as described in the method preparation of wire drawing machine or precise forming.
As shown in Fig. 3～Fig. 4, then step 2 is carried out), it is provided that a half tone 102, described half tone 102 is formed with some holes, described half tone 102 is arranged on the structure 101 being intended to preparation copper pillar bumps, and makes the position of each hole corresponding with the position being intended to preparation copper pillar bumps in structure.
Exemplarily, in described half tone 102, the diameter of each hole is equal or slightly larger than the diameter of copper pin 105.
Exemplarily, step 3) in, prior to being intended to the making solder tack coat of preparation copper pillar bumps position before inserting copper pin 105.In the present embodiment, described solder tack coat includes Sn layer 103 and Colophonium 104, and the technique making described Sn layer 103 includes the one in evaporation process, electroplating technology, chemical plating process and typography.Specifically, the technique making described Sn layer 103 is typography.
As shown in Fig. 5～Figure 10, finally carry out step 3), plant copper pin 105 in each hole being intended to preparation copper pillar bumps position.
Specifically, step 3) including:
Step 3-1), based on adsorbent equipment 106, a large amount of copper pins 105 are released on described half tone 102 so that the copper pin 105 that Partial angle is suitable is inserted in some perforations, and is bonded in bottom hole by solder tack coat；
Step 3-2), based on adsorbent equipment 106, the copper pin 105 not being inserted in hole is adsorbed again, be then again released on described half tone 102, be repeatedly performed till above step makes all to be plugged with copper pin 105 in institute's hole.
Preferably, described adsorbent equipment 106 is selected as vacuum absorption device.
The present invention previously prepared good copper pin 105 is inserted directly into chip or encapsulating structure need make copper pillar bumps position, with the technique replacing conventionally employed plating to make copper post, greatly save process time and process costs, and substantially increase the ability of copper pin package storehouse.
As shown in Figure 11～Figure 13, described copper pin 105 structure is for one or more combinations in the copper pillar bumps structure of chip 201, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure, wherein, described chip 201 includes the one in one chip and compound chip.
It addition, the present embodiment also includes step 4), employing is planted ball technique and is fixedly connected on by each copper pin 105 on the structure 101 being intended to preparation copper pillar bumps.
As shown in figure 11, described copper pin 105 structure is for the copper pillar bumps structure of chip 201, and the pin as chip 201 is drawn, and during this example, also includes the step making projection cube structure by planting ball reflux technique in each copper pin 105a upper surface.
As shown in figure 14, described copper pin 105 structure can be simultaneously used for the copper pillar bumps structure of chip 201 and the copper pillar bumps structure of POP stack encapsulation structure, making has the chip 201 of copper pin 105a structure to adopt the form of upside-down mounting to be connected on the re-wiring layer 202 of package substrates, then, again through step 1)～step 4) on described re-wiring layer 202, make copper pin 105b structure, the overall pin realizing encapsulating structure is drawn, as shown in figure 12.
As shown in figure 15, described copper pin 105 structure can be simultaneously used for the copper pillar bumps structure of chip 201, in the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure, making has the chip 201 of copper pin 105a structure to adopt the form of upside-down mounting to be connected on the re-wiring layer 202 of package substrates, then, by step 1)～step 4) on described re-wiring layer 202, make copper pin 105b structure, the overall pin realizing encapsulating structure is drawn, finally, the interconnection between encapsulating structure and encapsulating structure is realized by described copper pin 105c structure, as shown in figure 13.
Specifically, make said structure to include:
Step 5), by step 1)～step 4) the first bronze medal pin 105a structure is prepared on chip 201, as shown in figure 11；
Step 6), it is provided that one supports substrate 203, forms adhesive layer 204 in described support substrate 203 surface, and forms re-wiring layer 202 in described adhesive layer 204 surface, as shown in figure 12；
Step 7), there is the chip 201 of copper pin 105a structure to be installed on described re-wiring layer 202 preparation, as shown in figure 12；
Step 8), by step 1)～4) the second bronze medal pin 105b structure is prepared on described re-wiring layer 202, as shown in figure 12；
Step 9), adopt encapsulating material 205 to encapsulate each chip 201, and expose the second bronze medal pin 105b structure, peel off and remove described adhesive layer 204 and support substrate 203, form the first encapsulating structure, as shown in figure 13；
Step 10), by step 1)～step 4) the 3rd bronze medal pin 105c structure is prepared in re-wiring layer 202 back side, second encapsulating structure is provided, and realizes the interconnection between the first encapsulating structure and the second encapsulating structure by described 3rd bronze medal pin 105c structure, as shown in figure 14.
As shown in Figure 10～Figure 13, the present embodiment also provides for a kind of copper needle construction for stacked package, including: it is intended to the structure 101 of preparation copper pillar bumps；And copper needle construction, it is fixedly connected by welding on the described structure 101 being intended to preparation copper pillar bumps, the position of each copper pin 105 is corresponding with being intended to preparation copper pillar bumps position, plant after each copper pin 105 molding of described copper needle construction and be fixedly welded on the described structure being intended to preparation copper pillar bumps, each copper pin 105 of described copper needle construction can split molding by copper cash, or adopts wire drawing machine or precise forming equipment molding.
Exemplarily, the length range of described copper pin 105 is 50-200 μm, and copper pin diameter is at 50-200 μm.
Exemplarily, each copper pin 105 is welded and fixed by solder layer and Colophonium 104 and is connected on the described structure 101 being intended to preparation copper pillar bumps.
As shown in Figure 11～Figure 13, exemplarily, described copper pin 105 structure is for one or more combinations in the copper pillar bumps structure of chip 201, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure.Wherein, described chip 201 includes the one in one chip and compound chip.
As shown in figure 11, described copper pin 105 structure is for the copper pillar bumps structure of chip 201, and the pin as chip 201 is drawn, and during this example, each copper pin 105 upper surface has also made solder structure.
As shown in figure 12, described copper pin 105 structure can be simultaneously used for the copper pillar bumps structure of chip 201 and the copper pillar bumps structure of POP stack encapsulation structure, making has the chip 201 of copper pin 105 structure to adopt the form of upside-down mounting to be connected on the re-wiring layer 202 of package substrates, then, copper pin 105 structure is made further on described re-wiring layer 202, the overall pin realizing encapsulating structure is drawn, as shown in figure 12.
As shown in figure 13, described copper pin 105 structure can be simultaneously used in the copper pillar bumps structure of chip 201, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure, making has the chip 201 of copper pin 105 structure to adopt the form of upside-down mounting to be connected on the re-wiring layer 202 of package substrates, copper pin 105 structure is made further on described re-wiring layer 202, the overall pin realizing encapsulating structure is drawn, finally, the interconnection between encapsulating structure and encapsulating structure is realized, as shown in figure 13 by described copper pin 105 structure.
As shown in figure 13, it includes the first encapsulating structure and the second encapsulating structure to one specific embodiment, including: chip, described chip 201 surface is formed with the first bronze medal pin 105a structure, and is installed on the first re-wiring layer 202；First re-wiring layer 202, described first re-wiring layer 202 is formed the second bronze medal pin 105b structure；Encapsulating material 205, is packaged on described chip and the first re-wiring layer 202, and exposes described second bronze medal pin 105b structure；Described first encapsulating structure and the second encapsulating structure realize interconnection by the 3rd bronze medal pin 105c structure.
As mentioned above, copper pin 105 structure for stacked package of the present invention and preparation method thereof, have the advantages that the present invention previously prepared good copper pin 105 is inserted directly into chip or encapsulating structure need make copper pillar bumps position, with the technique replacing conventionally employed plating to make copper post, greatly save process time and process costs, and substantially increase the ability of copper pin package storehouse.The present invention can realize the vertical integration of the active electronic devices of multilamellar, owing to the techniques such as plating need not be adopted, reduce process conditions demand, and reduce the impact of technological factor, when POP is stacking, replace stannum ball with copper pin and can realize less spacing (Pitch), it is possible to be greatly improved stacking ability and the performance of POP stack encapsulation structure.Present invention process and simple in construction, can be effectively improved encapsulating structure performance, reduces cost, is with a wide range of applications in field of semiconductor manufacture.So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
Above-described embodiment is illustrative principles of the invention and effect thereof only, not for the restriction present invention.Above-described embodiment all under the spirit and category of the present invention, can be modified or change by any those skilled in the art.Therefore, art has usually intellectual such as modifying without departing from all equivalences completed under disclosed spirit and technological thought or change, must be contained by the claim of the present invention.
Claims (19)
1. the preparation method for the copper needle construction of stacked package, it is characterised in that described preparation method includes step:
Step 1), make some copper pins；
Step 2), it is provided that a half tone, described half tone is formed some holes, described half tone is arranged on the structure being intended to preparation copper pillar bumps, and make the position of each hole corresponding with the position being intended to preparation copper pillar bumps in structure；
Step 3), plant copper pin in each hole being intended to preparation copper pillar bumps position.
2. the preparation method of the copper needle construction for stacked package according to claim 1, it is characterised in that: also include step 4), employing is planted ball technique and is fixedly connected on by each copper pin on the structure being intended to preparation copper pillar bumps.
3. the preparation method of the copper needle construction for stacked package according to claim 2, it is characterised in that: further comprise the steps of:
Step 5), by step 1)～step 4) the first bronze medal needle construction is prepared on chip；
Step 6), it is provided that one supports substrate, forms adhesive layer in described support substrate surface, and forms re-wiring layer in described adhesive layer surface；
Step 7), there is the chip of copper needle construction to be installed on described re-wiring layer preparation；
Step 8), by step 1)～4) the second bronze medal needle construction is prepared on described re-wiring layer；
Step 9), adopt encapsulating material to encapsulate each chip, and expose the second bronze medal needle construction, peel off and remove described adhesive layer and support substrate, form the first encapsulating structure；
Step 10), by step 1)～step 4) the 3rd bronze medal needle construction is prepared in the re-wiring layer back side, it is provided that the second encapsulating structure, and realize the interconnection between the first encapsulating structure and the second encapsulating structure by described 3rd bronze medal needle construction.
4. the preparation method of the copper needle construction for stacked package according to claim 1, it is characterised in that: step 1) including: a copper cash is provided, described copper cash is split into multiple copper pin.
5. the preparation method of the copper needle construction for stacked package according to claim 1, it is characterised in that: step 1) adopt the method for wire drawing machine or precise forming to prepare described some copper pins.
6. the preparation method of the copper needle construction for stacked package according to claim 1, it is characterised in that: the length range of described copper pin is 50～200 μm, copper pin diameter range for 50-200 μm.
7. the preparation method of the copper needle construction for stacked package according to claim 1, it is characterised in that: described copper needle construction is for one or more combinations in the copper pillar bumps structure of chip, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure.
8. the preparation method of the copper needle construction for stacked package according to claim 7, it is characterised in that: described chip includes the one in one chip and compound chip.
9. the preparation method of the copper needle construction for stacked package according to claim 1, it is characterised in that: step 3) in, prior to being intended to the making solder tack coat of preparation copper pillar bumps position before inserting copper pin.
10. the preparation method of the copper needle construction for stacked package according to claim 9, it is characterised in that: described solder tack coat includes Sn layer and Colophonium.
11. the preparation method of the copper needle construction for stacked package according to claim 10, it is characterised in that: the technique making described Sn layer includes the one in evaporation process, electroplating technology, chemical plating process and typography.
12. the preparation method of the copper needle construction for stacked package according to claim 9, it is characterised in that: step 3) including:
Step 3-1), based on adsorbent equipment, a large amount of copper pins are released on described half tone so that the copper pin that Partial angle is suitable is inserted in some perforations, and is bonded in bottom hole by solder tack coat；
Step 3-2), based on adsorbent equipment, the copper pin not being inserted in hole is adsorbed again, be then again released on described half tone, be repeatedly performed till above step makes all to be plugged with copper pin in institute's hole.
13. the preparation method of the copper needle construction for stacked package according to claim 12, it is characterised in that: described adsorbent equipment is selected as vacuum absorption device.
14. the copper needle construction for stacked package, it is characterised in that including:
It is intended to the structure of preparation copper pillar bumps；
Copper needle construction, it is fixedly connected by welding on the described structure being intended to preparation copper pillar bumps, the position of each copper pin is corresponding with being intended to preparation copper pillar bumps position, plants and be fixedly welded on the described structure being intended to preparation copper pillar bumps after each copper pin molding of described copper needle construction.
15. the copper needle construction for stacked package according to claim 14, it is characterised in that: the length range of described copper pin is 50-200 μm, copper pin diameter range for 50-200 μm.
16. the copper needle construction for stacked package according to claim 14, it is characterised in that: each copper pin is welded and fixed by solder layer and Colophonium and is connected on the described structure being intended to preparation copper pillar bumps.
17. the copper needle construction for stacked package according to claim 14, it is characterised in that: described copper needle construction is for one or more combinations in the copper pillar bumps structure of chip, the copper pillar bumps structure of POP stack encapsulation structure and the interconnection structure of POP stack encapsulation structure.
18. the copper needle construction for stacked package according to claim 17, it is characterised in that: described chip includes the one in one chip and compound chip.
19. the copper needle construction for stacked package according to claim 14, it is characterised in that including:
First encapsulating structure and the second encapsulating structure, including:
Chip, described chip surface is formed with the first bronze medal needle construction, and is installed on the first re-wiring layer；
First re-wiring layer, described first re-wiring layer is formed the second bronze medal needle construction；
Capsulation material, is packaged on described chip and the first re-wiring layer, and exposes described second bronze medal needle construction；
Described first encapsulating structure and the second encapsulating structure realize interconnection by the 3rd bronze medal needle construction.
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| CN201610301929.7A CN105810592B (en) | 2016-05-09 | 2016-05-09 | A kind of copper needle construction and preparation method thereof for stacked package |
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| CN106783644A (en) * | 2017-01-13 | 2017-05-31 | 中芯长电半导体（江阴）有限公司 | A kind of two-sided fan-out-type wafer-level packaging method and encapsulating structure |
| CN107644845A (en) * | 2017-09-06 | 2018-01-30 | 中芯长电半导体（江阴）有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
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| CN105810592B (en) | 2019-05-07 |
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