CN105808490A - Computer USB data transmission accelerating processor - Google Patents
Computer USB data transmission accelerating processor Download PDFInfo
- Publication number
- CN105808490A CN105808490A CN201610114890.8A CN201610114890A CN105808490A CN 105808490 A CN105808490 A CN 105808490A CN 201610114890 A CN201610114890 A CN 201610114890A CN 105808490 A CN105808490 A CN 105808490A
- Authority
- CN
- China
- Prior art keywords
- amplifying circuit
- signal
- computer
- interface
- output interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
Abstract
The present invention discloses a computer USB data transmission accelerating processor. The processor comprises an input interface, a first amplification circuit, a second amplification circuit, and an output interface. A positive electrode of the input interface and a first signal input end are connected with a positive electrode of the output interface and a first signal output end through the first amplification circuit; a negative electrode of the input interface and a second signal input end are connected with a negative electrode of the output interface and a second signal output end through the second amplification circuit; and the output interface is connected with a USB signal input end of a computer. Compared with the prior art, in the present invention, an input signal is converted into a current via a first transistor and a second transistor, and an output signal is further amplified via a first field-effect transistor and a second field-effect transistor; and working principles of the two amplification circuits are the same, so that two signals are amplified, a transmission speed is improved, and the value of application can be ensured.
Description
Technical field
The present invention relates to a kind of computer interlock circuit, particularly relate to a kind of computer USB data transmission speed-raising processor.
Background technology
Computer is a kind of electronic computer device for supercomputing, it is possible to carry out numerical computations, can carry out again logical calculated, also have store-memory function.It is able to run according to program, automatically, the modernization intelligent electronic device of high speed processing mass data.It is made up of hardware system and software system, it does not have the computer installing any software is called bare machine.Can being divided into supercomputer, industrial control computer, network computer, personal computer, embedded computer five class, more advanced computer has biocomputer, photonic computer, quantum computer etc..But in prior art, the speed of the USB transmission data of computer is relatively slow, and reason is in that signal is more weak, accordingly, there exist room for improvement.
Summary of the invention
The purpose of the present invention is that provides a kind of computer USB data transmission speed-raising processor to solve the problems referred to above.
The present invention is achieved through the following technical solutions above-mentioned purpose:
The present invention includes input interface, the first amplifying circuit, the second amplifying circuit and output interface, the positive pole of described input interface and the first signal input part are connected each through described first amplifying circuit positive pole with described output interface and the first signal output part, the negative pole of described input interface and secondary signal input are connected each through described second amplifying circuit negative pole with described output interface and secondary signal outfan, and described output interface is connected with the usb signal input of computer.
Further, described first amplifying circuit is made up of to the 4th resistance, the first electric capacity, the first field effect transistor, the first audion and the second audion the first resistance, described second amplifying circuit is made up of to the 8th resistance, the second field effect transistor, the second electric capacity, the 3rd audion and the 4th audion the 5th resistance, and the circuit structure of described first amplifying circuit is identical with the circuit structure of described second amplifying circuit.
The beneficial effects of the present invention is:
The present invention is a kind of computer USB data transmission speed-raising processor, and compared with prior art, the present invention inputs signal and converts electric current to through the first audion and the second audion, then amplifies output signal further through the first field effect transistor and the second field effect transistor.The operation principle of two groups of amplifying circuits is all identical, thus amplifying two paths of signals, improving transmission speed, having the value of popularization and application.
Accompanying drawing explanation
Fig. 1 is the circuit structure schematic diagram of the present invention.
In figure: 1-input interface, 2-the first amplifying circuit, 3-the second amplifying circuit, 4-output interface.
Detailed description of the invention
Below in conjunction with accompanying drawing, the invention will be further described:
As shown in Figure 1: the present invention includes input interface the 1, first amplifying circuit the 2, second amplifying circuit 3 and output interface 4, the positive pole of described input interface 1 and the first signal input part are connected with positive pole and first signal output part of described output interface 4 each through described first amplifying circuit 2, the negative pole of described input interface 1 and secondary signal input are connected with negative pole and the secondary signal outfan of described output interface 4 each through described second amplifying circuit 3, and described output interface 4 is connected with the usb signal input of computer.
Further, described first amplifying circuit 2 is made up of the first resistance R1 to the 4th resistance R4, the first electric capacity C1, the first field effect transistor FET1, the first audion VT1 and the second audion VT2, described second amplifying circuit 3 is made up of the 5th resistance R5 to the 8th resistance R8, the second field effect transistor FET2, the second electric capacity C2, the 3rd audion VT3 and the four audion VT4, and the circuit structure of described first amplifying circuit 2 is identical with the circuit structure of described second amplifying circuit 3.
Input signal converts electric current to through the first audion VT1 and the second audion VT2, then amplifies output signal further through the first field effect transistor FET1 and the second field effect transistor FET2.The operation principle of two groups of amplifying circuits is all identical, thus amplifying two paths of signals, improves transmission speed.
The component parameter of the present invention selects as follows:
First resistance R1 is 100 Ω, the second resistance R2 be 400 Ω, the 3rd resistance R3 be 500 Ω, the 4th resistance R4 be 2k Ω, the 5th resistance R5 is 27k Ω, the 6th resistance R6 to the 8th resistance R8 is 200 Ω, the first audion VT1 to the 4th audion VT4 is PNP type triode, the first electric capacity C1 is 300uf, the second electric capacity C2 is 470uf, the first field effect transistor FET1 be the field effect transistor of model K1056, the second field effect transistor FET2 is the field effect transistor of model J160.
The ultimate principle of the present invention and principal character and advantages of the present invention have more than been shown and described.Skilled person will appreciate that of the industry; the present invention is not restricted to the described embodiments; described in above-described embodiment and description is that principles of the invention is described; without departing from the spirit and scope of the present invention; the present invention also has various changes and modifications, and these changes and improvements both fall within the claimed scope of the invention.Claimed scope is defined by appending claims and equivalent thereof.
Claims (2)
1. a computer USB data transmission speed-raising processor, it is characterized in that: include input interface, the first amplifying circuit, the second amplifying circuit and output interface, the positive pole of described input interface and the first signal input part are connected each through described first amplifying circuit positive pole with described output interface and the first signal output part, the negative pole of described input interface and secondary signal input are connected each through described second amplifying circuit negative pole with described output interface and secondary signal outfan, and described output interface is connected with the usb signal input of computer.
2. computer USB data transmission according to claim 1 speed-raising processor, it is characterized in that: described first amplifying circuit is made up of to the 4th resistance, the first electric capacity, the first field effect transistor, the first audion and the second audion the first resistance, described second amplifying circuit is made up of to the 8th resistance, the second field effect transistor, the second electric capacity, the 3rd audion and the 4th audion the 5th resistance, and the circuit structure of described first amplifying circuit is identical with the circuit structure of described second amplifying circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610114890.8A CN105808490A (en) | 2016-03-02 | 2016-03-02 | Computer USB data transmission accelerating processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610114890.8A CN105808490A (en) | 2016-03-02 | 2016-03-02 | Computer USB data transmission accelerating processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105808490A true CN105808490A (en) | 2016-07-27 |
Family
ID=56466009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610114890.8A Pending CN105808490A (en) | 2016-03-02 | 2016-03-02 | Computer USB data transmission accelerating processor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105808490A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103678234A (en) * | 2013-12-06 | 2014-03-26 | 福建鑫诺通讯技术有限公司 | Interface circuit compatible with USB interfaces of various types |
| CN204066103U (en) * | 2014-09-15 | 2014-12-31 | 李凌 | A kind of usb signal for computing machine amplifies transmission circuit |
| US20150067227A1 (en) * | 2013-08-27 | 2015-03-05 | Realtek Semiconductor Corp. | Signal adaptor, signal receiving circuit and associated methods |
| CN204347832U (en) * | 2014-12-12 | 2015-05-20 | 湖南机电职业技术学院 | A kind of computing machine usb communication interface data transmission amplifier |
-
2016
- 2016-03-02 CN CN201610114890.8A patent/CN105808490A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150067227A1 (en) * | 2013-08-27 | 2015-03-05 | Realtek Semiconductor Corp. | Signal adaptor, signal receiving circuit and associated methods |
| CN103678234A (en) * | 2013-12-06 | 2014-03-26 | 福建鑫诺通讯技术有限公司 | Interface circuit compatible with USB interfaces of various types |
| CN204066103U (en) * | 2014-09-15 | 2014-12-31 | 李凌 | A kind of usb signal for computing machine amplifies transmission circuit |
| CN204347832U (en) * | 2014-12-12 | 2015-05-20 | 湖南机电职业技术学院 | A kind of computing machine usb communication interface data transmission amplifier |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160727 |
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| RJ01 | Rejection of invention patent application after publication |