CN105808371A - Data backup and recovery method, control chip and storage device - Google Patents
Data backup and recovery method, control chip and storage device Download PDFInfo
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- CN105808371A CN105808371A CN201410844829.XA CN201410844829A CN105808371A CN 105808371 A CN105808371 A CN 105808371A CN 201410844829 A CN201410844829 A CN 201410844829A CN 105808371 A CN105808371 A CN 105808371A
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Abstract
The invention relates to a data backup and recovery method. The method comprises the following steps of: executing a data writing instruction, wherein the data writing instruction includes data to be written and a target block address; and a target block corresponding to the target block address works in a MLC mode or a TLC mode; writing the data to be written in one data page of the target block and one backup page of a backup block working in a SLC mode; repeating the above writing step, and judging whether the target block is fully written or not; performing ECC check of the target block when the target block is fully written; and, when the ECC check is failed, selecting an empty block working in the MLC mode or the TLC mode as a new target block, and recovering backup data in the backup block into the new target block. The embodiment of the invention further relates to a control chip and a storage device.
Description
Technical field
The present invention relates to flash memory technology, particularly relate to a kind of backup and recovery method, control chip and storage device.
Background technology
Flash memory (Flash) is a kind of nonvolatile semiconductor memory chip, has the advantage that volume is little, low in energy consumption, be susceptible to physical damage, is the desirable storage medium of mobile digital product.Flash memory is according to inside structure and realize technology AND, NAND, NOR and DiNOR etc. can be divided into several, at present with NAND for main flow.The flash memory write speed of NAND technology is fast, chip area is little, and particularly capacity is big, thus advantageous.Basic unit of storage in NAND technology is " page ", and one page is generally 512,2048,4096 or 8192 bytes, some pages of blockings, and block capacity is equal to page capacity and the product of number of pages in block.In the block of different flash memories, number of pages is not quite similar, and is generally 16 pages～128 pages.Nand flash memory easily produces bad block, after a block is wiped free of certain number of times, can become bad block, distinguishes if this is not added with Zhen, when data write this bad block, just can not correctly be stored.In order to ensure the safety of flash accessing-data, it is to avoid bad block access data, generally when design, with a controller management bad block, when to bad block access data, controller is transferred between predetermined free storage by data, and it is complete to guarantee data security not make to damage block.
Aborning and often there is bit reversal in some nand flash memories, causes corrupt data in use procedure.To the verification of data conventional have even-odd check, CRC check etc., and in NANDFlash processes, it is generally adopted error checking and corrects (ErrorCheckingandCorrection, ECC) error correction is carried out, but ECC error correction ability is still limited, the position if there is reversion is too many, still can not error correction come, cause corrupt data, affect the reliability of storage device data storage.
Summary of the invention
In view of the foregoing, it is necessary to provide a kind of and carry out the backup and recovery method of data recovery, control chip and storage device.
A kind of backup and recovery method, described method includes: performing data writing instructions, described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern；In the data page that described data to be written are written to described object block and the backed-up pages of backup block working in SLC pattern；Repeat above write step and judge whether described object block is fully written；When described object block is fully written, described object block is carried out ECC check；And when described ECC check failure, choose the empty block working in MLC pattern or TLC pattern as fresh target block, recover the Backup Data in described backup block in described fresh target block.
Preferably, when described ECC check failure, object block described in labelling is bad block.
Preferably, described method also includes: when described ECC check passes through, wipe the Backup Data in described backup block.
A kind of control chip, described control chip includes: instruction sending unit, is used for performing data writing instructions, and described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern；Writing unit, for being written to described data to be written in the backup block working in SLC pattern；Judging unit, is used for judging whether described object block is fully written；Verification unit, for carrying out ECC check to described object block；And recovery unit, for when described ECC check failure, choosing one and work in the empty block of MLC pattern or TLC pattern as fresh target block, recover the Backup Data in described backup block in described fresh target block.
Preferably, described control chip also includes: indexing unit, and for when described ECC check failure, object block described in labelling is bad block.
Preferably, described control chip also includes: erasing unit, for when described ECC check passes through, wiping the Backup Data in described backup block.
A kind of storage device, including described control chip.
A kind of backup and recovery method in storage device, described method includes: performing data writing instructions, described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern；Described data to be written are written in the backup block working in SLC pattern；And described data to be written are written in described object block.
Preferably, described method also includes: described object block is carried out ECC check；And when described ECC check failure, choose one and work in the empty block of MLC pattern or TLC pattern as fresh target block, the Backup Data in described backup block is write in described fresh target block.
Preferably, described method also includes: described object block is carried out ECC check；And when described ECC check passes through, wipe the Backup Data in described backup block.
Compared with prior art, the flash cell working in MLC pattern or TLC pattern is carried out being simultaneously written in the flash cell working in SLC pattern of data write and is backed-up by embodiment of the present invention, solve the flash cell write data mistake working in MLC pattern or TLC pattern and the problem that cannot recover, effectively promote the reliability of storage device data storage.
Accompanying drawing explanation
Fig. 1 is a storage device and the module map of electronic installation that connects in first embodiment of the invention.
Fig. 2 is the flow chart of a backup and recovery method in first embodiment of the invention.
Fig. 3 is the flow chart of a backup and recovery method in second embodiment of the invention.
Fig. 4 is the schematic diagram of a backup and recovery process in second embodiment of the invention.
Fig. 5 is the module map of a storage device in second embodiment of the invention.
Main element symbol description
| Electronic installation | 1 |
| Processor | 11 |
| Random access memory | 13 |
| Input/output interface | 15 |
| Storage device | 2 |
| Instruction sending unit | 51 |
| Writing unit | 52 |
| Judging unit | 53 |
| Verification unit | 54 |
| Indexing unit | 55 |
| Recovery unit | 56 |
| Erasing unit | 57 |
| Control chip | 21 |
| Flash cell | 22 |
| Backup and recovery module | 211 |
Following detailed description of the invention will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Detailed description of the invention
As it is shown in figure 1, a storage device 2 can connect with an electronic installation 1.Described electronic installation 1 includes processor 11, random access memory 13 and input/output interface 15.
Described storage device 2 is a nand flash memory.Nand flash memory generally comprises single layer cell (singlelevelcell, SLC) flash memory, multilevel-cell (multilevelcell, MLC) flash memory, and three-layer unit (triplelevelcell, TLC) flash memory.One mnemon of single layer cell flash memory can store a data bit, and therefore the numerical value stored by the mnemon of single layer cell flash memory has two kinds, and respectively 0 and 1.One mnemon of multi-layered unit flash memory can store two data bit, and therefore the data stored by the mnemon of multi-layered unit flash memory have four kinds, respectively data combination 00,01,10 and 11.One mnemon of three-layer unit flash memory can store three data bit, and therefore the data stored by the mnemon of three-layer unit flash memory have eight kinds, respectively data combination 000,001,010,011,100,101,110 and 111.The probability of the block generation bit reversal that the block working in SLC pattern works in MLC or TLC pattern relatively is less, and it is relatively more stable reliably to be stored in data above, and meanwhile, erasable number of times is more, and namely longer service life is of a specified duration.Described storage device 2 is provided with multiple physical block, and each physical block is operable with SLC pattern, MLC pattern or TLC pattern.Described physical block includes the backup block for backup and recovery and the object block used for data, and described backup block works in SLC pattern, and described object block is operable with MLC pattern or TLC pattern.
Described electronic installation 1 is connected with described storage device 2 by described input/output interface 15.User sends write command to described processor 11, and described write command is sent to described storage device 2 by described input/output interface 15 by described processor 11, comprises the data to be written in described random access memory 13 in described write command.
Described storage device 2 is after receiving described write command, for improving stability and the correctness of storage device 2 data, described data to be written are written in the object block working in MLC pattern or TLC pattern, described data to be written are written in the backup block working in SLC pattern simultaneously.
In the present embodiment, described electronic installation can be the systems such as computer, digital camera, mobile phone, multimedia player.
Fig. 2 is the flow chart being realized a kind of backup and recovery method in first embodiment of the invention by described storage device 2, said method comprising the steps of:
Step 201: receive the write command that electronic installation sends, performs data writing instructions, and described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern.
Step 202: described data to be written are written in a backed-up pages of the backup block working in SLC pattern.
Step 203: described data to be written are written in a data page of described object block.
In step 202 and step 203, data are by writing page by page, when writing data to a data page of object block, also data can be write a on the backed-up pages of backup block working in SLC pattern simultaneously, namely step 202 and step 203 can be passed through often to write the data of page of data or predetermined number of pages and carry out step alternately, and the page address on write backup block can be corresponding with page address in object block.Step 202 and each writable all or part of data to be written of step 203.Step 202 and step 203 can carry out simultaneously, and sequencing can be exchanged.The data of write object block write after can writing direct or reading from described backup block.
Present embodiment is backed-up by SLC pattern, the data write operation that simple MLC pattern or TLC pattern are stored improves, the data making MLC pattern or the storage of TLC pattern are not easy to make mistakes in write operation process, and stability is higher, effectively promote the reliability of storage device data storage.
Fig. 3 is the flow chart of backup and recovery method in second embodiment of the invention kind one storage device, said method comprising the steps of:
Step 401: receive the write command that electronic installation sends, performs data writing instructions, and described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern.
Step 402: described data to be written are written in a data page of described object block and work in backup block one backed-up pages of SLC pattern.
Step 403: judge whether described object block is fully written, if judged result is "Yes", then performs step 404, if judged result is "No", then returns to step 402.
Present embodiment step 402 is in step 403 execution process, and data are by writing page by page, when writing data to a data page of object block, also can data be write a on the backed-up pages of backup block working in SLC pattern simultaneously.Owing to described size of data to be written is uncertain, each writable all or part of data to be written are in object block and backup block.In the ban during write object block, the backed-up pages address on write backup block can be corresponding with data page address in object block.The data of write object block write after can writing direct or reading from described backup block.
Step 404: described object block is carried out ECC check, specifically include: when the ECC code that system generates differs with the ECC code comparative result reading data, detect reading the size of wrong data in data, when the byte number of described wrong data is equal to or less than the threshold value preset (such as: 1 bit), by ECC code, described wrong data is corrected, when described wrong data is corrected unsuccessful, then the object block storing described data is verified.
Step 405: judge that whether ECC check is failed, specifically, it is judged that in described object block, whether the byte number of wrong data exceedes ECC threshold, if judged result is "Yes", then performs step 406, if judged result is "No", then performs step 409.
Step 406: markers step 404 does not pass through the object block of ECC check be bad block not in use by.
Step 407: choosing one and work in the empty block of MLC pattern or TLC pattern as fresh target block, described empty block is the block not having write data.
Step 408: recover the Backup Data in described backup block to described fresh target block, and return execution step 404.
Step 409: wipe Backup Data described in described backup block, using described backup block as empty block registration, uses in order to next time.
Please continue to refer to Fig. 4, storage device generally comprises multiple memory block (block), and each memory block comprises multiple page (page), and each page comprises multiple byte (byte).In present embodiment, described object block and described backup block can take one or more pieces, the one or more memory blocks except described object block that backup block can be selected.In present embodiment, object block B101 works in MLC pattern and includes some pages of P101-P104, backup block B102 and work in SLC pattern and include some pages of P201-P204, and empty block B103 is that MLC pattern includes some pages of P301-P304.In step 402, data are respectively written in the page P201-P204 in described backup block B102 and in the page P101-P104 of object block B101.When the ECC check failure of B101, choose sky block B103 and the Backup Data in backup block B102 write in described empty block B103.
In present embodiment, depositor etc. can be passed through and record the byte number of wrong data in described object block data, when completing ECC decoding in object block, it is possible to directly obtain the erroneous words joint number of described object block from described depositor.Wherein, described ECC threshold is the maximum number of byte that ECC code can detect and correct.The data of every part of storage all comprise an ECC code, and in order to detect whether output data exist mistake, system is when digital independent, first generate correct ECC code, and the ECC code of described ECC code Yu the data of reading is compared checking, if comparative result is identical, then illustrate that the data read are correct.If comparative result differs, then illustrate that the data read exist mistake.
When re-executing described step 404, recover the Backup Data in described backup block to described fresh target block, described fresh target block is carried out ECC check；And when ECC check failure again, re-start the selection of sky block, and re-write Backup Data.Re-execute step 404 and arrive step 405, it can be ensured that can be correctly stored in new object block by Backup Data.
Fig. 5 is the module map of a storage device in second embodiment of the invention, for the ease of illustrating, illustrate only the part relevant to present embodiment.
As shown in Figure 5, described storage device 2 comprises control chip 21, being integrated with a backup and recovery module 211 and flash cell 22 on described control chip 21, described flash cell 22 is provided with multiple physical block, and each physical block is operable with SLC pattern, MLC pattern or TLC pattern.Described physical block includes the backup block for backup and recovery and the object block used for data, and described backup block works in SLC pattern, and described object block is operable with MLC pattern or TLC pattern.
In described storage device, backup and recovery module 211 can apply in storage device, the unit that the software unit in storage device, hardware cell or software and hardware combine can be operate in, it is also possible to be integrated in storage device as independent suspension member or run in the application system of storage device.
Described backup and recovery module 211 includes with lower unit:
Instruction sending unit 51, for receiving the write command that electronic installation sends, performs data writing instructions, and described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern.
Writing unit 52, for being written to described data to be written in a data page of described object block and work in backup block one backed-up pages of SLC pattern.
Judging unit 53, is used for judging whether described object block is fully written.
Verification unit 54, for carrying out ECC check to described object block.
Indexing unit 55, for when ECC check failure, object block described in labelling is bad block.Specifically, when in described object block, the byte number of wrong data exceedes ECC threshold, object block described in labelling is bad block.
Recovery unit 56, for when ECC check failure, recovers Backup Data in described backup block to fresh target block.Specifically, when the byte number of wrong data exceedes ECC threshold in the data in described object block, choose one and work in the empty block of MLC pattern or TLC pattern as fresh target block, recover Backup Data in described backup block to described fresh target block.
Erasing unit 57, for when ECC check passes through, wiping the Backup Data in described backup block.Specifically, when the byte number of wrong data is not less than ECC threshold in described object block, wipe the Backup Data in described backup block.
Those skilled in the art is it can be understood that arrive, for convenience and simplicity of description, only it is illustrated with the division of above-mentioned each functional unit, module, in practical application, as desired above-mentioned functions distribution can be completed by different functional units or module, it is divided into different functional units or module, to complete all or part of function described above by the internal structure of device.Each functional unit in embodiment, module can be integrated in a processing unit, can also be that unit is individually physically present, can also two or more unit integrated in a unit, above-mentioned integrated unit both can adopt the form of hardware to realize, it would however also be possible to employ the form of SFU software functional unit realizes.It addition, the concrete title of each functional unit, module is also only to facilitate mutually distinguish, it is not limited to the protection domain of the application.The specific works process of unit, module in said apparatus, it is possible to reference to the corresponding process in preceding method embodiment, do not repeat them here.
In the present embodiment, described control chip 21 receives write command by backup and recovery module 211 in described storage device 2, and the data to be written in described write command are written in the backup block working in SLC pattern in flash cell 22, described data to be written are written in the object block working in MLC pattern or TLC pattern in flash cell 22.In described storage device, the specific implementation process of backup and recovery module 211 is not as it has been described above, repeat them here.
It will be understood by those skilled in the art that the composition structure shown in Fig. 5 is not intended that the restriction to storage device 2, it is possible to include ratio and illustrate more or less of parts, or combine some parts, or different parts are arranged.
Those of ordinary skill in the art it is also understood that, realize all or part of step in above-mentioned embodiment method to can be by the hardware that program carrys out instruction relevant and complete, described program can in being stored in a computer read/write memory medium, described storage medium, including ROM/RAM, disk, CD etc..
Above content is in conjunction with concrete preferred implementation further description made for the present invention, it is impossible to assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention; make some equivalent replacements or obvious modification without departing from the inventive concept of the premise; and performance or purposes are identical, the scope of patent protection that the present invention is determined all should be considered as belonging to by submitted claims.
Claims (10)
1. a backup and recovery method, it is characterised in that: described method includes:
Performing data writing instructions, described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern；
In the data page that described data to be written are written to described object block and the backed-up pages of backup block working in SLC pattern；
Repeat above write step and judge whether described object block is fully written；
When described object block is fully written, described object block is carried out ECC check；And
When described ECC check failure, choose the empty block working in MLC pattern or TLC pattern as fresh target block, recover the Backup Data in described backup block in described fresh target block.
2. the method for claim 1, it is characterised in that: when described ECC check failure, object block described in labelling is bad block.
3. the method for claim 1, it is characterised in that: described method also includes:
When described ECC check passes through, wipe the Backup Data in described backup block.
4. a control chip, it is characterised in that: described control chip includes:
Instruction sending unit, is used for performing data writing instructions, and described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern；
Writing unit, for being written to described data to be written in the backup block working in SLC pattern；
Judging unit, is used for judging whether described object block is fully written；
Verification unit, for carrying out ECC check to described object block；And
Recovery unit, for when described ECC check failure, choosing one and work in the empty block of MLC pattern or TLC pattern as fresh target block, recover the Backup Data in described backup block in described fresh target block.
5. control chip as claimed in claim 4, it is characterised in that: described control chip also includes:
Indexing unit, for when described ECC check failure, object block described in labelling is bad block.
6. control chip as claimed in claim 4, it is characterised in that: described control chip also includes:
Erasing unit, for when described ECC check passes through, wiping the Backup Data in described backup block.
7. a storage device, it is characterised in that: described storage device includes the control chip described in any one of claim 4 to 6.
8. backup and recovery method in a storage device, it is characterised in that: described method includes:
Performing data writing instructions, described data writing instructions includes data to be written and object block address, and object block corresponding to described object block address works in MLC pattern or TLC pattern；
Described data to be written are written in the backup block working in SLC pattern；And
Described data to be written are written in described object block.
9. method as claimed in claim 8, it is characterised in that: described method also includes:
Described object block is carried out ECC check；And
When described ECC check failure, choose one and work in the empty block of MLC pattern or TLC pattern as fresh target block, the Backup Data in described backup block is write in described fresh target block.
10. method as claimed in claim 8, it is characterised in that: described method also includes:
Described object block is carried out ECC check；And
When described ECC check passes through, wipe the Backup Data in described backup block.
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106648968A (en) * | 2016-10-19 | 2017-05-10 | 盛科网络（苏州）有限公司 | Data recovery method and device when ECC correction failure occurs on chip |
| CN108038064A (en) * | 2017-12-20 | 2018-05-15 | 北京兆易创新科技股份有限公司 | A kind of processing method and processing device of PairBlock erasings error |
| CN108052410A (en) * | 2017-12-20 | 2018-05-18 | 北京兆易创新科技股份有限公司 | A kind of method and device for preventing SPI-Nand from reading data page error |
| CN108549588A (en) * | 2018-03-27 | 2018-09-18 | 深圳忆联信息系统有限公司 | A method of eliminating TLC flash memory multi-disc program fails |
| CN109032532A (en) * | 2018-08-28 | 2018-12-18 | 深圳忆联信息系统有限公司 | Flash memory storage management method and flash memory device |
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| CN110471863A (en) * | 2019-08-13 | 2019-11-19 | 深圳忆联信息系统有限公司 | Data write-read method, device and computer equipment based on solid state hard disk |
| CN111881211A (en) * | 2020-07-24 | 2020-11-03 | 北京浪潮数据技术有限公司 | Method, system and equipment for synchronizing storage data and computer storage medium |
| CN111897489A (en) * | 2020-06-28 | 2020-11-06 | 深圳佰维存储科技股份有限公司 | Data writing method, device, equipment and computer readable storage medium |
| CN113448765A (en) * | 2020-03-26 | 2021-09-28 | 西部数据技术公司 | Non-volatile memory array with write failure protection for storage elements |
| CN116543822A (en) * | 2023-05-15 | 2023-08-04 | 深圳市领德创科技有限公司 | Flash memory test and processing method and system applied to solid state disk |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101656104A (en) * | 2008-08-22 | 2010-02-24 | 群联电子股份有限公司 | Flash memory storage system and data writing method thereof |
| CN102591748A (en) * | 2011-12-29 | 2012-07-18 | 记忆科技(深圳)有限公司 | Solid state disc and power failure protection method and system thereof |
| CN102591807A (en) * | 2011-12-30 | 2012-07-18 | 记忆科技(深圳)有限公司 | Processing method for power down and abnormal writing of solid state disc and system |
| CN103116550A (en) * | 2013-01-11 | 2013-05-22 | 深圳市硅格半导体有限公司 | Method and device for switching physical block work mode in flash memory |
| US9348741B1 (en) * | 2011-12-19 | 2016-05-24 | Western Digital Technologies, Inc. | Systems and methods for handling write data access requests in data storage devices |
-
2014
- 2014-12-31 CN CN201410844829.XA patent/CN105808371A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101656104A (en) * | 2008-08-22 | 2010-02-24 | 群联电子股份有限公司 | Flash memory storage system and data writing method thereof |
| US9348741B1 (en) * | 2011-12-19 | 2016-05-24 | Western Digital Technologies, Inc. | Systems and methods for handling write data access requests in data storage devices |
| CN102591748A (en) * | 2011-12-29 | 2012-07-18 | 记忆科技(深圳)有限公司 | Solid state disc and power failure protection method and system thereof |
| CN102591807A (en) * | 2011-12-30 | 2012-07-18 | 记忆科技(深圳)有限公司 | Processing method for power down and abnormal writing of solid state disc and system |
| CN103116550A (en) * | 2013-01-11 | 2013-05-22 | 深圳市硅格半导体有限公司 | Method and device for switching physical block work mode in flash memory |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106648968A (en) * | 2016-10-19 | 2017-05-10 | 盛科网络（苏州）有限公司 | Data recovery method and device when ECC correction failure occurs on chip |
| CN108038064A (en) * | 2017-12-20 | 2018-05-15 | 北京兆易创新科技股份有限公司 | A kind of processing method and processing device of PairBlock erasings error |
| CN108052410A (en) * | 2017-12-20 | 2018-05-18 | 北京兆易创新科技股份有限公司 | A kind of method and device for preventing SPI-Nand from reading data page error |
| CN108052410B (en) * | 2017-12-20 | 2021-04-13 | 北京兆易创新科技股份有限公司 | Method and device for preventing errors of SPI-Nand read data page |
| CN108549588A (en) * | 2018-03-27 | 2018-09-18 | 深圳忆联信息系统有限公司 | A method of eliminating TLC flash memory multi-disc program fails |
| CN109032532B (en) * | 2018-08-28 | 2021-07-13 | 深圳忆联信息系统有限公司 | Flash memory storage management method and flash memory device |
| CN109032532A (en) * | 2018-08-28 | 2018-12-18 | 深圳忆联信息系统有限公司 | Flash memory storage management method and flash memory device |
| CN109545265A (en) * | 2018-11-13 | 2019-03-29 | 深圳忆联信息系统有限公司 | A kind of solid-state hard disc equipment finds weak piece of method and its system in real time |
| CN110471863A (en) * | 2019-08-13 | 2019-11-19 | 深圳忆联信息系统有限公司 | Data write-read method, device and computer equipment based on solid state hard disk |
| CN113448765A (en) * | 2020-03-26 | 2021-09-28 | 西部数据技术公司 | Non-volatile memory array with write failure protection for storage elements |
| CN111897489A (en) * | 2020-06-28 | 2020-11-06 | 深圳佰维存储科技股份有限公司 | Data writing method, device, equipment and computer readable storage medium |
| CN111897489B (en) * | 2020-06-28 | 2023-06-13 | 深圳佰维存储科技股份有限公司 | Data writing method, device, equipment and computer readable storage medium |
| CN111881211A (en) * | 2020-07-24 | 2020-11-03 | 北京浪潮数据技术有限公司 | Method, system and equipment for synchronizing storage data and computer storage medium |
| CN111881211B (en) * | 2020-07-24 | 2022-06-10 | 北京浪潮数据技术有限公司 | Method, system and equipment for synchronizing storage data and computer storage medium |
| CN116543822A (en) * | 2023-05-15 | 2023-08-04 | 深圳市领德创科技有限公司 | Flash memory test and processing method and system applied to solid state disk |
| CN116543822B (en) * | 2023-05-15 | 2024-04-05 | 深圳市领德创科技有限公司 | Flash memory test and processing method and system applied to solid state disk |
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Application publication date: 20160727 |