CN105788648B

CN105788648B - NVM bad block identification processing and error correction method and system based on heterogeneous hybrid memory

Info

Publication number: CN105788648B
Application number: CN201410827741.7A
Authority: CN
Inventors: 薛英仪; 马先明; 庞观士; 陈志列; 王志远; 沈航; 梁艳妮; 徐成泽
Original assignee: EVOC Intelligent Technology Co Ltd
Current assignee: Shenzhen Yanxiang Smart Technology Co ltd
Priority date: 2014-12-25
Filing date: 2014-12-25
Publication date: 2020-09-18
Anticipated expiration: 2034-12-25
Also published as: CN105788648A

Abstract

The invention provides a heterogeneous hybrid memory-based NVM bad block identification processing and error correction method, which comprises the following steps: in the self-test process, the following is performed: detecting data in each address unit in a block of the NVM, if the data in any address unit in the block is different from the data obtained by reading the data obtained by writing the data obtained by operation into the address unit again, determining that the decision block is a bad block; and if the data obtained by the operation on the read data is the same as the data obtained by reading again after writing the data obtained by the operation into the address unit in all the address units in the block, the decision block is a good block. The read data are written into the same address after operation, bad blocks in the NVM can be identified, the probability of misjudgment is reduced, and the reliability and the integrity of the data in the NVM are ensured. In addition, the NVM bad block identification processing and error correction system based on the heterogeneous hybrid memory is also provided.

Description

NVM bad block identification processing and error correction method and system based on heterogeneous hybrid memory

Technical Field

The invention relates to the technical field of computers, in particular to a method and a system for identifying, processing and correcting an NVM bad block based on a heterogeneous hybrid memory.

Background

With the development of Non-Volatile random access Memory (NVM) technology represented by resistive Memory, ferroelectric Memory, phase change Memory, etc., the development of storage technology is promoted, and a good foundation is laid for the generation of a novel Memory and storage architecture. By combining a novel NVM and a Dynamic Random Access Memory (DRAM), a hybrid Memory architecture is built to form a heterogeneous hybrid Memory. The heterogeneous hybrid memory has the characteristics of both NVM and DRAM, not only has the function of a conventional memory, but also is volatile, and data stored in the DRAM can disappear immediately after power failure; meanwhile, the advantage that the NVM can store data after power failure can be exerted, the nonvolatile characteristic of the NVM is fully exerted, and the memory is a novel memory which is used in a mixed mode.

The heterogeneous hybrid memory meets the conventional memory interface of the existing industrial control equipment, and a new industrial control equipment does not need to be introduced or a new auxiliary equipment does not need to be added, so that the heterogeneous hybrid memory becomes a research hotspot.

The characteristics of NVM in the heterogeneous hybrid memory are different from those of DRAM, the NVM has the inherent defect of limited total erasing times, the NVM fails after reaching a certain erasing times, the damage of an NVM storage area is permanent, the NVM is limited to the current manufacturing process and the service life, the NVM inevitably has bad blocks, and the conventional DRAM memory data processing method does not relate to the NVM bad blocks and is not suitable for the NVM memory in the heterogeneous hybrid memory.

Disclosure of Invention

Therefore, it is necessary to provide a method and a system for identifying and correcting a bad block in an NVM based on a heterogeneous hybrid memory, which can identify a bad block in the NVM, perform processing and data correction, and ensure the reliability and integrity of data in the NVM.

A NVM bad block identification processing and error correction method based on heterogeneous hybrid memory comprises the following steps:

in the self-test process, the following is performed:

detecting data in each address location in a block of the NVM;

if the data obtained by the operation of the read data in any address unit in the block is different from the data obtained by the re-reading after the data obtained by the operation is written into the address unit, judging the block to be a bad block;

and if the data obtained by the operation on the read data is the same as the data obtained by the re-reading after the data obtained by the operation is written into the address unit in all the address units in the block, judging the block to be a good block.

In one embodiment, the step of detecting data in each address location in a block of the NVM includes:

taking the starting address unit of the block of the NVM as a current address unit, executing:

reading the data of the current address unit to obtain first read data, and performing operation on the first read data to obtain first operation data;

writing the first operational data into the current address unit, and reading the first operational data to obtain second read data;

judging whether the second read data is the same as the first operation data or not, and if not, judging the block to be a bad block; if the current address unit is the ending address unit of the block of the NVM, further judging whether the current address unit is the ending address unit of the block of the NVM, if so, the block is a good block, otherwise, taking the next address unit as the current address unit, and returning to the step of reading the data of the current address unit.

In one embodiment, the NVM includes a data storage area and a spare block area; the spare block area stores a state table for recording the block state of the NVM and a mapping table for recording the replacement relationship between the bad block and the good block; the method further comprises the following steps:

if the block is a good block, marking the position corresponding to the block in the state table and the mapping table as a good block;

if the block is a bad block, marking the position corresponding to the block in a state table as a bad block;

if the bad block is a data storage area or a spare block area is used as a block of a replacement block, acquiring a good block of the spare block area, using the good block of the spare block area as the replacement block of the bad block, storing the position information of the good block at a position corresponding to the bad block in a mapping table, and storing the position information of the bad block at a position corresponding to the good block in the mapping table; if the bad block is a block of which the spare block area is used as a replacement block, the position corresponding to the bad block in the mapping table is marked as unavailable as the replacement block.

And if the bad block is a block which is not used as a replacement block in the spare block area, marking the position corresponding to the bad block in the mapping table as a non-usable replacement block.

In one embodiment, after the determining whether the second read data is the same as the first operation data, if the second read data is different from the first operation data, the method further includes:

writing the first operation data into the current address unit again, and reading the first operation data again to obtain third read data;

and judging whether the third read data is the same as the first operation data, if so, judging the block to be a bad block, and if so, further judging whether the current address unit is an ending address unit of the block of the NVM.

In one embodiment, the determining whether the second read data is the same as the first operation data further includes, if the second read data is the same as the first operation data, the method further includes: the second read data is stored into the current address unit after being subjected to inverse operation;

after the step of judging whether the third read data is the same as the first operational data, the method further comprises the following steps: and performing inverse operation on the third read data and storing the third read data into the current address unit.

In one embodiment, the operation and the inverse operation are both inverting data.

In one embodiment, the spare block further stores a page erase/write frequency record table, where the page erase/write frequency record table stores a page sequence number and corresponding erase/write frequency, and the method further includes:

acquiring the page erasing frequency recording table;

and judging whether a page exceeding the maximum erasing times exists in the NVM blocks according to the page erasing times recording table, if so, judging the blocks to be bad blocks, and otherwise, judging the blocks to be good blocks.

In one embodiment, the method further comprises:

s1: acquiring a data writing request;

s2: writing data into an NVM, and performing ECC (error correction code) check on the data to generate a write check sum;

s3: reading the data from the data writing position, and performing ECC (error correction code) check on the read data to generate a read check sum;

s4: performing exclusive-or operation on the write checksum and the read checksum to obtain an operation result;

s5: if the operation result is 0, the data is correct, otherwise, the data is correct

And repeating the steps S2-S4 for a preset number of times, judging that the data is in error when the operation results obtained in the steps S2-S4 are not 0 each time, and correcting the data according to the operation results.

In one embodiment, the step of performing ECC check on the data to generate a write checksum and performing ECC check on the read data to generate a read checksum and performing ECC check on the data includes:

judging whether the data needing ECC check meets preset bytes or not;

if the data is not satisfied, splitting and padding the data to generate data of preset bytes;

performing row check and column check on the data of the preset bytes to obtain a row check value and a column check value;

and sequentially storing the row check value and the column check value and supplementing the row check value and the column check value to generate a check sum of preset bytes.

In one embodiment, the step of performing data error correction according to the operation result includes:

judging whether the bit of the operation result has 1 with preset number, if so, judging that the data can be corrected, otherwise, judging that the data can not be corrected;

if the data can be corrected, determining an error row address and an error column address according to the operation result;

and acquiring error data according to the row address and the column address, and performing negation operation on the error data to obtain correct data.

A NVM bad block identification processing and error correction system based on heterogeneous hybrid memory, the system comprising:

the detection module is used for detecting data in each address unit in the NVM block in the self-checking process;

the judging module is used for judging the block to be a bad block if the data obtained by the operation of the read data in any address unit in the block is different from the data obtained by the re-reading after the data obtained by the operation is written into the address unit;

the judging module is further configured to judge that the block is a good block if data obtained by operating the read data is the same as data obtained by reading again after writing the operated data into the address unit, for the data in all address units in the block.

In one embodiment, the detection module comprises:

the first data acquisition unit is used for taking an initial address unit of a NVM (non-volatile memory) block as a current address unit, reading data of the current address unit to obtain first read data, and performing operation on the first read data to obtain first operation data;

the second data acquisition unit is used for writing the first operational data into the current address unit and reading the first operational data to obtain second read data;

the processing unit is used for judging whether the second read data is the same as the first operation data or not, and if the second read data is different from the first operation data, the block is a bad block; if the current address unit is the ending address unit of the block of the NVM, further judging whether the current address unit is the ending address unit of the block of the NVM, if so, the block is a good block, otherwise, taking the next address unit as the current address unit, and returning to the first data acquisition module to enter the step of reading the data of the current address unit.

In one embodiment, the NVM includes a data storage area and a spare block area, where the spare block area stores a state table for recording a block state of the NVM and a mapping table for recording a replacement relationship between a bad block and a good block, and the system further includes:

the block processing module is used for marking the position corresponding to the block in the state table and the mapping table as a good block if the block is the good block;

the block processing module is further configured to mark a position corresponding to the block in a state table as a bad block if the block is a bad block;

the block processing module is further configured to, if the bad block is a data storage area or a block in which a spare block area is used as a replacement block, acquire a good block in the spare block area, use the good block in the spare block area as the replacement block of the bad block, store location information of the good block at a location in a mapping table corresponding to the bad block, store location information of the bad block at a location in the mapping table corresponding to the good block, and if the bad block is a block in which the spare block area is used as the replacement block, further need to mark a location in the mapping table corresponding to the bad block as a non-usable replacement block;

the block processing module is further configured to mark a position corresponding to the bad block in a mapping table as a non-usable replacement block if the bad block is a block in which the spare block area is not used as a replacement block.

In one embodiment, the processing unit is further configured to write the first operation data into the current address unit again, read the first operation data again to obtain third read data, determine whether the third read data is the same as the first operation data, if the third read data is different from the first operation data, the block is a bad block, and if the third read data is the same as the first operation data, the step of further determining whether the current address unit is an ending address unit of the block of the NVM is performed.

In one embodiment, the processing unit is further configured to determine whether a second read data is identical to the first operation data, and if so, store the second read data in the current address unit after performing a reverse operation on the second read data; and the address unit is also used for judging whether third read data is the same as the first operation data or not, and storing the third read data into the current address unit after performing inverse operation on the third read data if the third read data is the same as the first operation data.

In one embodiment, the spare block further stores a page erase/write frequency record table, where the page erase/write frequency record table stores a page sequence number and corresponding erase/write frequency, and the system further includes:

and the record table judging module is used for acquiring the page erasing times record table, judging whether a page exceeding the maximum erasing times exists in the NVM blocks according to the page erasing times record table, if so, judging the blocks to be bad blocks, and otherwise, judging the blocks to be good blocks.

In one embodiment, the system further comprises:

an error correction module to perform:

s1: acquiring a data writing request;

s2: the data are sent to an NVM, and ECC (error correction code) check is carried out on the data to generate a write-in check sum;

s5: and if the operation result is 0, the data is correct, otherwise, the data is repeatedly executed for a preset number of times S2-S4, and when the operation results obtained after the execution of S2-S4 are not 0 each time, the data is judged to be in error, and the data is corrected according to the operation results.

In one embodiment, the ECC checking of the data by the error correction module specifically includes determining whether data to be ECC checked satisfies a preset byte, splitting and padding the data to generate data of the preset byte if the data does not satisfy the preset byte, performing row check and column check on the data of the preset byte to obtain a row check value and a column check value, and sequentially storing and padding the row check value and the column check value to generate a checksum of the preset byte.

In one embodiment, the error correction module is further configured to determine whether a preset number of 1's exist in bits of the operation result, determine that the data is error-correctable if the number of 1's exists, determine that the data is not error-correctable if the number of 1's exists, determine a row address and a column address where an error occurs according to the operation result if the data is error-correctable, obtain error data according to the row address and the column address, and perform a negation operation on the error data to obtain correct data.

According to the NVM bad block identification processing and error correction method and system based on the heterogeneous hybrid memory, data in each address unit in a NVM block is detected in the self-checking process, and if the data in any address unit in the block is obtained by operating the read data and the data obtained by writing the operated data into the address unit and then reading again are different, the block is judged to be a bad block; and if the data obtained by the operation on the read data is the same as the data obtained by the re-reading after the data obtained by the operation is written into the address unit in all the address units in the block, judging the block to be a good block. The read data is written into the same address after operation, the read data is not directly written into the same address, the read data is compared with the result obtained after the operation is carried out on the data read for the first time, whether the block is a bad block or not is judged according to the comparison result, the bad block in the NVM can be identified, the probability of misjudgment is reduced, and the reliability and the integrity of the data in the NVM are ensured.

Drawings

FIG. 1 is a flowchart of an embodiment of a method for identifying bad blocks of an NVM based on a heterogeneous hybrid memory;

FIG. 2 is a flowchart of NVM bad block processing based on heterogeneous hybrid memory in one embodiment;

FIG. 3 is a diagram of an NVM memory, a state table, and a mapping table, in accordance with an embodiment;

FIG. 4 is a diagram of an updated state table and mapping table in one embodiment;

FIG. 5 is a flowchart of a method for identifying bad blocks of an NVM based on a heterogeneous hybrid memory according to another embodiment;

FIG. 6 is a flow diagram that illustrates ECC checking of data to generate a checksum in one embodiment;

FIG. 7 is a flow chart illustrating error correction of data according to the result of an operation according to an embodiment;

FIG. 8 is a block diagram of a heterogeneous hybrid memory based NVM bad block identification system in one embodiment;

FIG. 9 is a block diagram of the structure of a detection module in one embodiment;

FIG. 10 is a block diagram of a heterogeneous hybrid memory based NVM bad block identification processing system in another embodiment;

FIG. 11 is a block diagram of a heterogeneous hybrid memory based NVM bad block identification processing system in one embodiment;

FIG. 12 is a block diagram of an embodiment of a heterogeneous hybrid memory based NVM bad block identification and error correction system.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

In one embodiment, a method for identifying, processing and correcting a bad block of an NVM based on a heterogeneous hybrid memory is provided, which includes:

in the self-test process, the following is performed: detecting data in each address location in a block of the NVM; if the data obtained by the operation of the read data in any address unit in the block is different from the data obtained by the re-reading after the data obtained by the operation is written into the address unit, judging the block to be a bad block; and if the data obtained by the operation on the read data is the same as the data obtained by the re-reading after the data obtained by the operation is written into the address unit in all the address units in the block, judging the block to be a good block.

In this embodiment, the self-checking of the NVM block is performed before the NVM is first powered on and used, or the user issues a special command to perform the self-checking, where the application layer issues a special command to the NVM memory buffer controller to perform the self-checking. During self-test, data in each address unit in a NVM block is detected, the address unit refers to a memory space in the NVM block, the NVM block is composed of a plurality of address units, self-test is performed by taking the address unit as a unit, the size of the address unit can be self-defined, and 1 byte is preferably used as one address unit. The operation rule can be customized, such as addition, subtraction, multiplication, division, inversion and the like.

In this embodiment, in the self-checking process, data in each address unit in a block of the NVM is detected, and if data in any address unit in the block obtained by calculating the read data is different from data obtained by writing the calculated data into an address unit and then reading the data again, the block is determined to be a bad block; and if the data obtained by the operation on the read data is the same as the data obtained by the re-reading after the data obtained by the operation is written into the address unit in all the address units in the block, judging the block to be a good block.

For a certain bad block, data can be correctly read, and data cannot be written, the data read for the first time is correct data and is the same as original data stored in the block, if the data read for the first time is not operated, the data is directly written, although the data cannot be written in the bad block, the original data is originally stored in the bad block, the data read again for the second time is the same as the original data originally stored in the bad block, the data is judged to be good or bad, and the bad block cannot be identified. In this embodiment, the read data is written into the same address after being operated, instead of directly writing the read data into the same address, and then reading the data and comparing the result with the result obtained after the operation of the data read for the first time, and determining whether the block is a bad block according to the comparison result, the bad block in the NVM can be identified, the probability of misjudgment is reduced, and the reliability and integrity of the data in the NVM memory are ensured.

In one embodiment, as shown in fig. 1, a method for identifying and correcting a bad block of an NVM based on a heterogeneous hybrid memory is provided, the method comprising:

step S110 is executed with the starting address unit of the NVM block as the current address unit, the data of the current address unit is read to obtain first read data, and the first read data is operated to obtain first operation data.

In this embodiment, the detection is performed from the starting address unit of the NVM block, the size of the address unit can be customized, and preferably, 1 byte is used as one address unit. The operation rule can be customized, such as addition, subtraction, multiplication, division, inversion and the like.

Step S120, writing the first operation data into the current address unit, and reading the first operation data to obtain second read data.

In this embodiment, the first operational data after operation is written into the current address unit, and then the first operational data is read from the current address unit to obtain the second read data, so that it is ensured that the second read data is the data saved after operation, rather than the original data saved in the NVM block.

Step S130, determining whether the second read data is the same as the first operation data, if not, the block is a bad block, otherwise, the process goes to step S140.

In this embodiment, if there is an error in the reading or writing function of the address unit, the second read data is different from the first operation data, the address unit cannot be used normally, and as long as one address unit in the address units included in one block of the NVM is abnormal, the block is a bad block, and the remaining address units do not need to be detected.

Step S140, judging whether the current address unit is the ending address unit of the NVM block, if so, judging the block is good or bad, otherwise, entering step S150.

In this embodiment, if the current address unit is the ending address unit of the block of the NVM, it indicates that all address units from the starting address unit to the ending address unit in the block of the NVM can be used normally, and the block is a good block.

Step S150, the next address unit is taken as the current address unit, and the process returns to step S110.

In this embodiment, if the current address unit is not the ending address unit of the block of the NVM, the next address unit is taken as the current address unit and returned to step S110, and the remaining address units in the block that have not been detected are detected.

In this embodiment, the address units are sequentially detected from the starting address unit of the NVM block, and if an abnormal address unit is detected, the remaining address units do not need to be detected, and the block is determined to be a bad block.

In one embodiment, the NVM includes a data storage area and a spare block area, where the spare block area stores a state table for recording a block state of the NVM and a mapping table for recording a replacement relationship between a bad block and a good block. The block status of all blocks of the NVM, i.e. whether they are bad or good, is recorded in the status table. The mapping table records the replacement relationship between the bad block and the good block, the position of the good block replacing the bad block can be found from the position of the bad block, and the position of the bad block replacing the good block can also be found from the position of the good block, as shown in fig. 2, the method further includes:

step S210, if the block is a good block, the position corresponding to the block in the state table and the mapping table is marked as a good block.

In this embodiment, the state table includes the location information of the NVM block and the block state corresponding to each location. The mapping table includes the location information of the NVM block and information corresponding to each location. It will be appreciated that the location information may be represented by a block sequence number. If the block is a Good block, the position corresponding to the block in the state table and the mapping table is marked as a Good block, and the marked symbol can be customized, for example, the Good block is represented by "Good" in the state table, and the Good block is represented by "0 xFFFF" in the mapping table, and can be used as a replacement block.

In step S220, if the block is a bad block, the position corresponding to the block in the status table is marked as a bad block.

In this embodiment, the symbol of the flag may be customized, for example, a Bad block is represented by "Bad" in the state table. After self-checking, the blocks of the NVM data storage area and the spare block area have their own block states, and are recorded in the state table.

Step S230, if the bad block is the data storage area or the spare block area is used as the block of the replacement block, obtaining the good block of the spare block area, using the good block of the spare block area as the replacement block of the bad block, storing the location information of the good block in the mapping table at the location corresponding to the bad block, storing the location information of the bad block in the mapping table at the location corresponding to the good block, and if the bad block is the block used as the replacement block in the spare block area, further needing to mark the location corresponding to the bad block in the mapping table as unusable as the replacement block.

In this embodiment, if a block in the data storage area is a bad block, the bad block needs to be replaced by a good block in the spare block area, the position of the good block in the spare block area is mapped to the position of the bad block through the mapping table, the position information of the good block is stored in the position corresponding to the bad block in the mapping table, and the position information of the bad block is stored in the position corresponding to the good block in the mapping table, so that data can be directly written into the good block or directly read from the good block according to the position mapping relationship when the data is stored or read, thereby shielding the bad block for the system. It will be appreciated that the data that is corrupted after ECC checking can be corrected and written to a good block of mapped locations. As shown in fig. 3, for example, if a block with sequence number No.47 is detected as faulty, the block is marked as Bad block "Bad" in the state table, and a new good block is obtained from the spare block area, assuming that its sequence number is No.71, then the sequence number No.71 of the good block is stored at the position of sequence number No.47 in the map, and the position of the spare block No.71 in the map stores sequence number No. 47. After mapping processing, when the Data2 is written into the block with the sequence number of No.47, because the block is recorded as a bad block in the state table, the replacement block No.71 is found through the mapping table, and the Data2 is directly written into the replacement block No. 71; when reading the Data of the block with the sequence number of No.47, because the block recorded in the state table is a bad block, finding out a replacement block No.71 through the mapping table, and directly replacing the Data2 in the block No. 71; such bidirectional mapping in the mapping table can ensure the reliability of data.

Further, if the block in the spare block area used as the replacement block is a bad block, such as the replacement block used as the block with sequence number No.47, that is, the block with sequence number No.71 becomes a bad block, a new good block needs to be obtained again in the spare block area, assuming that the sequence number is No.72, and then the sequence number No.72 of the good block is stored in the position of the sequence number No.47 in the mapping table, and the position of the sequence number No.72 in the mapping table stores the sequence number No.47, and the position corresponding to the bad block in the mapping table needs to be marked as unusable as the replacement block, such as the position of the sequence number 71 marked as "0 x 0000" indicates unusable as the replacement block, as shown in fig. 4, as an updated state table and mapping table. It will be appreciated that the symbols of the indicia may be custom defined.

In step S240, if the bad block is a block in which the spare block area is not used as a replacement block, the position corresponding to the bad block in the mapping table is marked as a non-usable replacement block.

In this embodiment, if the block that is not used as the replacement block in the spare block area is a bad block, since it is not used as the replacement block, it is only necessary to mark the position corresponding to the bad block in the mapping table as a non-usable replacement block. As shown in FIG. 3, the mark "0 x 0000" at the position of No.70 indicates that it is not usable as a replacement block, and it is understood that the mark symbol can be customized.

In another embodiment, as shown in fig. 5, a method for identifying and correcting a bad block of an NVM based on a heterogeneous hybrid memory is provided, the method comprising:

step S310, reading data of the current address unit to obtain first read data, and performing an operation on the first read data to obtain first operation data.

Step S320, writing the first operation data into the current address unit, and reading the first operation data to obtain the second read data.

Step S330, determining whether the second read data is the same as the first operation data, if not, proceeding to step S340, otherwise, proceeding to step S370.

In this embodiment, when the second read data is different from the first operation data, it is not directly determined that the block is a bad block, so as to avoid that the block is determined as a bad block by mistake because the error is not caused by the NVM block itself, and reduce the probability of erroneous determination.

Step S340, writing the first operation data into the current address unit again, and reading the first operation data again to obtain third read data.

In this embodiment, it is again ensured that the data read for the third time is the data saved after the data read for the first time is operated, rather than the original data saved in the NVM block.

Step S350, determining whether the third read data is the same as the first operation data, if not, proceeding to step S360 to determine that the block is a bad block, otherwise, proceeding to step S370.

In this embodiment, if there is an error in the reading or writing function of the address unit, the third read data is different from the first operation data, the address unit cannot be used normally, and as long as one address unit in the address units included in one block of the NVM is abnormal, the block is a bad block, and the remaining address units do not need to be detected any more.

Step S370, determining whether the current address unit is the ending address unit of the NVM block, if yes, proceeding to step S380 to determine whether the block is good or bad, otherwise, proceeding to step S390.

In step S390, the next address unit is used as the current address unit, and the process returns to step S310.

In one embodiment, after the step of determining whether the second read data is the same as the first operation data, the method further includes: the second read data is stored in the current address unit after being subjected to inverse operation; after the step of judging whether the third read data is the same as the first operational data, the method further comprises the following steps: and performing inverse operation on the third read data and storing the third read data into the current address unit.

In this embodiment, the second read data is stored in the current address unit after being subjected to the back operation, or the third read data is stored in the current address unit after being subjected to the back operation, and since both the second read data and the third read data are data obtained by performing the operation on the first read data, the first read data is restored after the back operation is performed, so as to ensure that the original data is not rewritten after being read and stored. The inverse operation is the inverse operation corresponding to the operation, and if 1 is added to the original data, the inverse operation is reduced by 1.

In one embodiment, both the operation and the inversion are inverting data.

In this embodiment, the operation and the inverse operation are both inverting data, and the inverse operation of the inverse operation is the inverse operation itself, which is simple and convenient.

In one embodiment, the spare block further stores a page erase/write frequency record table, where the page erase/write frequency record table stores the sequence number of the page and the corresponding erase/write frequency, and the method further includes: acquiring a page erasing frequency recording table, judging whether a page exceeding the maximum erasing frequency exists in a block of the NVM according to the page erasing frequency recording table, if so, judging the block to be a bad block, otherwise, judging the block to be a good block.

In this embodiment, the maximum number of times of erasing is a value specified in the design manual of the selected NVM. If the page exceeding the maximum erasing times exists in the NVM block, the page is invalid and unavailable, the block is a bad block, otherwise, the page exceeding the maximum erasing times does not exist in the NVM block, and the block is good or bad if all pages in the NVM block are available. Bad blocks can be identified through the page erasing frequency recording table, and the reliability and the integrity of data are further ensured. .

In one embodiment, the method further comprises:

s1: acquiring a data writing request;

In this embodiment, ECC checking refers to a process of performing parity check on a data block to generate an ECC checksum. Parity checking refers to a process of generating row check values and column check values by checking rows and columns of a data block, respectively. And carrying out ECC (error correction code) check to generate a write check sum when data is written, carrying out ECC check to generate a read check sum when the written data is read again, carrying out XOR (exclusive OR) operation on the write check sum and the read check sum according to bits, and if the read check sum is 0, judging that the data is correct. Otherwise, to avoid the misjudgment, the steps S2-S4 are repeatedly executed according to the preset times, and when none of the obtained operation results is 0, the data is judged to be in error. Preferably, if the preset number of times is 1, the steps S2-S4 are executed again, if the result is 0, the data is determined to be correct, if the result is not 0, the data is determined to be in error, and data error correction is performed according to the operation result. Only the operation result meeting the condition can be corrected, and other conditions show that uncorrectable errors occur.

In an embodiment, as shown in fig. 6, the ECC checking the data in the steps of performing ECC checking on the data to generate the write checksum and performing ECC checking on the read data to generate the read checksum includes:

step S410, determining whether the data to be ECC checked satisfies a predetermined byte, if not, proceeding to step S420, otherwise, proceeding to step S430.

In this embodiment, ECC check is performed on data in units of preset bytes, and preferably, the preset bytes are 256 bytes.

Step S420, splitting and padding the data to generate data of preset bytes.

In this embodiment, if the data length is smaller than the preset byte, the preset data is directly added to be filled into the data of the preset byte. Such as adding 0 at the end to make the data length reach the preset byte. And if the data length is larger than the preset byte, splitting and supplementing to generate a plurality of preset bytes of data.

Step S430, performing row check and column check on the data of the preset byte to obtain a row check value and a column check value.

In this embodiment, the row check value is obtained by performing an exclusive or operation on the designated row of the data to perform a row check, and the column check value is obtained by performing an exclusive or operation on the designated column of the data to perform a column check. The Bit (Bit) Bit to be checked is subjected to exclusive OR, if the result is 0, the data to be checked contains even number of 1; if the result is 1, it indicates that the data to be verified contains an odd number of 1 s. Preferably, a column check value of 6 bits of row check value of 16 bits is generated every 256 bytes of original data.

Specifically, 256 bytes of data form a matrix of 256 rows and 8 columns, with each element of the matrix representing one Bit of bits. As shown in Table 1, bytes 0-255 represent 256 bytes of data, and bits 0-Bit 7 represent 8 bits per Byte.

TABLE 1

The rule of row check is specifically: the data of the designated row is subjected to exclusive OR to obtain data of 16 bits, and the 16 bits are represented by RP 0-RP 15 and represent the polarity of the row.

RP0 indicates the polarity of bytes 0, 2, 4, 6, … 252, 254, i.e. process 1 Byte, skip 1 Byte.

RP1 indicates the polarity of 1, 3, 5, 7 … 253, 255 bytes, i.e. 1 Byte is skipped and 1 Byte is processed.

RP2 indicates the polarity of bytes 0, 1, 4, 5, 8, 9 … 252, 253, i.e. 2 bytes are processed, 2 bytes are skipped.

RP3 indicates the polarity of the 2 nd, 3 rd, 6 th, 7 th, 10 th, 11 … 254 th, 255 th Byte, i.e. 2 bytes are skipped and 2 bytes are processed.

RP4 represents processing 4 bytes, skipping 4 bytes.

RP5 indicates that 4 bytes are skipped and processed.

RP6 represents processing 8 bytes, skipping 8 bytes.

RP7 indicates 8 bytes are skipped and processed.

RP8 represents processing 16 bytes, skipping 16 bytes.

RP9 indicates 16 bytes are skipped and processed.

RP10 represents handling 32 bytes, skipping 32 bytes.

RP11 indicates that 32 bytes are skipped and processed.

RP12 indicates that 64 Bytes are processed, skipping 64 Bytes.

RP13 indicates that 64 bytes are skipped and processed.

RP14 represents processing 128 bytes, skipping 128 bytes.

RP15 indicates 128 bytes are skipped and 128 bytes are processed.

The formula is as follows: the RP0 is Byte0 Byte2 Byte 4 Byte 6 … Byte 252 Byte254, which means that 8 bits of row 0 are XOR-ed with 8 bits of row 2, then XOR-ed with 8 bits of row 4, and so on until XOR-ed with 8 bits of row 254 to obtain RP0, and RP0 is 128 rows, that is, 128 is the result of XOR-calculation of 1024 bits with 8 bits. By analogy, each Bit of RP0 to RP15 is the result of xoring 128 bytes (i.e., 128 rows), i.e., 128 × 8 bits to 1024 bits.

TABLE 2

As shown in table 2, the rule of column check specifically is: exclusive-OR is performed using data of a designated column to obtain data of 6 bits, and the 6 bits are represented by CP0 to CP5, representing column polarity.

CP0 indicates the polarity of columns 0, 2, 4, and 6, and CP1 indicates the polarity of columns 1, 3, 5, and 7.

CP2 indicates the polarity of columns 0, 1, 4, and 5, and CP3 indicates the polarity of columns 2, 3, 6, and 7.

CP4 indicates the polarity of columns 0, 1, 2, and 3, and CP5 indicates the polarity of columns 4, 5, 6, and 7.

The formula is as follows: CP 0^ Bit0^ Bit2^ Bit4^ Bit6, after indicating that 256 bits of the 0 th column are XOR-ed with 256 bits of the 2 nd column, then XOR-ed with 256 bits of the 4 th column, and then XOR-ed with 256 bits of the 6 th column, CP0 is obtained, and CP0 is actually the result of XOR-ing 256 bits of 4^ 1024 bits. CP 1-CP 5, and so on.

Step S440, sequentially storing the row check value and the column check value and padding to generate a checksum of the preset byte.

In this embodiment, the preset byte is adjusted according to the number of bits of the row check value and the column check value, and the check sum of the integer byte is generated by padding. If the row check value is 16 bits and the column check value is 6 bits, 3 bytes are used for storing the check result, the check result is stored in sequence, and then the two redundant Bit positions are set to be 1 as shown in the table 3.

TABLE 3

ECC

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Byte0

RP7

RP6

RP5

RP4

RP3

RP2

RP1

RP0

Byte1

RP15

RP14

RP13

RP12

RP11

RP10

RP9

RP8

Byte2

CP5

CP4

CP3

CP2

CP1

CP0

1

In one embodiment, as shown in fig. 7, the step of performing data error correction according to the operation result includes:

step S510, determining whether there are 1S in the bit of the operation result with a preset number, if yes, proceeding to step S520, otherwise, the data is not error-correctable.

In this embodiment, it is first determined whether the bits of the operation result have 1 of the preset number, where the preset number is adjusted according to the bit number of the row check value and the column check value, and is half of the total bit number of the row check value and the column check value. If the row check value is 16 bits and the column check value is 6 bits, the total bit number is 22, and the preset number is 11. If the bit of the operation result has a preset number of 1, it is determined that the data is error-correctable, and the process proceeds to step S520, otherwise, the data is not error-correctable.

Step S520, determining the error row address and the error column address according to the operation result.

In this embodiment, the value of the odd-numbered bit of each byte of the operation result corresponding to the row polarity is extracted and stored in the order from the low bit to the high bit, and the obtained value is the row address of the error data. The lower three bits of bits 7, Bit5, and Bit3 of the byte of the operation result corresponding to the column polarity are extracted, and the remaining position 0 indicates the column address of the error data. For example, if the checksum generated by ECC checking 256 bytes of data is 3 bytes and stored in s0, s1, and s2, and if 11 bits of s0, s1, and s2 are 1 in total, it indicates that an error of one Bit occurs in the data, and error correction is possible. The erroneous Bit is located by first determining the row address (i.e., which byte is erroneous) and then determining the column address (i.e., which Bit in the byte is erroneous). The method for determining the row address is that Bit7, Bit5, Bit3 and Bit1 in s1 are extracted as high four bits, and Bit7, Bit5, Bit3 and Bit1 in s0 are extracted as low four bits, so that the value formed by the high four bits and the low four bits represents the row address of the error byte (the range is 0-255). The method for determining the column address is as follows: one byte is used to represent the column address, and Bit7, Bit5 and Bit3 in s2 are extracted as the lower three bits, and the remaining position is 0, so that the value of this byte represents the column address of the error Bit (in the range of 0 to 7).

Step S530, obtaining error data according to the row address and the column address, and performing an inversion operation on the error data to obtain correct data.

In this embodiment, the position of the error data is determined according to the row address and the column address, the error data is obtained, and the error data is subjected to negation operation to obtain correct data. If the row address is 10 and the column address is 5, it represents that the data at the location of Byte10 and Bit5 in table 2 is erroneous, and the erroneous data is inverted to obtain the correct data.

In one embodiment, as shown in fig. 8, there is provided a system for identifying, processing and correcting bad blocks of NVM based on heterogeneous hybrid memory, including:

the detecting module 610 is configured to detect data in each address location in a block of the NVM during a self-test.

The determining module 620 is configured to determine that the block is a bad block if the data obtained by operating the read data is different from the data obtained by writing the operated data into the address unit and then reading the data again, where the data is in any address unit of the block.

The determining module 620 is further configured to determine that the block is a good block if the data obtained by operating the read data is the same as the data obtained by reading the data again after writing the operated data into the address unit, according to the data in all address units in the block.

In one embodiment, as shown in FIG. 9, the detection module 610 includes:

the first data obtaining unit 611 is configured to use a starting address unit of the NVM block as a current address unit, read data of the current address unit to obtain first read data, and perform an operation on the first read data to obtain first operation data.

The second data obtaining unit 612 is configured to write the first operation data into the current address unit, and read the first operation data to obtain second read data.

A processing unit 613, configured to determine whether the second read data is the same as the first operation data, and if the second read data is different from the first operation data, the block is a bad block; if the current address unit is the ending address unit of the NVM block, further judging whether the current address unit is the ending address unit of the NVM block, if so, the block is a good block, otherwise, taking the next address unit as the current address unit, and returning the first data acquisition module to the step of reading the data of the current address unit.

In another embodiment, the NVM includes a data storage area and a spare block area, where the spare block area stores a state table for recording a block state of the NVM and a mapping table for recording a replacement relationship between a bad block and a good block, and on the basis of the above embodiment, as shown in fig. 10, the method further includes:

a block processing module 630, configured to mark, if the block is a good block, a position in the state table and the mapping table corresponding to the block as a good block.

The block processing module 630 is further configured to mark a location corresponding to the block in the status table as a bad block if the block is a bad block.

The block processing module 630 is further configured to, if the bad block is a data storage area or a block in which the spare block area is used as a replacement block, obtain a good block in the spare block area, use the good block in the spare block area as the replacement block of the bad block, store location information of the good block in a location corresponding to the bad block in the mapping table, store location information of the bad block in a location corresponding to the good block in the mapping table, and if the bad block is a block in which the spare block area is used as the replacement block, further need to mark a location corresponding to the bad block in the mapping table as an unavailable replacement block.

The block processing module 630 is further configured to mark a position corresponding to the bad block in the mapping table as unavailable as a replacement block if the bad block is a block of which the spare block area is not used as a replacement block.

In an embodiment, the processing unit 613 is further configured to write the first operation data into the current address unit again, read the first operation data again to obtain third read data, determine whether the third read data is the same as the first operation data, if the third read data is different from the first operation data, the block is a bad block, and if the third read data is the same as the first operation data, the step of further determining whether the current address unit is an ending address unit of the block of the NVM is performed.

In one embodiment, the processing unit 613 is further configured to determine whether the second read data is identical to the first operation data, and if so, store the second read data in the current address unit after performing a reverse operation; and the address unit is also used for judging whether the third read data is the same as the first operation data or not, and storing the third read data into the current address unit after performing inverse operation after the third read data is the same as the first operation data.

In one embodiment, both the operation and the inversion are inverting data.

In another embodiment, the spare block further stores a page erase/write frequency record table, where the page erase/write frequency record table stores the sequence number of the page and the corresponding erase/write frequency, as shown in fig. 11, the system further includes:

the record table determining module 640 is configured to obtain a page erasing times record table, determine whether a page exceeding the maximum erasing times exists in the NVM blocks according to the page erasing times record table, if so, determine that the decision block is a bad block, otherwise, determine that the decision block is a good block.

In yet another embodiment, as shown in fig. 12, the system further comprises:

an error correction module 650 for performing:

s1: acquiring a data writing request;

s3: reading data from the data writing position, and performing ECC (error correction code) check on the read data to generate a read check sum;

s4: carrying out XOR operation on the write checksum and the read checksum to obtain an operation result;

s5: and if the operation result is 0, the data is correct, otherwise, the preset times of execution are repeated from S2 to S4, and when the operation results obtained from S2 to S4 are not 0 each time, the data is judged to be in error, and the data is corrected according to the operation results.

In an embodiment, the ECC checking of the data by the error correction module 650 is specifically to determine whether the data that needs to be ECC checked satisfies a preset byte, split and complement the data to generate data of the preset byte if the data does not satisfy the preset byte, perform row check and column check on the data of the preset byte to obtain a row check value and a column check value, and sequentially store and complement the row check value and the column check value to generate a checksum of the preset byte.

In an embodiment, the error correction module 650 is further configured to determine whether a preset number of 1's exist in bits of the operation result, if so, determine that the data is error-correctable, otherwise, determine that the data is not error-correctable, if the data is error-correctable, determine a row address and a column address that are in error according to the operation result, obtain error data according to the row address and the column address, and perform a negation operation on the error data to obtain correct data.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. A NVM bad block identification processing and error correction method based on heterogeneous hybrid memory comprises the following steps:

in the self-checking process, the self-checking sends an instruction to the NVM memory buffer controller by the application layer, and executes:

detecting data in each address location in a block of the NVM;

if the data obtained after the operation on the read data is the same as the data obtained after the operation is written into the address unit and is read again in all the address units in the block, judging the block to be a good block;

in the self-checking process, further performing:

acquiring a page erasing frequency recording table;

2. The method of claim 1, wherein the step of detecting data in each address location in a block of NVM comprises:

3. The method of claim 1, wherein the NVM includes a data storage area and a spare block area; the spare block area stores a state table for recording the block state of the NVM and a mapping table for recording the replacement relationship between the bad block and the good block; the method further comprises the following steps:

if the bad block is a data storage area or a spare block area is used as a block of a replacement block, acquiring a good block of the spare block area, using the good block of the spare block area as the replacement block of the bad block, storing the position information of the good block at a position corresponding to the bad block in a mapping table, and storing the position information of the bad block at a position corresponding to the good block in the mapping table; if the bad block is a block of which the spare block area is used as a replacement block, marking the position corresponding to the bad block in a mapping table as a non-usable replacement block;

4. The method of claim 2, wherein after the step of determining whether the second read data is the same as the first operation data, if not, further comprising:

5. The method of claim 4, wherein after the step of determining whether the second read data is the same as the first operation data, if so, the method further comprises: the second read data is stored into the current address unit after being subjected to inverse operation;

6. The method of claim 5, wherein the operation and the inverse operation are both inverting data.

7. The method according to claim 1, wherein the spare block further stores a page erase/write count table, and the page erase/write count table stores the page number and the corresponding erase/write count.

8. The method of claim 1, further comprising:

s1: acquiring a data writing request;

9. The method of claim 8, wherein the step of performing an ECC check on the data to generate a write checksum and performing an ECC check on the read data to generate a read checksum comprises:

judging whether the data needing ECC check meets preset bytes or not;

10. The method according to claim 8, wherein the step of performing data error correction according to the operation result comprises:

11. An NVM bad block identification processing and error correction system based on heterogeneous hybrid memory, the system comprising:

the detection module is used for detecting data in each address unit in the NVM block in the self-detection process, wherein the self-detection sends an instruction to the NVM memory buffer controller by the application layer;

the judging module is further used for judging the block to be a good block if the data obtained by the operation on the read data is the same as the data obtained by the re-reading after the data obtained by the operation is written into the address unit in the data in all the address units in the block;

and the record table judging module is used for acquiring a page erasing frequency record table, judging whether a page exceeding the maximum erasing frequency exists in the NVM blocks according to the page erasing frequency record table, if so, judging the blocks to be bad blocks, and otherwise, judging the blocks to be good blocks.

12. The system of claim 11, wherein the detection module comprises:

13. The system of claim 11, wherein the NVM includes a data storage area and a spare block area, and wherein the spare block area stores a state table for recording the block state of the NVM and a mapping table for recording replacement relationships of bad blocks and good blocks, the system further comprising:

14. The system of claim 12, wherein the processing unit is further configured to write the first operation data into the current address location again, read the first operation data again to obtain a third read data, determine whether the third read data is the same as the first operation data, if so, the block is a bad block, and if so, re-enter the step of further determining whether the current address location is an ending address location of the block of the NVM.

15. The system of claim 14, wherein the processing unit is further configured to determine whether the second read data is identical to the first operation data, and if so, to store the second read data in the current address unit after performing a reverse operation on the second read data; and the address unit is also used for judging whether third read data is the same as the first operation data or not, and storing the third read data into the current address unit after performing inverse operation on the third read data if the third read data is the same as the first operation data.

16. The system of claim 15, wherein the operation and the inverse operation are both inverting data.

17. The system according to claim 11, wherein the spare block further stores a page erase/write count table, and the page erase/write count table stores the page number and the corresponding erase/write count.

18. The system of claim 11, further comprising:

an error correction module to perform:

s1: acquiring a data writing request;

19. The system according to claim 18, wherein the ECC checking of the data by the error correction module is specifically to determine whether the data that needs to be ECC checked satisfies a preset byte, split and complement the data to generate data of the preset byte if the data does not satisfy the preset byte, perform row check and column check on the data of the preset byte to obtain a row check value and a column check value, and sequentially store and complement the row check value and the column check value to generate a checksum of the preset byte.

20. The system according to claim 19, wherein the error correction module is further configured to determine whether there is a preset number of 1's in the bits of the operation result, if yes, determine that the data is error-correctable, otherwise, determine that the data is not error-correctable, if the data is error-correctable, determine a row address and a column address that are in error according to the operation result, obtain error data according to the row address and the column address, and perform a negation operation on the error data to obtain correct data.