CN105785202A

CN105785202A - Dynamic electric energy quality detection apparatus

Info

Publication number: CN105785202A
Application number: CN201610283400.7A
Authority: CN
Inventors: 孙文兵
Original assignee: Individual
Current assignee: Individual
Priority date: 2016-04-29
Filing date: 2016-04-29
Publication date: 2016-07-20

Abstract

The invention relates to a dynamic electric energy quality detection apparatus. The apparatus comprises a signal synchronization sampling module, a signal conditioning module, a hardware phase-locked loop module, an FPGA logic calculating module, an ARM main processor module and a human-computer interface display module. An input terminal of the signal synchronization sampling module is connected to a three-phase power grid current/voltage and an output terminal is connected to the signal conditioning module and the hardware phase-locked loop module respectively. An output terminal of the hardware phase-locked loop module is connected to the signal conditioning module. An input terminal of the FPGA logic calculating module is connected to the signal conditioning module and an output terminal is mutually connected to the ARM main processor module. The human-computer interface display module is mutually connected to the ARM main processor module. The apparatus adopts an FPGA+ARM structure, a processing speed is fast, calculating precision is high, a hardware structure is simple and dynamic detection to electric energy quality can be realized rapidly and accurately.

Description

A kind of dynamic electric energy quality detection device

Technical field

The present invention relates to electric detection technique field, particularly to a kind of dynamic electric energy quality detection device.

Background technology

Along with the development of Power Electronic Technique, power electronic devices and equipment use in a large number in power system, thus causing that in electrical network, the quality of power supply goes from bad to worse；On the other hand, the electrical equipment of modern industry, business, agricultural and resident is more and more sensitive to the quality of power supply, and power supply quality is had higher requirement, and therefore improves the quality of power supply and has great importance.

There is the shortcomings such as processing speed is slow, hardware configuration is perfect not in the electric energy quality detection device of 8,16 traditional single-chip microcomputers；Current electric energy quality detection device adopts fixed DSP to realize mostly, DSP has powerful data-handling capacity, but DSP program serial runs, when relating to high-volume data and calculating task, its real-time calculating aspect shows slightly not enough, and the various states parameter that namely can not meet large number quipments detects.

Summary of the invention

Technical problem: it is an object of the invention to the deficiency overcome in prior art, it is provided that a kind of dynamic electric energy quality detection device.

Technical scheme: the present invention relates to a kind of dynamic electric energy quality detection device, this device includes signal synchronized sampling module, Signal-regulated kinase, hardware phase-locked-loop module, fpga logic computing module, ARM main processor modules and man machine interface display module；Signal synchronized sampling module input accesses three phase network current/voltage, outfan is connected with Signal-regulated kinase and hardware phase-locked-loop module respectively, hardware phase-locked-loop module outfan is connected with Signal-regulated kinase, the input of fpga logic computing module is connected with Signal-regulated kinase, outfan and ARM main processor modules are connected with each other, and man machine interface display module and ARM main processor modules are connected with each other.

Signal synchronized sampling module transfers the analog voltage current signal of input to digital signal, realize the synchronized tracking to power network signal frequency and the synchronized sampling of the signal of telecommunication simultaneously, the voltage and current signal of sampling is filtered and magnitude of voltage adjustment by Signal-regulated kinase, and signal is sent into fpga logic computing module, fpga logic computing module has been responsible for the computational analysis to parameters such as firm power parameter, harmonic waves, finally by man machine interface display module Dynamic Announce Power Quality Detection result.

Described signal synchronized sampling module adopts differential input AC coupling circuit, and preferentially adopting programmable A/D converter model is AD73360.

Described Signal-regulated kinase is made up of the high impedance modulate circuit being linked in sequence, input clamp protection circuits, second order frequency overlapped-resistable filter and input buffer circuit.

Core circuit that described hardware phase-locked-loop module is mainly made up of CD4046 and frequency divider two parts that CD4046 is constituted form.

Described fpga logic computing module preferentially adopts the EP4CE15F17C8 chip of altera corp.

Described ARM main processor modules preferentially adopts the LPC2292 chip of ARM company.

The communication mode of described man machine interface display module adopts RS485, RS485 interface to adopt balance driver and differential receiver combination.

In sum, the method have the advantages that

1, apparatus of the present invention adopt FPGA+ARM structure, and its processing speed is very fast, computational accuracy is high, and hardware configuration is simpler, it is possible to fast accurate ground realizes quality of power supply dynamic monitoring.

2, apparatus of the present invention complete function, real-time, dependable performance, measurement is accurate, volume is little, cost is low, can be used for electrical network end real time and on line monitoring, have a wide range of applications space and the market space.

Accompanying drawing explanation

Fig. 1 is the system structure schematic diagram of the present invention.

Fig. 2 is the circuit theory diagrams of signal synchronized sampling module in the present invention.

Fig. 3 is the theory diagram of Signal-regulated kinase in the present invention.

Fig. 4 is the circuit theory diagrams of hardware phase-locked-loop module in the present invention.

Fig. 5 is the circuit theory diagrams of man machine interface display module in the present invention.

Detailed description of the invention

Technical scheme is further illustrated below in conjunction with drawings and Examples.

As it is shown in figure 1, a kind of dynamic electric energy quality detection device, this device includes signal synchronized sampling module, Signal-regulated kinase, hardware phase-locked-loop module, fpga logic computing module, ARM main processor modules and man machine interface display module；Signal synchronized sampling module input accesses three phase network current/voltage, outfan is connected with Signal-regulated kinase and hardware phase-locked-loop module respectively, hardware phase-locked-loop module outfan is connected with Signal-regulated kinase, the input of fpga logic computing module is connected with Signal-regulated kinase, outfan and ARM main processor modules are connected with each other, and man machine interface display module and ARM main processor modules are connected with each other.

As in figure 2 it is shown, described signal synchronized sampling module adopts differential input AC coupling circuit, preferentially adopting programmable A/D converter model is AD73360；REFOUT is the AD73360 benchmark produced output, and this benchmark can be programmed the power work adapting to 3V or 5V；C₁、C₂Being coupling electric capacity, its value can be taken as 0.1 μ F；R₁And C₃、R₂And C₄Collectively form low-pass first order filter, it is possible to play a part anti aliasing；R₃、R₄Play a part the level of biasing analog input end；X therein can be the arbitrary road in 6 paths.

As it is shown on figure 3, described Signal-regulated kinase is made up of the high impedance modulate circuit being linked in sequence, input clamp protection circuits, second order frequency overlapped-resistable filter and input buffer circuit, mainly the voltage and current signal of sampling is filtered and magnitude of voltage adjustment.

As shown in Figure 4, described hardware phase-locked-loop module is mainly made up of CD4046 core circuit and frequency divider two parts that CD4046 is constituted form；In figure, left side is CD4046 core circuit portions, and wherein pin 1 is used to the duty of display CD4046, if input signal is in the lock state by phaselocked loop, this pin is high level, is otherwise low level；Right side is the frequency divider being made up of CD4046, it is thus achieved that signal period and frequency, simultaneously using double frequency pulse as Synchronous Sampling Pulse.

As it is shown in figure 5, the communication mode of described man machine interface display module adopts RS485, RS485 interface to adopt balance driver and differential receiver combination；Its anti-common mode disturbances ability strengthens, and namely noise immunity is good, and its maximum communication distance is about 1219m, and peak transfer rate is 10Mb/s, and power quality data can be transferred to remote host computer.

Claims

1. a dynamic electric energy quality detection device, it is characterised in that this device includes signal synchronized sampling module, Signal-regulated kinase, hardware phase-locked-loop module, fpga logic computing module, ARM main processor modules and man machine interface display module；Signal synchronized sampling module input accesses three phase network current/voltage, outfan is connected with Signal-regulated kinase and hardware phase-locked-loop module respectively, hardware phase-locked-loop module outfan is connected with Signal-regulated kinase, the input of fpga logic computing module is connected with Signal-regulated kinase, outfan and ARM main processor modules are connected with each other, and man machine interface display module and ARM main processor modules are connected with each other.