CN1057649C - Frequency state discriminating device with hysteresis - Google Patents

Frequency state discriminating device with hysteresis Download PDF

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CN1057649C
CN1057649C CN93116475A CN93116475A CN1057649C CN 1057649 C CN1057649 C CN 1057649C CN 93116475 A CN93116475 A CN 93116475A CN 93116475 A CN93116475 A CN 93116475A CN 1057649 C CN1057649 C CN 1057649C
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signal
present condition
state
frequency
value
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CN1099213A (en
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李昆铭
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Acer Computer Co Ltd
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Acer Computer Co Ltd
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Abstract

The present invention relates to a frequency state discriminating device with hysteresis, which is used for discriminating the frequency of an input signal. The device comprises a present state circuit and a next state control circuit, wherein the present state circuit responds to a clock signal and a control signal and outputs a present state value signal having a plurality of bits, and a frequency discriminating signal; the next state control circuit responds to the present state value signal and the input signal, and outputs a control signal so that the relation between frequency discriminating signal and the frequency of the input signal has histeresis.

Description

Frequency with hysteresis is differentiated state device
The present invention is relevant a kind of frequency-discriminating circuit, differentiates state device (state machine) in particular to a kind of frequency with hysteresis.
Environmental protection has been the consistent target of whole world visual organ industry, also is one of important measures of environmental protection and save the energy.Aspect the monitor industry, the power conservation type monitor has been the all-out target of each manufacturer.
In the interface control signal standard that video equipment ANSI (Video Equipment Standard Association-VESA) is worked out at present, the frequency of its video level synchronizing signal exists greater than the conspicuous expression of 10K signal, if think that less than 10 He Ze signal does not exist.Simultaneously, the vertical synchronizing signal frequency exists greater than 20 hertz of expression signals, does not exist less than 10 hertz of expression signals.This standard criterion shown in the state of the vertical synchronizing signal among Fig. 1, has a kind of hysteresis.That is to say, differentiated when surpassing 20 hertz, be judged as and have (state 1), and when being lower than 10 hertz by discriminating after a while, just be judged as and do not have (state 0) when the frequency of vertical synchronizing signal.
When the control circuit discriminating level in the monitor or vertical synchronizing signal when not existing, can close most of power supply, make monitor be in sleep state, to save the energy.
Linear circuit with hysteresis is difficult for extremely realizing that required part is many and complicated, and cost is also high.
In the present known linear frequency-discriminating circuit, adopt an integrating circuit, differentiate the voltage of integration gained again with comparator, required part is many and complicated.The digital frequency discrimination circuit generally then can utilize counter calculating signal pulse number within a certain period of time, and then according to differentiating gained, the requirement that solves hysteresis with logical circuit.
The purpose of this invention is to provide a kind of state device (State machine),, finish the effect and the purpose of frequency discrimination and hysteresis with the conversion regime of state (state).
The objective of the invention is to reach by following apparatus, that is, a kind of frequency with the existing late elephant of magnetic hysteresis is differentiated state device, in order to differentiate the frequency of an input signal, it is characterized in that, comprising:
A present condition circuit in response to a clock signal and a control signal, is exported a present condition value signal and a frequency distinguishing signal, and the present condition value signal has a plurality of positions; Described present condition circuit comprises one first trigger, and described first trigger is in response to described clock signal and control signal, one first of output present condition value signal; Described present condition circuit comprises one second trigger, and described second trigger is in response to described clock signal and control signal, one second of output present condition value signal; Described present condition circuit comprises a counter, and described counter is exported other position of present condition value signal in response to described clock signal, control signal and input signal;
A next state control circuit, described next state control circuit comprises three and door at least, these three with the door in response to present condition value signal and described input signal, export described control signal, make the relation between described frequency distinguishing signal and the described frequency input signal have hysteresis.
Basic conception of the present invention and preferred embodiment thereof can be described in detail and be cooperated relevant drawings and be able to abundant understanding by following.Wherein,
Fig. 1 is the discrimination standard of VESA to vertical synchronizing signal.
Fig. 2 is the functional-block diagram of state device of the present invention.
Fig. 3 is a preferred embodiment of the present invention.
Disclose four kinds of pairing each state exchanges of varying input signal frequency among Fig. 4.
With reference to figure 2, the present invention has the frequency of hysteresis and differentiates that state device includes a present condition circuit 21 and a state control circuit 22.Present condition circuit 21 response one clock signal 23 and control signals 24 are exported a present condition value signal 25 and a frequency distinguishing signal 26.Present condition value signal 25 has a plurality of binary digits.
Next state control circuit 22 response present condition value signal 25 and input signals 27, output control signal 24 makes the relation between the frequency of frequency distinguishing signal 26 and input signal 27 that hysteresis be arranged, as shown in Figure 1.
Below with the state transition table of a reality operational mode of the present invention is described.The frequency of hypothesis clock signal 23 is 128 hertz earlier.
Table one present condition value 000 001 002 003 004 005 006 007 008 009 00A 00B are worth 001 002 003 004 005 006 007 008 009 00A 00B 000 without the input signal next state to be had the input signal next state to be worth 010 010 010 010 010 010 010 010 010 010 010 010 present condition values, 010 011 012 013 014 015 016 017 018 019 01A 01B to be worth 011 012 013 014 015 016 017 018 019 01A 01B 000 without the input signal next state and to have the input signal next state to be worth 110 110 110 110 110 110 010 010 010 010 010 010 present condition values, 110 111 112 113 114 115 116 117 118 119 11A 11B to be worth 111 112 113 114 115 116 117 118 119 11A 11B 000 without the input signal next state and to have the input signal next state to be worth 110 110 110 110 110 110 110 110 110 110 110 110 for convenient following narration; The highest order of the state value in the table one is referred to as first; An inferior high position is referred to as second, and lowest order is referred to as other positions. For example, 0 among the 01B is first, and 1 is second, and B is other positions.
When the frequency of clock signal 23 was 128 hertz, then per 12 clock pulse were about 100 microseconds, that is 12 clock pulse are equivalent to the one-period that frequency is 10 hertz of signals.And 6 clock pulse are equivalent to the one-period that frequency is 20 hertz of signals.
When input signal 27 does not move as yet, the control of present condition circuit 21 suspension control signals 24, clock signal 23, its present condition signal 25 output valves circulate between 000-00B.That is by 000 → 001 → ... → 00B → 000 ... by that analogy.
When input signal 27 moves for the first time, no matter why present condition signal 25 is worth at this moment, control signal 24 actions, the present condition signal promptly changes 010 into, and shown in the row of the 3rd in the table one, and beginning circulates between 010-01B.That is by 010 → 011 → ..., input signal 27 action once more not yet when if present condition signal 25 is circulated to 01B, then present condition signal 25 changes back to 000, as last column institute indicating value of the 5th row.This situation represents that the present frequency of input signal 27 is near zero.
If when input signal 27 moves between present condition value signal 016-01B state value for the second time, the expression frequency input signal is individual conspicuous in 10-20, the influence of suspension control signal 24,25 of present condition value signals are transformed into 010, back six row institute indicating values as the 6th row, and beginning circulates between the state value between the 010-01B, that is by 010 → 011 → ...
If when input signal 27 is when move the second time between the 010-015 state value at the present condition signal, represent input signal greater than 20 hertz, the influence of suspension control signal 24, present condition signal 25 is transformed into 110, as the 6th row institute indicating value, and beginning circulates between the state value between the 110-11B.That is by 110 → 111 → ... 11A.
If when input signal 27 (does not contain 11B) when moving again before the present condition value signal is 11B, the expression frequency input signal is greater than 10 hertz, the influence of suspension control signal 24, present condition value signal 25 is transformed into 110, as the 9th row institute indicating value, and between state values such as 110-11B, circulate again, produce hysteresis.Even if than the time frequency less than 20 hertz, frequency distinguishing signal 26 still is 1.
If when input signal 27 (did not contain 11B) and does not all move again before the present condition value signal is 11B, the expression frequency input signal is less than 10 hertz, then the present condition value is transformed into 000, as last column institute indicating value of the 8th row, and circulates between state values such as 000-00B again.
Frequency distinguishing signal 26 will be done or non-(NOR) computing and getting by the inverse value of the front two of present condition signal value 25, and for example, having only when the state value front two all is 1 situation, and frequency distinguishing signal 26 just is 1, is in existence.Otherwise frequency distinguishing signal 26 is all 0, is in not existence, as shown in Figure 1.
More than to the narration of Fig. 2 and table one, can cooperate a preferred embodiment of the present invention (as shown in Figure 3) and further understand.
As shown in Figure 3, in the preferred embodiment of the present invention, its present condition circuit comprises first trigger, 211, the second triggers 211 and a counter 213, one or non-(NOR) door.The Q end output of first trigger 211 is first bit of present condition signal 25, the Q end output of second trigger 212 is second bit of present condition signal 25, the QD of counter 213, QC, QB, QA output are exported other place values 0-B (hexadecimal), that is 0 (hexadecimal) equal 0000 output of counter 213, and B (hexadecimal) equals 1011 output valves of counter 213.The control that counter 213 is ordered by signal end B, per 12 clock pulse make zero once.And after input signal 27 actions, when next clock pulse signal 27 entered, counter 213 also made zero once.
Two inputs of NOR gate 214 respectively with first trigger 211 and second trigger 212-the Q output is connected, first, second position of just thinking the present condition signal is 11 o'clock, represent input signal 27 frequencies greater than 20 hertz, the output frequency distinguishing signal 26 of NOR gate 214 just is 1 (existence).First, second position is 00 or 01 o'clock, and the frequency distinguishing signal 26 of output was all for 0 (not existing).
When present condition circuit 21 adopted as shown in Figure 3 element, next state control circuit 22 can be designed to the circuit as right-hand part among Fig. 3, to reach frequency discrimination of the present invention and hysteresis.But this design is practised those skilled in the art to heat, and the variation of its equalization is multifarious far more than, and they all should be within the scope that the invention is intended to protect.
In addition, the detailed design of present condition circuit also can have the variation of many impartial scopes among Fig. 3, also should belong to the scope that the invention is intended to protect.
In addition, also only be an example of the present invention's conception as the state transition table of table one, different designers can design other state value conversion, reaches purpose of the present invention, effect equally.For example, when the frequency of input signal 27 during greater than 20 hertz, its state of definable is 100, but not table one 110.If be so, then must change the detailed design in present condition circuit 21 among Fig. 3 and the next state circuit 22, but its spirit does not still break away from conception of the present invention, as shown in Figure 2.
In Fig. 4, the different variation of state of present condition value signal 25 is described respectively with the situation of four kinds of varying input signals 27.
In Fig. 4 (a), when input signal 27 moves once when present condition value signal 27 is 002, then next present condition value is transformed into 010, and beginning circulates between 010-01B, and move once more because of there is no input signal 27 thereafter, so frequency distinguishing signal 26 does not move (not existing), this situation is equivalent to frequency input signal near zero.
In Fig. 4 (b), input signal 27 ties up to the present condition value signal when moving for the first time be generation in 002 o'clock, its next present condition value is transformed into 010, and beginning circulates between 010-01B, but there be not when being circulated to 01B second input signal 27 to take place yet, so the present condition value is transformed into 000, and circulates between 000-00B again.But in cyclic process, when the present condition value was 003, input signal 27 moved once more, so present condition value signal 25 is transformed into 010 immediately.This situation is represented the frequency of input signal 27 less than 10 hertz, frequency distinguishing signal 26 be failure to actuate (not depositing work).
In Fig. 4 (c), input signal 27 is to move for the first time in 002 o'clock at the present condition value signal, the present condition value is transformed into 010, and beginning circulates between 010-01B, be circulated at 018 o'clock, input signal 27 action for the second time, the present condition value is transformed into 010, again circulation, input signal 27 are action in 016 o'clock in the present condition value for the third time.This situation represents that input signal 27 frequencies are greater than 10 hertz but less than 20 hertz, frequency distinguishing signal 26 is failure to actuate (not existing).
In Fig. 4 (d), the present condition value signal is input signal 27 action for the first time in 004 o'clock, so the present condition value is transformed into 010, and beginning circulates between 010-01B, be circulated at 014 o'clock, input signal 27 action for the second time, the present condition value is transformed into 110, and beginning circulates between 110-11B, input signal 27 is when present condition value 113, action once more, it is 110 that the present condition value changes into, and circulation again.Input signal 27 is circulated at 114 o'clock in the present condition value and moves once again.This situation is represented the frequency of input signal 27 greater than 20 hertz, 26 actions this moment (existence) of frequency distinguishing signal.
If when desire changes the upper and lower limit frequency of hysteresis, can not change its dependent variable, set about by clock signal 23.When for example clock signal being improved ten times to 1280 hertz by 128 hertz, and when still adopting the state transition table of table one, then following among Fig. 1 is limited to 100 hertz, and the upper limit then is 200 hertz.
If when desiring only to change the lower frequency limit of hysteresis, can not change its dependent variable, as long as change horizontal state number in the table one, for example, when changing state number into 24 by existing 12 (0-B) in the table one, lower limit is 5 hertz.
If when desiring only to change the upper limiting frequency of hysteresis, can not change its dependent variable, as long as the 6th row state value is 110 number in the change table one.For example, make table one the 4th row present condition value 015 pairing 110 values into 010, other remain unchanged, and then upper limiting frequency is increased to 25 hertz.
Above-described various variation also is the scope that the invention is intended to protect.
But mandatory declaration is that in case the state transition table in the table one redefines, the detailed design among Fig. 3 also must change thereupon, to finish the purpose of different conditions conversion.

Claims (13)

1. the frequency with the existing late elephant of magnetic hysteresis is differentiated state device, in order to differentiate the frequency of an input signal, it is characterized in that, comprising:
A present condition circuit in response to a clock signal and a control signal, is exported a present condition value signal and a frequency distinguishing signal, and the present condition value signal has a plurality of positions; Described present condition circuit comprises one first trigger, and described first trigger is in response to described clock signal and control signal, one first of output present condition value signal; Described present condition circuit comprises one second trigger, and described second trigger is in response to described clock signal and control signal, one second of output present condition value signal; Described present condition circuit comprises a counter, and described counter is exported other position of present condition value signal in response to described clock signal, control signal and input signal;
A next state control circuit, described next state control circuit comprises three and door at least, these three with the door in response to present condition value signal and described input signal, export described control signal, make the relation between described frequency distinguishing signal and the described frequency input signal have hysteresis.
2. state device as claimed in claim 1 is characterized in that, when the frequency of described input signal wherein surpassed a ceiling value, the frequency distinguishing signal became operate condition, and this frequency is during less than a low limit value, and the frequency distinguishing signal becomes non-action status.
3. state device as claimed in claim 2 is characterized in that ceiling value wherein is not equal to low limit value.
4. state device as claimed in claim 2 is characterized in that, ceiling value wherein is 20 hertz, and low limit value is 10 hertz.
5. state device as claimed in claim 2 is characterized in that, ceiling value wherein is 10 kilo hertzs, and low limit value is 10 hertz.
6. state device as claimed in claim 4 is characterized in that, wherein the frequency of clock signal is 128 hertz.
7. state device as claimed in claim 6 is characterized in that, present condition value signal wherein includes 000,001,002,003,004,005,006,007,008,009,00A, 00B, 010,011,012,013,014,015,016,017,018,019,01A, 01B, 110,111,112,113,114,115,116,117,118,119,11A, the state value that 11B etc. are different.
8. state device as claimed in claim 7 is characterized in that, when described input signal did not move as yet, the present condition value signal circulated between state values such as 000-00B.
9. state device as claimed in claim 7 is characterized in that, when described input signal moved for the first time, the present condition value signal was transformed into 010, and beginning circulates between state values such as 010-01B.
10. state device as claimed in claim 9 is characterized in that, when described input signal is that the present condition value signal was transformed into 110, and beginning circulates between state values such as 110-11B when moved the second time between the 010-015 state value at the present condition value signal.
11. state device as claimed in claim 9 is characterized in that, when described input signal moved between present condition value signal 016-01B state for the second time, the present condition value signal was transformed into 010, and circulates between state values such as 010-01B again.
12. state device as claimed in claim 10 is characterized in that, when described input signal before present condition value signal 11B, do not contain 11B, when moving again, the present condition value signal is transformed into 110, and circulates between state values such as 110-11B again.
13. state device as claimed in claim 10 is characterized in that, when described input signal before the present condition value signal is 11B, do not contain 11B, all again the action, then the present condition value is transformed into 000, and circulates between state values such as 000-00B again.
CN93116475A 1993-08-19 1993-08-19 Frequency state discriminating device with hysteresis Expired - Fee Related CN1057649C (en)

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CN1057649C true CN1057649C (en) 2000-10-18

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86105323A (en) * 1986-08-29 1987-12-09 陈策沾 Full-automatic electric shock safety equipment
CN1051465A (en) * 1989-11-02 1991-05-15 孙东红 A kind of general protective circuit for electric motor
CN1016033B (en) * 1987-08-07 1992-03-25 三井石油化学工业株式会社 Signal discriminator and method of signal discrimination

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86105323A (en) * 1986-08-29 1987-12-09 陈策沾 Full-automatic electric shock safety equipment
CN1016033B (en) * 1987-08-07 1992-03-25 三井石油化学工业株式会社 Signal discriminator and method of signal discrimination
CN1051465A (en) * 1989-11-02 1991-05-15 孙东红 A kind of general protective circuit for electric motor

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