CN105760189B - A kind of FPGA configuration data download apparatus and method - Google Patents
A kind of FPGA configuration data download apparatus and method Download PDFInfo
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- CN105760189B CN105760189B CN201610066788.5A CN201610066788A CN105760189B CN 105760189 B CN105760189 B CN 105760189B CN 201610066788 A CN201610066788 A CN 201610066788A CN 105760189 B CN105760189 B CN 105760189B
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Abstract
This application provides a kind of FPGA configuration data download apparatus and method, FPGA configuration data download apparatus includes: ZigBee control circuit, switching circuit, FPGA circuitry and configuration chip；First control terminal of ZigBee control circuit is connected with the first end of switching circuit, and the second control terminal of ZigBee control circuit is connected with FPGA circuitry, and the output end of ZigBee control circuit is connected with the second end of switching circuit；The third end of switching circuit is connected with configuration chip, and the 4th end of switching circuit is connected with FPGA circuitry.In this application, due to no longer needing to connect external data downloading wire, therefore it no longer needs to carry out largely to work in certain particular arrangement data downloading occasion to carry out the connection of external data downloading wire, reduce workload, so as to shorten the total time of FPGA configuration data downloading, improves FPGA configuration data and update efficiency.
Description
Technical field
This application involves FPGA technology field, in particular to a kind of FPGA configuration data download apparatus and method.
Background technique
Currently, carrying out configuration number to FPGA (field programmable gate array, Field Programmable Gate Array)
It is most of using connecting external data downloading wire by the way of according to updating, especially by connecting external data downloading wire for configuration data
It is downloaded to the configuration chip of FPGA, corresponding configuration data is read from configuration chip by FPGA, completes to update.
But certain particular arrangement data download occasion (such as the equipment of built-in FPGA be mounted on higher position or
It is mounted on large-scale interior of equipment cabinet), staff's FPGA data not easy to operate to equipment downloads mouth, arrives equipment to operation
FPGA data downloads mouth, completes the connection of external data downloading wire, and staff is needed largely to be worked (for example, climbing
Dismantled to higher position or to the device in large-scale cabinet to operate to FPGA data and download mouth), extend FPGA configuration
The total time of data downloading, FPGA configuration data is caused to update low efficiency.
Summary of the invention
In order to solve the above technical problems, the embodiment of the present application provides a kind of FPGA configuration data download apparatus and method, with
Reach reduction workload, so as to shorten the total time of FPGA configuration data downloading, improves the mesh that FPGA configuration data updates efficiency
, technical solution is as follows:
A kind of on-site programmable gate array FPGA configuration data download apparatus, comprising: purple honeybee ZigBee control circuit, switching
Circuit, FPGA circuitry and configuration chip；
First control terminal of the ZigBee control circuit is connected with the first end of the switching circuit, the ZigBee control
Second control terminal of circuit processed is connected with the FPGA circuitry, the output end of the ZigBee control circuit and the switching circuit
Second end be connected；
The third end of the switching circuit is connected with the configuration chip, the 4th end of the switching circuit and the FPGA
Circuit is connected；
The ZigBee control circuit is carried out for receiving ZigBee wireless signal, and to the ZigBee wireless signal
Parsing abandons the ZigBee wireless signal if parsing in the ZigBee wireless signal without containing FPGA configuration data,
If parsing in the ZigBee wireless signal and containing FPGA configuration data, controls the switching circuit and control the ZigBee
Connection is connected with the configuration chip in circuit processed, and the FPGA configuration data is transmitted to the configuration by the switching circuit
Chip controls the switching circuit for the FPGA circuitry and the configuration after by the FPGA configuration data end of transmission
Chip conducting connection, and reset signal is sent to the FPGA circuitry, so that the FPGA circuitry is read from the configuration chip
Take the FPGA configuration data；
The switching circuit, for by switching realize it is described configuration chip and the ZigBee control circuit connection or
The connection of the FPGA circuitry and the configuration chip；
The configuration chip, for storing the FPGA configuration data.
Preferably, the ZigBee control circuit includes: printing board PCB antenna, ZigBee controller and impedance electricity
Road；
The PCB antenna is connected with the first end of the impedance circuit, the second end of the impedance circuit with it is described
The RF radio frequency Peripheral Interface of ZigBee controller is connected.
Preferably, the switching circuit include: the first relay, the second relay, third relay, the 4th relay,
First metal-oxide-semiconductor, the second metal-oxide-semiconductor, third metal-oxide-semiconductor and the 4th metal-oxide-semiconductor；
The grid of first metal-oxide-semiconductor, the grid of second metal-oxide-semiconductor, the third metal-oxide-semiconductor grid and the described 4th
First end of the grid of metal-oxide-semiconductor as the switching circuit is connected with the first control terminal of the ZigBee control circuit；
The first end of first relay is connected with the first pin of the spi bus interface of the ZigBee controller,
The first end of second relay is connected with the second pin of the spi bus interface of the ZigBee controller, the third
The first end of relay is connected with the third pin of the spi bus interface of the ZigBee controller, the 4th relay
First end is connected with the 4th pin of the spi bus interface of the ZigBee controller；
The first end of first relay, the first end of second relay, the first end of the third relay
Second end with the first end of the 4th relay as the switching circuit；
The spi bus interface of first pin of the spi bus interface of the ZigBee controller, the ZigBee controller
The second pin, the ZigBee controller spi bus interface third pin and the ZigBee controller spi bus
Output end of 4th pin of interface as the ZigBee control circuit；
First pin of the spi bus interface of the second end and FPGA circuitry of first relay is connected, described
The second end of second relay is connected with the second pin of the spi bus interface of the FPGA circuitry, the third relay
Second end is connected with the third pin of the spi bus interface of the FPGA circuitry, the second end of the 4th relay with it is described
4th pin of the spi bus interface of FPGA circuitry is connected；
The third end of first relay is connected with the drain electrode of first metal-oxide-semiconductor, the third of second relay
End is connected with the drain electrode of second metal-oxide-semiconductor, and the third end of the third relay is connected with the drain electrode of the third metal-oxide-semiconductor,
The third end of 4th relay is connected with the drain electrode of the 4th metal-oxide-semiconductor；
4th end of first relay, the 4th end of second relay, the third relay the 4th end
It is connected with power supply with the 4th end of the 4th relay；
5th end of first relay is connected with the first pin of the spi bus interface of the configuration chip, described
5th end of the second relay is connected with the second pin of the spi bus interface of the configuration chip, the third relay
5th end is connected with the third pin of spi bus interface of the configuration chip, the 5th end of the 4th relay with it is described
The 4th pin for configuring the spi bus interface of chip is connected；
The source electrode of first metal-oxide-semiconductor, the source electrode of second metal-oxide-semiconductor, the third metal-oxide-semiconductor source electrode and the described 4th
The source electrode of metal-oxide-semiconductor is grounded respectively.
Preferably, the impedance circuit include: first capacitor, the second capacitor, third capacitor, the 4th capacitor, the 5th capacitor,
First inductance coil and the second inductance coil；
First end of the first end of the third capacitor as the impedance circuit, is connected with the PCB antenna, and described
The second end of three capacitors is connected with the first end of the first end of second capacitor and second inductance coil respectively；
The second end of second capacitor respectively with the first end of first inductance coil and the first capacitor
One end is connected；
The second end of second inductance coil respectively with the first end of the 4th capacitor and the 5th capacitor
One end is connected；
The second end of the second end of the first capacitor and the second end of the 4th capacitor as the impedance circuit, with
The RF radio frequency Peripheral Interface of the ZigBee controller is connected；
The second end of first inductance coil is grounded, the second end ground connection of the 5th capacitor.
Preferably, the ZigBee controller is the CC2530 chip of TI company.
Preferably, first relay, second relay, the third relay and the 4th relay are equal
For the relay of Omron Corp's G5V-1-DC3 model.
Preferably, first metal-oxide-semiconductor, second metal-oxide-semiconductor, the third metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are IR
The metal-oxide-semiconductor of company's IRLML6401 model.
A kind of FPGA configuration data method for down loading is used for FPGA configuration data download apparatus, under the FPGA configuration data
Carry set include: ZigBee control circuit, switching circuit, FPGA circuitry and configuration chip, which comprises
The ZigBee control circuit receives ZigBee wireless signal；
The ZigBee control circuit parses the ZigBee wireless signal；
If parsing in the ZigBee wireless signal without containing FPGA configuration data, the ZigBee wireless communication is abandoned
Number；
If parsing in the ZigBee wireless signal and containing FPGA configuration data, controlling the switching circuit will be described
Connection is connected with the configuration chip in ZigBee control circuit, and is transmitted the FPGA configuration data by the switching circuit
To the configuration chip；
The ZigBee control circuit after the FPGA configuration data end of transmission, will control the switching circuit will be described
Connection is connected with the configuration chip in FPGA circuitry, and sends reset signal to the FPGA circuitry, so that the FPGA circuitry
The FPGA configuration data is read from the configuration chip.
Compared with prior art, the application has the beneficial effect that
In this application, the FPGA configuration data download apparatus provided by the way of ZigBee wireless transmission, take by reception
ZigBee wireless signal with FPGA configuration data, realizes the update to FPGA configuration data.
Due to no longer needing to connect external data downloading wire, no longer needed in certain particular arrangement data downloading occasion
A large amount of work is carried out to carry out the connection of external data downloading wire, reduces workload, so as to shorten FPGA configuration data
It the total time of downloading improves FPGA configuration data and updates efficiency.
Detailed description of the invention
In order to more clearly explain the technical solutions in the embodiments of the present application, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the drawings in the following description are only some examples of the present application, for
For those of ordinary skill in the art, without any creative labor, it can also be obtained according to these attached drawings
His attached drawing.
Fig. 1 is a kind of logical construction schematic diagram of FPGA configuration data download apparatus provided by the present application；
Fig. 2 is a kind of logical construction schematic diagram of ZigBee control circuit provided by the present application；
Fig. 3 is a kind of electronic schematic diagram of switching circuit provided by the present application；
Fig. 4 is a kind of electronic schematic diagram of ZigBee control circuit provided by the present application；
Fig. 5 is a kind of flow chart of FPGA configuration data method for down loading provided by the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
Embodiment one
Referring to Figure 1, it illustrates a kind of signals of logical construction of FPGA configuration data download apparatus provided by the present application
Figure, FPGA configuration data download apparatus include: ZigBee (purple honeybee) control circuit 11, switching circuit 12, FPGA circuitry 13 and match
Set chip 14.
First control terminal of ZigBee control circuit 11 is connected with the first end of switching circuit 12, ZigBee control circuit 11
The second control terminal be connected with FPGA circuitry 13, the output end and the second end phase of switching circuit 12 of ZigBee control circuit 11
Even.
The third end of switching circuit 12 is connected with configuration chip 14, the 4th end and 13 phase of FPGA circuitry of switching circuit 12
Even.
ZigBee control circuit 11 is solved for receiving ZigBee wireless signal, and to the ZigBee wireless signal
Analysis abandons the ZigBee wireless signal if parsing in the ZigBee wireless signal without containing FPGA configuration data, if
It parses in the ZigBee wireless signal and contains FPGA configuration data, then control switching circuit 12 for ZigBee control circuit 11
It is connected with the configuration conducting of chip 14, FPGA configuration data is transmitted to by configuration chip 14 by switching circuit 12, is matched by FPGA
After setting data end of transmission, control switching circuit 12 connects FPGA circuitry 13 and the configuration conducting of chip 14, and sends reset letter
Number to FPGA circuitry 13, so that FPGA circuitry 13 reads the FPGA configuration data from configuration chip 14.
Switching circuit 12, for realizing connection or the FPGA electricity of configuration chip 14 and ZigBee control circuit 11 by switching
The connection on road 13 and configuration chip 14.
Chip 14 is configured, for storing FPGA configuration data.
In this application, the FPGA configuration data download apparatus provided by the way of ZigBee wireless transmission, take by reception
ZigBee wireless signal with FPGA configuration data, realizes the update to FPGA configuration data.
Due to no longer needing to connect external data downloading wire, no longer needed in certain particular arrangement data downloading occasion
A large amount of work is carried out to carry out the connection of external data downloading wire, reduces workload, so as to shorten FPGA configuration data
It the total time of downloading improves FPGA configuration data and updates efficiency.
Further, when carrying out FPGA configuration data downloading using FPGA configuration data download apparatus provided by the present application,
Other functional circuits (such as CPU, DSP, Ethernet) relevant to FPGA circuitry 13 will not be occupied, guarantee system belonging to FPGA circuitry 13
The reliable operation of system.
In the present embodiment, ZigBee control circuit 11 specifically includes: PCB (printed circuit board, Printed Circuit
Board) antenna 111, ZigBee controller U1 and impedance circuit 112, as shown in Figure 2.
PCB antenna 111 is connected with the first end of the impedance circuit 112, the second end of the impedance circuit 112 with it is described
The RF radio frequency Peripheral Interface of ZigBee controller U1 is connected.
Wherein, RF radio frequency Peripheral Interface includes RF_P pin and RF_N pin.
PCB antenna 111, as receiving terminal and sending terminal, for receiving ZigBee wireless signal.
ZigBee controller U1, the ZigBee wireless signal for receiving to PCB antenna 111 parse, if parsing
FPGA configuration data is not contained in the ZigBee wireless signal out, then the ZigBee wireless signal is abandoned, if parsing institute
State and contain FPGA configuration data in ZigBee wireless signal, then control the switching circuit 12 by ZigBee control circuit 11 with match
The conducting connection of chip 14 is set, the FPGA configuration data is transmitted to by the configuration chip 14 by the switching circuit 12,
After the FPGA configuration data end of transmission, controls the switching circuit 12 and connect FPGA circuitry 13 and the configuration conducting of chip 14
It connects, and sends reset signal to the FPGA circuitry 13, so that the FPGA circuitry 13 reads institute from the configuration chip 14
State FPGA configuration data.
Impedance circuit 112 is adjusted for the impedance to ZigBee control circuit 11, and guarantee carries FPGA configuration number
According to ZigBee wireless signal be able to carry out most effective transmission.Impedance circuit 112 is specifically by the resistance of ZigBee control circuit 11
It is anti-to be adjusted to 50 ohm, while needing to guarantee that 111 impedance of PCB antenna is 50 ohm.
In the present embodiment, by PCB antenna 111, impedance circuit 112, ZigBee controller U1, switching circuit 12,
When FPGA circuitry 13, configuration chip 14 are collectively arranged on same circuit board, PCB antenna 111 can be arranged in circuit board
Edge.
In above-mentioned FPGA configuration data download apparatus, switching circuit 12 be can specifically include: the first relay RL1,
Two relay RL2, third relay RL3, the 4th relay RL4, the first metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor Q2, third metal-oxide-semiconductor Q3 and
4th metal-oxide-semiconductor Q4.
The grid of the first metal-oxide-semiconductor Q1, the grid of the second metal-oxide-semiconductor Q2, the grid of the third metal-oxide-semiconductor Q3 and institute
State first end of the grid of the 4th metal-oxide-semiconductor Q4 as the switching circuit 12, first with the ZigBee control circuit 11
Control terminal P1 is connected.
First pipe of the spi bus interface of the first end 10 of the first relay RL1 and the ZigBee controller U1
Foot MI is connected, the second pipe of the spi bus interface of the first end 10 of the second relay RL2 and the ZigBee controller U1
Foot C is connected, the third pipe of the spi bus interface of the first end 10 of the third relay RL3 and the ZigBee controller U1
Foot SS is connected, the 4th pipe of the spi bus interface of the first end 10 of the 4th relay RL4 and the ZigBee controller U1
Foot MO is connected.
The first end 10 of the first relay RL1, the first end 10 of the second relay RL2, the third relay
The second end of the first end 10 of device RL3 and the first end 10 of the 4th relay RL4 as the switching circuit 12；It is described
The second of the spi bus interface of first pin MI of the spi bus interface of ZigBee controller U1, the ZigBee controller U1
The SPI of the third pin SS of the spi bus interface of pin C, the ZigBee controller U1 and the ZigBee controller U1 are total
Output end of the 4th pin MO of line interface as ZigBee control circuit 11.
First pin DATA of the spi bus interface of the second end 1 and FPGA circuitry 13 of the first relay RL1
It is connected, the second end 1 and the second pin DCLK phase of the spi bus interface of the FPGA circuitry 13 of the second relay RL2
Even, the second end 1 of the third relay RL3 is connected with the third pin nCSO of the spi bus interface of the FPGA circuitry 13,
The second end 1 of the 4th relay RL4 is connected with the 4th pin ASDO of the spi bus interface of the FPGA circuitry 13.
The third end 9 of the first relay RL1 is connected with the drain electrode of the first metal-oxide-semiconductor Q1, second relay
The third end 9 of RL2 is connected with the drain electrode of the second metal-oxide-semiconductor Q2, the third end 9 of the third relay RL3 and the third
The drain electrode of metal-oxide-semiconductor Q3 is connected, and the third end 9 of the 4th relay RL4 is connected with the drain electrode of the 4th metal-oxide-semiconductor Q4.
The 4th end 2, the 4th end 2 of the second relay RL2, the third relay of the first relay RL1
The 4th end 2 of RL3 and the 4th end 2 of the 4th relay RL4 are connected with power supply 3.3V.
The first pin DATA at the 5th end 6 of the first relay RL1 and the spi bus interface of the configuration chip 14
It is connected, the second pin DCLK phase at the 5th end 6 of the second relay RL2 and the spi bus interface of the configuration chip 14
Even, the 5th end 6 of the third relay RL3 is connected with the third pin nCS of the spi bus interface of the configuration chip 14,
The 5th end 6 of the 4th relay RL4 is connected with the 4th pin ASDI of the spi bus interface of the configuration chip 14.
The source electrode of the first metal-oxide-semiconductor Q1, the source electrode of the second metal-oxide-semiconductor Q2, the source electrode of the third metal-oxide-semiconductor Q3 and institute
The source electrode for stating the 4th metal-oxide-semiconductor Q4 is grounded respectively.
Fig. 2 and Fig. 3 are referred to, the principle of ZigBee control circuit 11 and switching circuit 12 is illustrated, specific as follows:
ZigBee controller U1 parses the ZigBee wireless signal that PCB antenna 111 receives, if parsing described
FPGA configuration data is not contained in ZigBee wireless signal, then abandons the ZigBee wireless signal, if parsing described
Contain FPGA configuration data in ZigBee wireless signal, the second control terminal P2 is set height first by ZigBee controller U1, to inform
FPGA circuitry 13ZigBee controller U1 will update the message of configuration data.Meanwhile ZigBee controller U1 is controlled first
End P1 sets height, makes the first metal-oxide-semiconductor, the second metal-oxide-semiconductor Q2, third metal-oxide-semiconductor Q3 and the 4th metal-oxide-semiconductor Q4 conducting, the first metal-oxide-semiconductor Q1, the
Two metal-oxide-semiconductor Q2, third metal-oxide-semiconductor Q3 and the 4th metal-oxide-semiconductor Q4 are connected so that the first relay RL1, the second relay RL2, third after
The 3.3V of electric appliance RL3 and the 4th relay RL4 are for conducting, the first relay RL1, the second relay RL2, third relay
RL3 and the 4th relay RL4 are attracted.First relay RL1, the second relay RL2, third relay RL3 and the 4th relay
After device RL4 is attracted, the spi bus that four pins of the spi bus interface of configuration chip 14 are switched to ZigBee controller U1 is connect
Four pins (i.e. spi bus of the first pin DATA and ZigBee controller U1 of the spi bus interface of configuration chip 14 of mouth
First pin MI of interface is connected, and configures the second pin DCLK's and ZigBee controller U1 of the spi bus interface of chip 14
Second pin C of spi bus interface is connected, and configures the third pin nCS and ZigBee controller of the spi bus interface of chip 14
The third pin SS of the spi bus interface of U1 is connected, and configures the 4th pin ASDI and ZigBee of the spi bus interface of chip 14
4th pin MO of the spi bus interface of controller U1 is connected), ZigBee controller U1 is by spi bus, by what is received
FPGA configuration data is sent to configuration chip 14.
After by the FPGA configuration data end of transmission, ZigBee controller U1 is controlled ZigBee controller U1 by second
End P2 is set low, and the signal that the second control terminal P2 is set low notifies 13 configuration data of FPGA circuitry updates to complete as reset signal,
FPGA circuitry 13 can be restarted when receiving the second control terminal P2 and setting low signal, run new configuration data.FPGA electricity
While road 13 is restarted, ZigBee controller U1 sets low the first control terminal P1, makes the first metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor
Q2, third metal-oxide-semiconductor Q3 and the 4th metal-oxide-semiconductor Q4 are not turned on, the first relay RL1, the second relay RL2, third relay RL3 and
4th relay RL4 power-off, the SPI that four pins for configuring the spi bus interface of chip 14 are switched to FPGA circuitry 13 are total
Four pins (i.e. spi bus of the first pin DATA and FPGA circuitry 13 of the spi bus interface of configuration chip 14 of line interface
First pin DATA of interface is connected, and configures the SPI of the second pin DCLK and FPGA circuitry 13 of the spi bus interface of chip 14
Second pin DCLK of bus interface is connected, and configures the third pin nCS and FPGA circuitry 13 of the spi bus interface of chip 14
The third pin nCSO of spi bus interface is connected, and configures the 4th pin ASDI and FPGA circuitry of the spi bus interface of chip 14
4th pin ASDO of 13 spi bus interface is connected), so that FPGA circuitry 13 is read new FPGA from configuration chip 14 and matches
Set data.
Explanation need to be used, when being updated without FPGA configuration data, the first relay RL1, the second relay RL2,
Third relay RL3 and the 4th relay RL4 is often in off-position, is connected between FPGA circuitry 13 and configuration chip 14.
In the present embodiment, Fig. 2 shows the specific structure of impedance circuit 112 may refer to Fig. 4, impedance circuit 112 wraps
It includes: first capacitor C1, the second capacitor C2, third capacitor C3, the 4th capacitor C4, the 5th capacitor C5, the first inductance coil L1 and
Two inductance coil L2.
First end of the first end of the third capacitor C3 as the impedance circuit 112, with 111 phase of PCB antenna
Even, the second end of the third capacitor C3 respectively with the first end of the second capacitor C2 and the second inductance coil L2 the
One end is connected.
The second end of the second capacitor C2 first end and the first capacitor with the first inductance coil L1 respectively
The first end of C1 is connected.
The second end of the second inductance coil L2 respectively with the first end of the 4th capacitor C4 and the 5th capacitor
The first end of C5 is connected.
The second end of the first capacitor C1 and the second end of the 4th capacitor C4 as the impedance circuit 112
Two ends are connected with the RF radio frequency Peripheral Interface of the ZigBee controller U1.
The second end of the first inductance coil L1 is grounded, the second end ground connection of the 5th capacitor C5.
In above-mentioned FPGA configuration data download apparatus, ZigBee controller U1 is specifically as follows the CC2530 core of TI company
Piece.The CC2530 chip of TI company has RF radio frequency Peripheral Interface and spi bus interface, has the characteristics that low-power consumption.
First relay RL1, the second relay RL2, the third relay RL3 and the 4th relay RL4
All can be Omron Corp's G5V-1-DC3 model relay.Wherein, the relay of Omron Corp G5V-1-DC3 model
Have the characteristics that small in size, high sensitivity and coil power are low.
First metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor Q2, the third metal-oxide-semiconductor Q3 and the 4th metal-oxide-semiconductor Q4 all can be
The metal-oxide-semiconductor of IR company IRLML6401 model.
In the present embodiment, the ZigBee controller U1 in FPGA configuration data download apparatus uses the CC2530 of TI company
The relay of chip, the PCB antenna 111 of low cost and Omron Corp's G5V-1-DC3 model, is effectively controlled cost,
And reduce the power consumption of circuit.
Embodiment two
In the present embodiment, a kind of FPGA configuration data method for down loading is provided, for the FPGA configuration shown in embodiment one
Data download apparatus, refers to Fig. 5, and it may include following that it illustrates a kind of flow charts of FPGA configuration data method for down loading
Step:
Step S51:ZigBee control circuit receives ZigBee wireless signal.
Step S52:ZigBee control circuit parses the ZigBee wireless signal.
Step S53: FPGA configuration data is not contained in the ZigBee wireless signal if parsing, described in discarding
ZigBee wireless signal.
Step S54: containing FPGA configuration data if parsing in the ZigBee wireless signal, controls the switching electricity
Connection is connected with the configuration chip in the ZigBee control circuit by road, and is configured the FPGA by the switching circuit
Data are transmitted to the configuration chip.
Step S55:ZigBee control circuit after the FPGA configuration data end of transmission, will control the switching circuit will
Connection is connected with the configuration chip in the FPGA circuitry, and sends reset signal to the FPGA circuitry, so that the FPGA
Circuit reads the FPGA configuration data from the configuration chip.
It should be noted that all the embodiments in this specification are described in a progressive manner, each embodiment weight
Point explanation is the difference from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
For device class embodiment, since it is basically similar to the method embodiment, so being described relatively simple, related place ginseng
See the part explanation of embodiment of the method.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that the process, method, article or equipment for including a series of elements not only includes that
A little elements, but also including other elements that are not explicitly listed, or further include for this process, method, article or
The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged
Except there is also other identical elements in the process, method, article or apparatus that includes the element.
A kind of FPGA configuration data download apparatus provided herein and method are described in detail above, herein
In apply specific case the principle and implementation of this application are described, the explanation of above example is only intended to sides
Assistant solves the present processes and its core concept；At the same time, for those skilled in the art, the think of according to the application
Think, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be construed as pair
The limitation of the application.
Claims (6)
1. a kind of on-site programmable gate array FPGA configuration data download apparatus characterized by comprising purple honeybee ZigBee control
Circuit, switching circuit, FPGA circuitry and configuration chip；
First control terminal of the ZigBee control circuit is connected with the first end of the switching circuit, the ZigBee control electricity
Second control terminal on road is connected with the FPGA circuitry, and the of the output end of the ZigBee control circuit and the switching circuit
Two ends are connected；
The third end of the switching circuit is connected with the configuration chip, the 4th end of the switching circuit and the FPGA circuitry
It is connected；
The ZigBee control circuit is parsed for receiving ZigBee wireless signal, and to the ZigBee wireless signal,
If parsing in the ZigBee wireless signal without containing FPGA configuration data, the ZigBee wireless signal is abandoned, if solution
It is precipitated in the ZigBee wireless signal and contains FPGA configuration data, then control the switching circuit for the ZigBee and control electricity
Connection is connected with the configuration chip in road, and the FPGA configuration data is transmitted to the configuration core by the switching circuit
Piece controls the switching circuit for the FPGA circuitry and the configuration core after by the FPGA configuration data end of transmission
Piece conducting connection, and reset signal is sent to the FPGA circuitry, so that the FPGA circuitry is read from the configuration chip
The FPGA configuration data；
The switching circuit, for realizing the configuration chip and the connection of the ZigBee control circuit or described by switching
The connection of FPGA circuitry and the configuration chip；
The configuration chip, for storing the FPGA configuration data；
The ZigBee control circuit includes: printing board PCB antenna, ZigBee controller and impedance circuit；
The PCB antenna is connected with the first end of the impedance circuit, and the second end of the impedance circuit and the ZigBee are controlled
The RF radio frequency Peripheral Interface of device processed is connected；
The switching circuit includes: the first relay, the second relay, third relay, the 4th relay, the first metal-oxide-semiconductor,
Two metal-oxide-semiconductors, third metal-oxide-semiconductor and the 4th metal-oxide-semiconductor；
The grid of first metal-oxide-semiconductor, the grid of second metal-oxide-semiconductor, the third metal-oxide-semiconductor grid and the 4th MOS
First end of the grid of pipe as the switching circuit is connected with the first control terminal of the ZigBee control circuit；
The first end of first relay is connected with the first pin of the spi bus interface of the ZigBee controller, described
The first end of second relay is connected with the second pin of the spi bus interface of the ZigBee controller, the third relay
The first end of device is connected with the third pin of the spi bus interface of the ZigBee controller, and the first of the 4th relay
End is connected with the 4th pin of the spi bus interface of the ZigBee controller；
The first end of first relay, the first end of second relay, the first end of the third relay and institute
State second end of the first end of the 4th relay as the switching circuit；
First pin of the spi bus interface of the ZigBee controller, the ZigBee controller spi bus interface
Two pins, the ZigBee controller spi bus interface third pin and the ZigBee controller spi bus interface
Output end of the 4th pin as the ZigBee control circuit；
First pin of the spi bus interface of the second end and FPGA circuitry of first relay is connected, and described second
The second end of relay is connected with the second pin of the spi bus interface of the FPGA circuitry, and the second of the third relay
End is connected with the third pin of the spi bus interface of the FPGA circuitry, the second end of the 4th relay and the FPGA
4th pin of the spi bus interface of circuit is connected；
The third end of first relay is connected with the drain electrode of first metal-oxide-semiconductor, the third end of second relay with
The drain electrode of second metal-oxide-semiconductor is connected, and the third end of the third relay is connected with the drain electrode of the third metal-oxide-semiconductor, described
The third end of 4th relay is connected with the drain electrode of the 4th metal-oxide-semiconductor；
The 4th end, the 4th end of second relay, the 4th end of the third relay and the institute of first relay
The 4th end for stating the 4th relay is connected with power supply；
5th end of first relay is connected with the first pin of the spi bus interface of the configuration chip, and described second
5th end of relay is connected with the second pin of the spi bus interface of the configuration chip, and the 5th of the third relay the
It holds and is connected with the third pin of the spi bus interface of the configuration chip, the 5th end of the 4th relay and the configuration
4th pin of the spi bus interface of chip is connected；
The source electrode of first metal-oxide-semiconductor, the source electrode of second metal-oxide-semiconductor, the third metal-oxide-semiconductor source electrode and the 4th MOS
The source electrode of pipe is grounded respectively.
2. the apparatus according to claim 1, which is characterized in that the impedance circuit include: first capacitor, the second capacitor,
Third capacitor, the 4th capacitor, the 5th capacitor, the first inductance coil and the second inductance coil；
First end of the first end of the third capacitor as the impedance circuit, is connected with the PCB antenna, the third electricity
The second end of appearance is connected with the first end of the first end of second capacitor and second inductance coil respectively；
The second end of second capacitor first end with the first end of first inductance coil and the first capacitor respectively
It is connected；
The second end of second inductance coil first end with the first end of the 4th capacitor and the 5th capacitor respectively
It is connected；
The second end of the second end of the first capacitor and the second end of the 4th capacitor as the impedance circuit, and it is described
The RF radio frequency Peripheral Interface of ZigBee controller is connected；
The second end of first inductance coil is grounded, the second end ground connection of the 5th capacitor.
3. the apparatus according to claim 1, which is characterized in that the ZigBee controller is the CC2530 core of TI company
Piece.
4. the apparatus according to claim 1, which is characterized in that first relay, second relay, described
Three relays and the 4th relay are the relay of Omron Corp's G5V-1-DC3 model.
5. the apparatus according to claim 1, which is characterized in that first metal-oxide-semiconductor, second metal-oxide-semiconductor, the third
Metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are the metal-oxide-semiconductor of IR company IRLML6401 model.
6. a kind of FPGA configuration data method for down loading, which is characterized in that be used for FPGA configuration data download apparatus, the FPGA matches
Setting data download apparatus includes: ZigBee control circuit, switching circuit, FPGA circuitry and configuration chip, the ZigBee control
Circuit includes: printing board PCB antenna, ZigBee controller and impedance circuit；The PCB antenna and the impedance circuit
First end is connected, and the second end of the impedance circuit is connected with the RF radio frequency Peripheral Interface of the ZigBee controller；It is described to cut
Changing circuit includes: the first relay, the second relay, third relay, the 4th relay, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor,
Three metal-oxide-semiconductors and the 4th metal-oxide-semiconductor；The grid of first metal-oxide-semiconductor, the grid of second metal-oxide-semiconductor, the third metal-oxide-semiconductor grid
First end of the grid of pole and the 4th metal-oxide-semiconductor as the switching circuit, first with the ZigBee control circuit
Control terminal is connected；First pin phase of the first end of first relay and the spi bus interface of the ZigBee controller
Even, the first end of second relay is connected with the second pin of the spi bus interface of the ZigBee controller, and described the
The first end of three relays is connected with the third pin of the spi bus interface of the ZigBee controller, the 4th relay
First end be connected with the 4th pin of the spi bus interface of the ZigBee controller；The first end of first relay,
Described in the first end of the first end of second relay, the first end of the third relay and the 4th relay is used as
The second end of switching circuit；First pin of the spi bus interface of the ZigBee controller, the ZigBee controller
Second pin of spi bus interface, the ZigBee controller spi bus interface third pin and the ZigBee control
Output end of 4th pin of the spi bus interface of device as the ZigBee control circuit；The second of first relay
End is connected with the first pin of the spi bus interface of the FPGA circuitry, the second end of second relay and the FPGA
Second pin of the spi bus interface of circuit is connected, the second end of the third relay and the spi bus of the FPGA circuitry
The third pin of interface is connected, the 4th pipe of the spi bus interface of the second end and FPGA circuitry of the 4th relay
Foot is connected；The third end of first relay is connected with the drain electrode of first metal-oxide-semiconductor, the third end of second relay
It is connected with the drain electrode of second metal-oxide-semiconductor, the third end of the third relay is connected with the drain electrode of the third metal-oxide-semiconductor, institute
The third end for stating the 4th relay is connected with the drain electrode of the 4th metal-oxide-semiconductor；4th end of first relay, described second
The 4th end, the 4th end of the third relay and the 4th end of the 4th relay of relay are connected with power supply；Institute
The 5th end for stating the first relay is connected with the first pin of the spi bus interface of the configuration chip, second relay
The 5th end be connected with the second pin of spi bus interface of the configuration chip, the 5th end of the third relay and institute
The third pin for stating the spi bus interface of configuration chip is connected, the 5th end of the 4th relay and the configuration chip
4th pin of spi bus interface is connected；The source electrode of first metal-oxide-semiconductor, the source electrode of second metal-oxide-semiconductor, the 3rd MOS
The source electrode of the source electrode of pipe and the 4th metal-oxide-semiconductor is grounded respectively, which comprises
The ZigBee control circuit receives ZigBee wireless signal；
The ZigBee control circuit parses the ZigBee wireless signal；
If parsing in the ZigBee wireless signal without containing FPGA configuration data, the ZigBee wireless signal is abandoned；
If parsing in the ZigBee wireless signal and containing FPGA configuration data, controlling the switching circuit will be described
Connection is connected with the configuration chip in ZigBee control circuit, and is transmitted the FPGA configuration data by the switching circuit
To the configuration chip；
The ZigBee control circuit controls the switching circuit for the FPGA for after the FPGA configuration data end of transmission
Connection is connected with the configuration chip in circuit, and sends reset signal to the FPGA circuitry, so that the FPGA circuitry is from institute
It states in configuration chip and reads the FPGA configuration data.
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| CN101673101A (en) * | 2009-09-27 | 2010-03-17 | 电子科技大学 | On-line programming FPGA reconfigurable device |
| CN102609286A (en) * | 2012-02-10 | 2012-07-25 | 株洲南车时代电气股份有限公司 | System for updating FPGA (Field Programmable Gate Array) configuration program from a long distance based on control of processor and method therefor |
| CN102609287A (en) * | 2012-02-10 | 2012-07-25 | 株洲南车时代电气股份有限公司 | Device for updating FPGA (Field Programmable Gate Array) from a long distance by CPU (Central Processing Unit) and method therefor |
| CN102736938A (en) * | 2012-06-18 | 2012-10-17 | 中国电子科技集团公司第十研究所 | Burning method of FPGA (Field Programmable Gate Array) configuration program |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101673101A (en) * | 2009-09-27 | 2010-03-17 | 电子科技大学 | On-line programming FPGA reconfigurable device |
| CN102609286A (en) * | 2012-02-10 | 2012-07-25 | 株洲南车时代电气股份有限公司 | System for updating FPGA (Field Programmable Gate Array) configuration program from a long distance based on control of processor and method therefor |
| CN102609287A (en) * | 2012-02-10 | 2012-07-25 | 株洲南车时代电气股份有限公司 | Device for updating FPGA (Field Programmable Gate Array) from a long distance by CPU (Central Processing Unit) and method therefor |
| CN102736938A (en) * | 2012-06-18 | 2012-10-17 | 中国电子科技集团公司第十研究所 | Burning method of FPGA (Field Programmable Gate Array) configuration program |
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