CN105759517B - Display device - Google Patents
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- CN105759517B CN105759517B CN201410781424.6A CN201410781424A CN105759517B CN 105759517 B CN105759517 B CN 105759517B CN 201410781424 A CN201410781424 A CN 201410781424A CN 105759517 B CN105759517 B CN 105759517B
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- 239000013078 crystal Substances 0.000 claims description 7
- 238000003491 array Methods 0.000 claims description 2
- 230000000007 visual effect Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 230000008771 sex reversal Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008447 perception Effects 0.000 description 1
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
A display device comprises a plurality of data lines, a plurality of scanning lines and at least two pixels, wherein the data lines and the scanning lines jointly define a pixel array, and the pixels are configured in the pixel array and jointly comprise two first sub-pixels, two second sub-pixels and two third sub-pixels. One of the first sub-pixels is arranged in a first direction and comprises a first transistor, the other of the first sub-pixels is arranged in a second direction and comprises a second transistor, one of the second sub-pixels is arranged in the first direction and comprises a third transistor, the other of the second sub-pixels is arranged in the second direction and comprises a fourth transistor, one of the third sub-pixels is arranged in the first direction and comprises a fifth transistor, and the other of the third sub-pixels is arranged in the second direction and comprises a sixth transistor.
Description
Technical field
The present invention is about a kind of display technology, and in particular to a kind of display device.
Background technique
With Progress & New Products, the technology of display device with increasingly progress greatly.General display device uses twisted nematic
(Twisted Nematic, TN) liquid crystal technology is only capable of in 120 degree of level and 90 degree vertical however, for user
The display device using TN technology is watched in angular field of view.
To meet user for the demand of wider angular field of view, in order to which user watches display device, wide viewing angle
Technology (Fringe Field Switching, FFS) is come into being.It is close that user can be provided using the display device of FFS technology
The angular field of view of 180 degree, therefore, display device mostly uses greatly FFS technology now.However, using the display device of FFS technology
Still there are several defects such as colour cast and power consumption, and influence the perception of user.
Summary of the invention
One purpose of the content of present invention is to provide a kind of display device, includes:
Multiple data lines；
Multi-strip scanning line, wherein these data lines and these one pixel arrays of scan line common definition, the pixel array packet
Containing multirow and multiple row, wherein these rows are parallel with these scan lines, these column are parallel with these data lines；And
At least two pixels are configured in the pixel array, these pixels jointly comprise:
Two the first sub-pixels, wherein these first sub-pixels therein one are configured at a first direction and include one first
Transistor, another one is configured at a second direction and includes a second transistor in these first sub-pixels, wherein the first party
To different from the second direction；
Two the second sub-pixels, wherein these second sub-pixels therein one are configured at the first direction and include a third
Transistor, another one is configured at the second direction and includes one the 4th transistor in these second sub-pixels；And
Two third sub-pixels, wherein these third sub-pixels therein one are configured at the first direction and include one the 5th
Transistor, another one is configured at the second direction and includes one the 6th transistor in these third sub-pixels；
Wherein the first transistor, the third transistor and the 5th transistor are configured at the one first of the pixel array
Column；
Wherein the first row includes one first side and a second side, and first side and the second side are located at the phase of the first row
To two sides, wherein the first transistor is configured at first side of the first row, which is configured at the first row
The second side, the 5th transistor are configured at first side of the first row.
Above-mentioned display device, wherein the second transistor, the 4th transistor and the 6th transistor are configured at the picture
One secondary series of pixel array, wherein the secondary series includes one first side and a second side, and first side and the second side are located at should
The opposite sides of secondary series, wherein the second transistor is configured at first side of the secondary series, and the 4th transistor is configured at
The second side of the secondary series, the 6th transistor are configured at first side of the secondary series.
Above-mentioned display device, wherein the first transistor and the second transistor are configured at the one first of the pixel array
Row.
Above-mentioned display device, wherein the first row includes one first side and a second side, first side and the second side
Positioned at the opposite sides of the first row, wherein the first transistor is configured at first side of the first row, the second transistor
It is configured at the second side of the first row.
Above-mentioned display device, wherein the third transistor and the 4th transistor are configured at one second row of the pixel array.
Above-mentioned display device, wherein second row includes one first side and a second side, first side and the second side
Positioned at the opposite sides of second row, wherein the third transistor is configured at first side of second row, the 4th transistor
It is configured at the second side of second row.
Above-mentioned display device, wherein the 5th transistor and the 6th transistor are configured at the third line for the pixel array.
Above-mentioned display device, wherein the third line includes one first side and a second side, first side and the second side
Positioned at the opposite sides of the third line, wherein the 5th transistor is configured at first side of the third line, the 6th transistor
It is configured at the second side of the third line.
Above-mentioned display device, wherein these scan lines include one first scan line to one the 4th scan line, wherein this
Scan line is to the 4th scan line sequential, and wherein first scan line is coupled to the second transistor, second scanning
Line is coupled to the first transistor and the third transistor, which is coupled to the 4th transistor and the 6th crystal
Pipe, the 4th scan line are coupled to the 5th transistor.
Above-mentioned display device, wherein these data lines include one first data line, one second data line and a third number
According to line, wherein first data line, second data line and the third data line sequential, wherein first data line is coupled
In the third transistor, which is coupled to the first transistor, the 4th transistor and the 5th transistor, this
Three data lines are coupled to the second transistor and the 6th transistor.
Therefore, technology contents according to the present invention allow user no matter to see from orientation by providing a kind of display device
See above-mentioned display device, the viewing visual angle of user is all the same and can improve color offset phenomenon.In addition, the pixel of above-mentioned display device
Configuration mode can make its effective area identical, without will affect display device taste and improve bright dark fringe the phenomenon that.Furthermore
By pixel array configuration mode, can make gate drivers only needs to provide the column polarity reversal signal compared with power saving, can be in display
The driving effect of point pole sex reversal is generated on the pixel array of device.
Detailed description of the invention
For above and other purpose, feature, advantage and embodiment of the invention can be clearer and more comprehensible, appended attached drawing is said
It is bright as follows:
Fig. 1 is the schematic diagram that a kind of pixel array of display device is painted according to one embodiment of the invention；
Fig. 2 is the schematic diagram that a kind of pixel array of display device is painted according to another embodiment of the present invention；
Fig. 3 is the circuit box schematic diagram that a kind of display device is painted according to further embodiment of this invention；
Fig. 4 is the partial pixel array that a kind of display device as shown in Figure 3 is painted according to another embodiment of the present invention
Schematic diagram；
Fig. 5 is the partial pixel array that a kind of display device as shown in Figure 3 is painted according to yet another embodiment of the invention
Schematic diagram.
Wherein, appended drawing reference:
100,200,400,400A: pixel array r1: the first row
1000: the r2: the second row of display device
1100: display panel r3: the third line
1200: data driver SP1, SP2: the first sub-pixel
1300: gate drivers SP3, SP4: the second sub-pixel
B: blue sub-pixels SP5, SP6: third sub-pixel
C1: first row T1: the first transistor
C2: secondary series T2: second transistor
D1~Dn: data line T3: third transistor
Dir1: the T4: the four transistor of first direction
Dir2: the T5: the five transistor of second direction
G: the T6: the six transistor of green sub-pixel
G1~Gn: scan line V1, V2: visual angle
R: red sub-pixel
Specific embodiment
Fig. 1 is the schematic diagram that a kind of pixel array 100 of display device is painted according to one embodiment of the invention.As schemed
Show, the configuration mode of pixel array 100 is that all pixels are configured at same direction (1Pixel 1Dimension, 1P1D)
Configuration mode.Such configuration mode can provide the angular field of view of the intimate 180 degree of user, however, since user is in visual angle V1
Viewing angle it is different in the viewing angle of visual angle V2 from user, therefore, the phenomenon that being easy to produce colour cast.
Fig. 2 is the schematic diagram that a kind of pixel array 200 of display device is painted according to another embodiment of the present invention.As schemed
Show, the configuration mode of pixel array 200 be pixel configuration is respectively arranged at both direction (2Pixels2Dimensions,
Configuration mode 2P2D).Such configuration mode can provide the angular field of view of the intimate 180 degree of user, in addition, due to user in
The viewing angle of visual angle V1 is identical in the viewing angle of visual angle V2 as user, and can improve the color offset phenomenon of display device.
Fig. 3 is the circuit box schematic diagram that a kind of display device 1000 is painted according to further embodiment of this invention.As schemed
Show, above-mentioned display device 1000 includes display panel 1100, data driver 1200 and gate drivers 1300.Above-mentioned data are driven
Dynamic device 1200 is coupled to multiple data lines D1~Dn, and above-mentioned gate drivers 1300 are coupled to multi-strip scanning line G1~Gm.This
Outside, display panel 1100 includes multiple pixels, and the configuration mode of above-mentioned pixel please refers to Fig. 4.
Fig. 4 is the partial pixel battle array that a kind of display device 1000 as shown in Figure 3 is painted according to another embodiment of the present invention
The schematic diagram of column 400.As shown, its configuration mode for illustratively showing two pixels in pixel array 400.It is above-mentioned
Pixel jointly comprise two first sub-pixel SP1, SP2, two second sub-pixel SP3, SP4 and two third sub-pixel SP5,
SP6。
On structure configures, data line D1~D3 and the above-mentioned pixel array 400 of scan line G1~G4 common definition, above-mentioned picture
Element is arranged in pixel array 400.This pixel array 400 includes multirow r1~r3 and multiple row c1~c2.Above-mentioned row r1~
R3 is parallel with scan line G1~G4, and above-mentioned column c1~c2 is parallel with data line D1~D3.
In the present embodiment, the first sub-pixel SP1 is configured at first direction Dir1 and includes the first transistor T1, the first son
Pixel SP2 is configured at second direction Dir2 and includes second transistor T2, and above-mentioned first direction Dir1 is different from second direction
Dir2.In addition, the second sub-pixel SP3 is configured at first direction Dir1 and includes third transistor T3, the second sub-pixel SP4 configuration
It in second direction Dir2 and include the 4th transistor T4.Furthermore third sub-pixel SP5 is configured at first direction Dir1 and includes
Five transistor T5, third sub-pixel SP6 are configured at second direction Dir2 and include the 6th transistor T6.
Furthermore above-mentioned the first transistor T1, third transistor T3 and the 5th transistor T5 are configured at the of pixel array 400
One column c1.Above-mentioned first row c1 includes the first side (such as right side) and second side (such as left side), and the first side and second side are located at first
Arrange the opposite sides of c1.Above-mentioned the first transistor T1 is configured at the first side (such as right side) of first row c1, and third transistor T3 matches
It is placed in second side (such as left side) of first row c1, the 5th transistor T5 is configured at the first side of first row c1 (such as right side).
In this way, pixel array 400 based on shown in Fig. 4 uses the configuration mode of 2P2D, it is close except can provide user
Outside the angular field of view of 180 degree, due to user in visual angle V1 viewing angle with user in the viewing angle phase of visual angle V2
Together, the color offset phenomenon of display device 1000 can be improved.On the other hand, due to the first transistor T1, third transistor T3 and
Five transistor T5 use the configuration mode of alternating expression, and are arranged in the two sides of first row c1, and therefore, user watches in visual angle V1
The effective area of pixel array 400 is identical in the visual angle V2 viewing effective area of pixel array 400 as user, and reaching makes picture
The purpose of the two sides effective area homogeneity of pixel array 400.Generally speaking, the pixel battle array of display device 1000 provided by Fig. 4
The configuration mode of column 400 is optimised the color offset phenomenon of display device 1000 and reduces it and sample bad disadvantage, and then promoted
Display taste.
In another embodiment, referring to Fig. 4, second transistor T2, the 4th transistor T4 and the 6th transistor T6 configuration
In the secondary series c2 of pixel array 400, this secondary series c2 includes the first side (such as right side) and second side (such as left side), the first side and
Second side is located at the opposite sides of secondary series c2.Above-mentioned second transistor T2 is configured at the first side (such as right side) of secondary series c2,
4th transistor T4 is configured at second side (such as left side) of secondary series c2, and the 6th transistor T6 is configured at the first side of secondary series c2
(such as right side).
In another embodiment, referring to Fig. 4, the first transistor T1 and second transistor T2 are configured at pixel array 400
The first row r1.On the other hand, aforementioned the first row r1 includes the first side (such as downside) and second side (such as upside), the first side and the
Two sides are located at the opposite sides of the first row r1.Above-mentioned the first transistor T1 is configured at the first side (such as downside) of the first row r1, the
Two-transistor T2 is configured at second side of the first row r1 (such as upside).
In another embodiment, referring to Fig. 4, third transistor T3 and the 4th transistor T4 are configured at pixel array 400
The second row r2.On the other hand, aforementioned second row r2 includes the first side (such as upside) and second side (such as downside), the first side and the
Two sides are located at the opposite sides of the second row r2.Above-mentioned third transistor T3 is configured at the first side (such as upside) of the second row r2, the
Four transistor T4 are configured at second side of the second row r2 (such as downside).
In another embodiment, referring to Fig. 4, the 5th transistor T5 and the 6th transistor T6 are configured at pixel array 400
The third line r3.On the other hand, above-mentioned the third line r3 includes the first side (such as downside) and second side (such as upside), the first side and the
Two sides are located at the opposite sides of the third line r3.Above-mentioned 5th transistor T5 is configured at the first side (such as downside) of the third line r3, the
Six transistor T6 are configured at second side of the third line r3 (such as upside).
In another embodiment, referring to Fig. 4, scan line G1~G4 sequential.Scan line G1 is coupled to the second crystal
Pipe T2, scan line G2 are coupled to the first transistor T1 and third transistor T3, and scan line G3 is coupled to the 4th transistor T4 and
Six transistor T6, scan line G4 are coupled to the 5th transistor T5.
In another embodiment, referring to Fig. 4, data line D1~D3 sequential.Data line D1 is coupled to third crystal
Pipe T3, data line D2 are coupled to the first transistor T1, the 4th transistor T4 and the 5th transistor T5, and data line D3 is coupled to second
Transistor T2 and the 6th transistor T6.
Referring to Fig. 5, Fig. 5 is to be painted a kind of display device 1000 as shown in Figure 3 according to yet another embodiment of the invention
The schematic diagram of partial pixel array 400A.It should be noted that pixel array 400 shown in Fig. 4 is display device of the invention
Base pixel array configuration in 1000, pixel array 400A shown in fig. 5 are the extension configuration mode of Fig. 4 pixel array.By
The state aware of sub-pixel shown in fig. 5, scan line G2 provide the scanning signal of 0V, and scan line G3, which provides the scanning lower than 0V, to be believed
Number, and scan line G4 provides the scanning signal for being higher than 0V, to drive the pixel array 400A of display device 1000.In addition, scanning
Line G5 provides the scanning signal of 0V, and scan line G6 provides the scanning signal for being lower than 0V, and scan line G7 provides the scanning for being higher than 0V
Signal, scanning signal state can the rest may be inferred provided by remaining scan line；Since gate drivers 1300 only need to provide column pole
The signal of sex reversal (Column inversion) therefore not will increase the function of the gate drivers 1300 of display device 1000
Consumption, old friend's pixel array 400,400A particular arrangement mode can make the pixel array 400 of display device 1000,400A generate
The driving effect of point pole sex reversal (Dot inversion).
In conclusion display device provided by the invention, at least has the advantage that and user is allowed no matter to see from orientation
It sees, the viewing visual angle of user is all the same, and can optimize improves color offset phenomenon.In addition, can make it can through pixel configuration mode
The phenomenon that apparent area is identical, improves bright dark fringe.Furthermore by pixel array configuration mode, gate drivers can be made only to need to mention
It, can be in the driving effect for generating point pole sex reversal on the pixel array of display device for the column polarity reversal signal compared with power saving.
Claims (8)
1. a kind of display device, characterized by comprising:
Multiple data lines；
Multi-strip scanning line, wherein these data lines and these one pixel arrays of scan line common definition, the pixel array include more
Capable and multiple row, wherein these rows are parallel with these scan lines, these column are parallel with these data lines；And
At least two pixels are configured in the pixel array, these pixels jointly comprise:
Two the first sub-pixels, wherein these first sub-pixels therein one are configured at a first direction and include a first crystal
Pipe, another one is configured at a second direction and includes a second transistor in these first sub-pixels, and wherein the first direction is not
It is same as the second direction；
Two the second sub-pixels, wherein these second sub-pixels therein one are configured at the first direction and include a third crystal
It manages, another one is configured at the second direction and includes one the 4th transistor in these second sub-pixels；And
Two third sub-pixels, wherein these third sub-pixels therein one are configured at the first direction and include one the 5th crystal
It manages, another one is configured at the second direction and includes one the 6th transistor in these third sub-pixels；
Wherein the first transistor, the third transistor and the 5th transistor are configured at a first row of the pixel array；
Wherein the first row includes one first side and a second side, and first side and the second side are located at opposite the two of the first row
Side, wherein the first transistor is configured at first side of the first row, the third transistor be configured at the first row this
Two sides, the 5th transistor are configured at first side of the first row；
Wherein the first transistor and the second transistor are configured at a first row of the pixel array；
Wherein the first row includes one first side and a second side, and first side and the second side are located at opposite the two of the first row
Side, wherein the first transistor is configured at first side of the first row, the second transistor be configured at the first row this
Two sides.
2. display device as described in claim 1, which is characterized in that wherein the second transistor, the 4th transistor and should
6th transistor is configured at a secondary series of the pixel array, and wherein the secondary series includes one first side and a second side, this
Side and the second side are located at the opposite sides of the secondary series, wherein the second transistor be configured at the secondary series this first
Side, the 4th transistor are configured at the second side of the secondary series, and the 6th transistor is configured at first side of the secondary series.
3. display device as described in claim 1, which is characterized in that the wherein third transistor and the configuration of the 4th transistor
In one second row of the pixel array.
4. display device as claimed in claim 3, which is characterized in that wherein second row includes one first side and one second
Side, first side and the second side are located at the opposite sides of second row, and wherein the third transistor is configured at second row
First side, the 4th transistor are configured at the second side of second row.
5. display device as described in claim 1, which is characterized in that wherein the 5th transistor and the configuration of the 6th transistor
In the third line for the pixel array.
6. display device as claimed in claim 5, which is characterized in that wherein the third line includes one first side and one second
Side, first side and the second side are located at the opposite sides of the third line, and wherein the 5th transistor is configured at the third line
First side, the 6th transistor are configured at the second side of the third line.
7. display device as described in claim 1, which is characterized in that wherein these scan lines include one first scan line to one
4th scan line, wherein first scan line to the 4th scan line sequential, wherein first scan line be coupled to this
Two-transistor, second scan line are coupled to the first transistor and the third transistor, the third scan line be coupled to this
Four transistors and the 6th transistor, the 4th scan line are coupled to the 5th transistor.
8. display device as claimed in claim 7, which is characterized in that wherein these data lines include one first data line, one
Second data line and a third data line, wherein first data line, second data line and the third data line sequential,
Wherein first data line is coupled to the third transistor, which is coupled to the first transistor, the 4th crystal
Pipe and the 5th transistor, the third data line are coupled to the second transistor and the 6th transistor.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103133583 | 2014-09-26 | ||
| TW103133583A TW201612613A (en) | 2014-09-26 | 2014-09-26 | Display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105759517A CN105759517A (en) | 2016-07-13 |
| CN105759517B true CN105759517B (en) | 2019-06-04 |
Family
ID=56335723
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410781424.6A Expired - Fee Related CN105759517B (en) | 2014-09-26 | 2014-12-16 | Display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN105759517B (en) |
| TW (1) | TW201612613A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200842791A (en) * | 2007-04-25 | 2008-11-01 | Novatek Microelectronics Corp | LCD and display method thereof |
| CN102566176A (en) * | 2010-11-24 | 2012-07-11 | 三星移动显示器株式会社 | Display substrate, display panel and display device |
| CN102629056A (en) * | 2011-11-15 | 2012-08-08 | 京东方科技集团股份有限公司 | Thin film transistor (TFT) array substrate and display device |
| CN103926715A (en) * | 2013-11-18 | 2014-07-16 | 上海中航光电子有限公司 | Pixel unit, pixel array structure and display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120004045A (en) * | 2010-07-06 | 2012-01-12 | 삼성전자주식회사 | Liquid crystal display |
-
2014
- 2014-09-26 TW TW103133583A patent/TW201612613A/en unknown
- 2014-12-16 CN CN201410781424.6A patent/CN105759517B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200842791A (en) * | 2007-04-25 | 2008-11-01 | Novatek Microelectronics Corp | LCD and display method thereof |
| CN102566176A (en) * | 2010-11-24 | 2012-07-11 | 三星移动显示器株式会社 | Display substrate, display panel and display device |
| CN102629056A (en) * | 2011-11-15 | 2012-08-08 | 京东方科技集团股份有限公司 | Thin film transistor (TFT) array substrate and display device |
| CN103926715A (en) * | 2013-11-18 | 2014-07-16 | 上海中航光电子有限公司 | Pixel unit, pixel array structure and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105759517A (en) | 2016-07-13 |
| TW201612613A (en) | 2016-04-01 |
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Granted publication date: 20190604 Termination date: 20201216 |