CN105742300B - Wafer encapsulation body and preparation method thereof - Google Patents
Wafer encapsulation body and preparation method thereof Download PDFInfo
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- CN105742300B CN105742300B CN201410758635.8A CN201410758635A CN105742300B CN 105742300 B CN105742300 B CN 105742300B CN 201410758635 A CN201410758635 A CN 201410758635A CN 105742300 B CN105742300 B CN 105742300B
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- semiconductor element
- conductive structure
- encapsulation body
- base material
- layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- Solid State Image Pick-Up Elements (AREA)
- Wire Bonding (AREA)
Abstract
A kind of wafer encapsulation body and preparation method thereof, the wafer encapsulation body include encapsulation base material, semiconductor element and multiple conductive structures.Semiconductor element has central area and surrounds the marginal zone of central area.Conductive structure is between encapsulation base material and semiconductor element.Conductive structure has different height, and the height of conductive structure is gradually increased from the marginal zone of central area toward the semiconductor element of semiconductor element, so that the distance between the marginal zone of semiconductor element and encapsulation base material are greater than the distance between central area and encapsulation base material of semiconductor element.The front (i.e. image sensor surface) of semiconductor element of the invention is concave surface as a result, and analog is at the shape of retina, and when the image sensor surface sensing image of semiconductor element, light is easy a possibility that concentrating, can reducing image distortion.
Description
Technical field
The present invention is in relation to a kind of wafer encapsulation body and a kind of production method of wafer encapsulation body.
Background technique
When making the wafer encapsulation body of Image Sensor, semiconductor element can be utilized welding technique or adhesive surface skill
Art (Surface Mount Technology；SMT it) is set on circuit board.In this way, be located at the semiconductor element back side
Tin ball just can be electrically connected with circuit board.
Since the size of tin ball is roughly the same, and semiconductor element is not specially designed, therefore existing semiconductor element meeting
It is parallel to circuit board, so that the front (i.e. image sensor surface) of semiconductor element is a horizontal plane.In this way, work as semiconductor element
When the image sensor surface sensing image of part, light is easy diverging, easily leads to image distortion.
Summary of the invention
A technology aspect of the invention is a kind of wafer encapsulation body.
According to an embodiment of the present invention, a kind of wafer encapsulation body includes encapsulation base material, semiconductor element and multiple conductions
Structure.Semiconductor element has central area and surrounds the marginal zone of central area.Conductive structure is located at encapsulation base material and semiconductor element
Between part.Conductive structure has different height, and the height of conductive structure is from the central area of semiconductor element toward semiconductor element
The marginal zone of part is gradually increased, so that the distance between the marginal zone of semiconductor element and encapsulation base material are greater than semiconductor element
The distance between central area and encapsulation base material.
In an embodiment of the present invention, the plan view shape of above-mentioned conductive structure include round, ellipse, polygon or on
The combination stated.
In an embodiment of the present invention, above-mentioned semiconductor element has semiconductor substrate.Semiconductor substrate has weld pad
With vacancy section.Weld pad is exposed from vacancy section.Semiconductor element also includes insulating layer.Insulating layer is located at semiconductor substrate towards encapsulation
On the surface of substrate and semiconductor substrate is on the surface of vacancy section.
In an embodiment of the present invention, above-mentioned semiconductor element also includes rewiring layer.It reroutes layer and is located at insulating layer
On upper and weld pad.
In an embodiment of the present invention, above-mentioned semiconductor element also includes protective layer.Protective layer, which is located at, to reroute on layer
On insulating layer, and protective layer has multiple openings, keeps rewiring layer exposed from being open.
In an embodiment of the present invention, above-mentioned conductive structure is located on the rewiring layer in opening.
In an embodiment of the present invention, the bore of above-mentioned opening is from the central area of semiconductor element toward semiconductor element
Marginal zone is gradually reduced.
Another technology aspect of the invention is a kind of production method of wafer encapsulation body.
According to an embodiment of the present invention, a kind of production method of wafer encapsulation body comprises the steps of：A) in semiconductor
Multiple conductive structures of different height are formed on element, wherein the central area of the height of conductive structure from semiconductor element is past partly leads
The marginal zone of volume elements part is gradually increased；B) in pressing semiconductor element on encapsulation base material, so that semiconductor element is by conductive structure
It supports and is bent.
In an embodiment of the present invention, above-mentioned steps a) includes the bore of the opening of adjustment print nozzles, makes conducting resinl
Body is printed from the print nozzles of different bores to semiconductor element, to form the conductive structure of tool different height.
In an embodiment of the present invention, the production method of above-mentioned wafer encapsulation body also includes：In the weight of semiconductor element
Protective layer is formed on wiring layer；And multiple openings of different bores are formed in protective layer, the bore of split shed is from semiconductor
The marginal zone of the central area of element toward semiconductor element is gradually reduced.
In an embodiment of the present invention, it is more that above-mentioned steps a) is contained in placement on the rewiring layer in the opening of protective layer
A conductive structure.
In above embodiment of the present invention, due to conductive structure have different height, and the height of conductive structure from
The marginal zone of the central area of semiconductor element toward semiconductor element is gradually increased, therefore the marginal zone of semiconductor element and encapsulation base
The distance between material can be greater than the distance between central area and encapsulation base material of semiconductor element.In this way, semiconductor element
Front (i.e. image sensor surface) be concave surface, analog at retina shape.When the image sensor surface of semiconductor element senses
When image, light is easy a possibility that concentrating, can reducing image distortion.
Detailed description of the invention
Fig. 1 is painted the side view of wafer encapsulation body according to an embodiment of the present invention.
The semiconductor element that Fig. 2 is painted Fig. 1 is pressed on side view when encapsulation base material.
Fig. 3 is painted the bottom view of the semiconductor element of Fig. 2.
Fig. 4 is painted sectional view of the semiconductor element along line segment 4-4 of Fig. 3.
Fig. 5 is painted the sectional view of the semiconductor element of another embodiment according to the present invention, profile position and Fig. 4 phase
Together.
Fig. 6 is painted the flow chart of the production method of wafer encapsulation body according to an embodiment of the present invention.
Fig. 7 is painted semiconductor substrate according to an embodiment of the present invention and forms the sectional view behind vacancy section.
The semiconductor substrate that Fig. 8 is painted Fig. 7 forms insulating layer and reroutes the sectional view after layer.
Fig. 9, which is painted the insulating layer of Fig. 8 and reroutes layer, forms the sectional view after protective layer.
The layer that reroutes that Figure 10 is painted Fig. 9 forms the sectional view after conductive structure.
The sectional view when carrier that Figure 11 is painted Figure 10 removes.
The sectional view when adhesive tape that Figure 12 is painted Figure 11 removes.
Wherein, symbol is simply described as follows in attached drawing：
100：Wafer encapsulation body 110：Encapsulation base material
120：Semiconductor element 120a：Semiconductor element
1201：Semiconductor substrate 121a：Surface
121b：Surface 122：Central area
123：Weld pad 124：Marginal zone
125：Vacancy section 126：Insulating layer
127：Reroute layer 128：Protective layer
129：Be open 129a：Opening
129b：Be open 129c：Opening
130：Conductive structure 130a：Conductive structure
130b：Conductive structure 130c：Conductive structure
210：Carrier 220：Adhesive tape
230：Adhesive tape 240：Adhesive tape
4-4：Line segment D：Direction
D1：Distance D2：Distance
H1：Height H2：Highly
H3：Height S1~S2：Step.
Specific embodiment
Multiple embodiments of the invention will be disclosed with schema below, as clearly stated, the details in many practices
It will be explained in the following description.It should be appreciated, however, that the details in these practices is not applied to limit the present invention.Also
It is to say, in some embodiments of the present invention, the details in these practices is non-essential.In addition, for the sake of simplifying schema, one
A little existing usual structures will be painted in a manner of simply illustrating in the drawings with element.
Fig. 1 is painted the side view of wafer encapsulation body 100 according to an embodiment of the present invention.Fig. 2 is painted the semiconductor of Fig. 1
Element 120 is pressed on side view when encapsulation base material 110.Simultaneously refering to fig. 1 with Fig. 2, wafer encapsulation body 100 includes encapsulation base material
110, semiconductor element 120 and multiple conductive structure 130a, 130b, 130c.Semiconductor element 120 has central area 122 and encloses
Around the marginal zone of central area 122 124.Conductive structure 130a, 130b, 130c be located at encapsulation base material 110 and semiconductor element 120 it
Between.Conductive structure 130a, 130b, 130c have different height, and the height of conductive structure 130a, 130b, 130c are from partly leading
The central area 122 of volume elements part 120 is gradually increased toward the marginal zone of semiconductor element 120 124, so that the side of semiconductor element 120
The distance between edge area 124 and encapsulation base material 110 D1 are greater than between the central area 122 and encapsulation base material 110 of semiconductor element 120
Distance D2.
There is conductive structure 130a height H1, conductive structure 130b there is height H2, conductive structure 130c to have height H3,
And height H1 is less than height H2, height H2 is less than height H3.When semiconductor element 120 is not yet pressed on encapsulation base material 110, lead
Electric structure 130a, 130b, 130c can be located on semiconductor element 120 or on encapsulation base material 110.Semiconductor element 120 is available
Surface adhering technical (Surface Mount Technology；SMT it) is pressed on encapsulation base material 110 with direction D.
Since the central area 122 of height H1, H2, H3 from the semiconductor element 120 of conductive structure 130a, 130b, 130c is past
The marginal zone 124 of semiconductor element 120 is gradually increased, therefore after semiconductor element 120 is pressed on encapsulation base material 110, is partly led
The surface 121a of volume elements part 120 is concave surface.In present embodiment, the surface 121a of semiconductor element 120 is semiconductor element 120
Front, be image sensor surface, can light sensing.The surface 121b of semiconductor element 120 is the back side of semiconductor element 120,
It can be electrically connected by conductive structure 130a, 130b, 130c and encapsulation base material 110.
When the surface 121a of semiconductor element 120 be concave surface when, analog at retina shape.In this way, when half
When surface 121a (i.e. image sensor surface) sensing image of conductor element 120, light is easy to concentrate, and can reduce image distortion can
It can property.
In present embodiment, encapsulation base material 110 can be circuit board.The material of semiconductor element 120 can wrap it is siliceous, can
Think image sensing wafer, such as cmos element, but is not intended to limit the invention.Conductive structure 130a, 130b, 130c can be with
For tin ball, but the quantity of conductive structure, shape and material are not intended to limit the invention.
Fig. 3 is painted the bottom view of the semiconductor element 120 of Fig. 2.Fig. 4 is painted the semiconductor element 120 of Fig. 3 along line segment 4-4
Sectional view.Simultaneously refering to Fig. 3 and Fig. 4, the plan view shape of conductive structure 130a, 130b, 130c may include round, oval
Shape, polygon or combinations of the above.Semiconductor element 120 has semiconductor substrate 1201 (such as silicon wafer).Semiconductor substrate
1201 have weld pad 123 and vacancy section 125.Weld pad 123 is exposed from vacancy section 125.Semiconductor element 120 also includes insulating layer
126.Insulating layer 126 is located at semiconductor substrate 1201 towards on the surface 121b of encapsulation base material 110 (see Fig. 1) and semiconductor substrate
1201 on the surface of vacancy section 125.
In addition, semiconductor element 120 is also comprising rerouting layer 127 and protective layer 128.It reroutes layer 127 and is located at insulating layer
On 126 and on weld pad 123.Protective layer 128, which is located at, to reroute on layer 127 and on insulating layer 126, and protective layer 128 is with multiple
Opening 129 keeps rewiring layer 127 exposed from opening 129.Conductive structure 130a, 130b, 130c are located in opening 129
It reroutes on layer 127.
It is roughly the same in the bore of present embodiment, the opening 129 of protective layer 128, but conductive structure 130a, 130b,
The volume of 130c is different.The volume of conductive structure 130a is less than the volume of conductive structure 130b, and conductive structure 130b's is small in size
In the volume of conductive structure 130c, therefore the height H1 of conductive structure 130a is less than the height H2 of conductive structure 130b, and conductive
The height H2 of structure 130b is less than the height H3 of conductive structure 130c.
Fig. 5 is painted the sectional view of the semiconductor element 120a of another embodiment according to the present invention, profile position and Fig. 4
It is identical.Semiconductor element 120a includes semiconductor substrate 1201, insulating layer 126, reroutes layer 127 and protective layer 128.With Fig. 4
The different place of embodiment is：In the present embodiment, the bore of opening 129a, 129b, 129c of protective layer 128 are from partly
The central area 122 of conductor element 120a is gradually reduced toward the marginal zone of semiconductor element 120a 124, and conductive structure 130a,
The volume of 130b, 130c are roughly the same.
Since the bore of the opening 129a of protective layer 128 is greater than the bore of opening 129b, the bore for the 129b that is open, which is greater than, to be opened
The bore of mouth 129c, therefore the height H1 of conductive structure 130a is less than the height H2 of conductive structure 130b, and conductive structure 130b
Height H2 be less than conductive structure 130c height H3.
Fig. 6 is painted the flow chart of the production method of wafer encapsulation body according to an embodiment of the present invention.Wafer encapsulation body
Production method comprise the steps of.In step sl, on semiconductor element formed different height multiple conductive structures,
The height of middle conductive structure is gradually increased from the marginal zone of central area toward the semiconductor element of semiconductor element, as shown in Figure 2
Conductive structure.Then in step s 2, in pressing semiconductor element on encapsulation base material, so that semiconductor element is by conductive structure branch
It supports and is bent, semiconductor element as shown in Figure 1.
Refering to Fig. 4, it is the step of conductive structure 130a, 130b, 130c of different height is formed on semiconductor element 120
In, conductive rubber can be made to print from the print nozzles of different openings bore to half by adjusting the bore of the opening of print nozzles
On conductor element 120, to form conductive structure 130a, 130b, 130c of tool different height.In the present embodiment, protective layer
The bore of 128 opening 129 is roughly the same, but conductive rubber prints the volume difference into opening 129, so that conductive rubber is solid
After change, conductive structure 130a, 130b, 130c of tool different height can be formed.In the present embodiment, it is applicable to tin ball indentation brush
(ball printing) processing procedure.
Refering to Fig. 5, it is to form the step of conductive structure 130a, 130b, 130c of different height on semiconductor element 120a
It, can be in formation protective layer 128 on the rewiring layer 127 of semiconductor element 120a in rapid.Then difference can be formed in protective layer 128
Multiple opening 129a, 129b, 129c of bore, the bore of split shed 129a, 129b, 129c are from semiconductor element 120a
Centre area 122 is gradually reduced toward the marginal zone of semiconductor element 120a 124.Later, can in protective layer 128 opening 129a, 129b,
Multiple conductive structure 130a, 130b, 130c are placed on rewiring layer 127 in 129c.In the present embodiment, conductive structure
130a, 130b, 130c volume having the same, but can be open by the protective layer 128 of different bores 129a, 129b, 129c Bureau
The shape of conductive structure 130a, 130b, 130c are limited, to form conductive structure 130a, 130b, 130c of different height.Citing comes
It says, the opening 129a of big protective layer 128 can form short conductive structure 130a, and the opening 129c of small protective layer 128 can shape
At high conductive structure 130c.In the present embodiment, it is applicable to tin ball implantation (ball placement) processing procedure.
It will be understood that the element connection relationship, material, the production method that had described will not be repeated again and repeat.It is chatted following
In stating, other steps of the production method of wafer encapsulation body will be described.
Fig. 7 is painted semiconductor substrate 1201 according to an embodiment of the present invention and forms the sectional view behind vacancy section 125.Half
Conductor substrate 1201 can be by adhesive tape 220 (such as double-sided adhesive) and 210 temporary joint of carrier.Then semiconductor substrate 1201 can be ground
Surface 121b, make semiconductor substrate 1201 thickness be thinned.The mode of useful etch is in the formation of semiconductor substrate 1201 later
Vacancy section 125 keeps weld pad 123 exposed from vacancy section 125.
The semiconductor substrate 1201 that Fig. 8 is painted Fig. 7 forms insulating layer 126 and reroutes the sectional view after layer 127.To hollow out
It, can the surface 121b in semiconductor substrate 1201 and the surface formation insulating layer 126 around vacancy section 125 after area 125 is formed.It connects
, it can be formed in insulating layer 126 and vacancy section 125 and reroute layer 127, make to reroute the electric connection weld pad 123 of layer 127.
Fig. 9, which is painted the insulating layer 126 of Fig. 8 and reroutes layer 127, forms the sectional view after protective layer 128.Simultaneously refering to Fig. 8
With Fig. 9, after rerouting layer 127 and being formed, useful etch or laser processing procedure are in the formation notch of semiconductor substrate 1201.Then, it protects
Sheath 128 can be formed in insulating layer 126 and reroute on layer 127.
The layer 127 that reroutes that Figure 10 is painted Fig. 9 forms the sectional view after conductive structure 130.Simultaneously refering to Fig. 9 and Figure 10,
Protective layer 128 can be patterned and form opening 129.It, can be in the weight in opening 129 after the opening 129 of layer 128 to be protected is formed
Conductive structure 130 is formed on wiring layer 127.The quantity of conductive structure 130 is not intended to limit the invention.Wherein, conductive structure
130 design and the opening 129 of protective layer 128 design can be as shown in figure 4, or as shown in figure 5, it is no longer repeated.
The sectional view when carrier 210 that Figure 11 is painted Figure 10 removes.0 and Figure 11 refering to fig. 1 simultaneously, to conductive structure 130
After formation, the protective layer 128 and adhesive tape 220 above (pre-saw) Figure 10 notch can be precut.Then, after can precuting
Structure is placed on adhesive tape 230, and from carrier of separating 210 on adhesive tape 220.
The sectional view when adhesive tape 230 that Figure 12 is painted Figure 11 removes.0 and Figure 11 refering to fig. 1 simultaneously, carrier 210 to be separated
Afterwards, the adhesive tape 220 on semiconductor substrate 1201 can be fitted in adhesive tape 240, it then can be by adhesive tape 230 from conductive structure 130
It removes.In follow-up process, the adhesive tape 220,240 on the semiconductor substrate 1201 of Figure 12 can be removed, and obtain partly leading for Fig. 4
The semiconductor element 120a of volume elements part 120 or Fig. 5.
The foregoing is merely present pre-ferred embodiments, the range that however, it is not to limit the invention is any to be familiar with sheet
The personnel of item technology can do further improvements and changes without departing from the spirit and scope of the present invention on this basis, because
This protection scope of the present invention is when being subject to the range that following claims are defined.
Claims (11)
1. a kind of wafer encapsulation body, which is characterized in that include：
One encapsulation base material；
Semiconductor element, with a central area and the marginal zone for surrounding the central area；And
Multiple conductive structures, between the encapsulation base material and the semiconductor element, wherein the conductive structure is with different
Highly, and the height of the conductive structure from the central area of the semiconductor element toward the marginal zone of the semiconductor element gradually
Increase, so that the distance between the marginal zone of the semiconductor element and the encapsulation base material are greater than the center of the semiconductor element
The distance between area and the encapsulation base material.
2. wafer encapsulation body according to claim 1, which is characterized in that the plan view shape of the conductive structure includes circle
Shape, ellipse, polygon or combinations of the above.
3. wafer encapsulation body according to claim 1, which is characterized in that the semiconductor element has semiconductor substrate,
The semiconductor substrate has a weld pad and a vacancy section, and the weld pad is exposed from the vacancy section, which also includes：
One insulating layer, positioned at the semiconductor substrate towards on the surface of the encapsulation base material and the semiconductor substrate surrounds the vacancy section
Surface on.
4. wafer encapsulation body according to claim 3, which is characterized in that the semiconductor element also includes：
One reroutes layer, is located on the insulating layer and on the weld pad.
5. wafer encapsulation body according to claim 4, which is characterized in that the semiconductor element also includes：
One protective layer is located on the rewiring layer and on the insulating layer, and the protective layer has multiple openings, makes the rewiring layer
It is exposed from the opening.
6. wafer encapsulation body according to claim 5, which is characterized in that the conductive structure is located in the opening
The rewiring layer on.
7. wafer encapsulation body according to claim 5, which is characterized in that the bore of the opening is from the semiconductor element
The marginal zone of the central area toward the semiconductor element is gradually reduced.
8. a kind of production method of wafer encapsulation body, which is characterized in that include：
A) in the multiple conductive structures for forming different height on semiconductor element, wherein the height of the conductive structure from this half
One marginal zone of one central area of conductor element toward the semiconductor element is gradually increased；And
B) in pressing the semiconductor element on an encapsulation base material, so that the semiconductor element is supported and curved by the conductive structure
It is bent.
9. the production method of wafer encapsulation body according to claim 8, wherein step a) includes：
The bore for adjusting the opening of a print nozzles prints a conductive rubber to this from the print nozzles of different openings bore
On semiconductor element, to form the conductive structure of tool different height.
10. the production method of wafer encapsulation body according to claim 8, which is characterized in that also include：
It is rerouted in the one of the semiconductor element and forms a protective layer on layer；And
Multiple openings of different bores are formed in the protective layer, wherein the bore of the opening is from the center of the semiconductor element
The marginal zone of area toward the semiconductor element is gradually reduced.
11. the production method of wafer encapsulation body according to claim 10, which is characterized in that step a) includes：
The conductive structure is placed on the rewiring layer in the opening of the protective layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410758635.8A CN105742300B (en) | 2014-12-11 | 2014-12-11 | Wafer encapsulation body and preparation method thereof |
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|---|---|---|---|
| CN201410758635.8A CN105742300B (en) | 2014-12-11 | 2014-12-11 | Wafer encapsulation body and preparation method thereof |
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| CN105742300A CN105742300A (en) | 2016-07-06 |
| CN105742300B true CN105742300B (en) | 2018-11-23 |
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| CN107995399A (en) * | 2017-12-19 | 2018-05-04 | 信利光电股份有限公司 | A kind of curved surface imaging sensor and its welding structure and camera module with wiring board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651382A (en) * | 2011-02-28 | 2012-08-29 | 索尼公司 | Method of manufacturing solid-state imaging element, solid-state imaging element and electronic apparatus |
| CN103872063A (en) * | 2012-12-07 | 2014-06-18 | 索尼公司 | Solid-state image pickup device, method of manufacturing solid-state image pickup device, and electronic apparatus |
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| KR101712043B1 (en) * | 2010-10-14 | 2017-03-03 | 삼성전자주식회사 | Stacked semiconductor package, Semiconductor device including the stacked semiconductor package and Method of manufacturing the stacked semiconductor package |
| US9385098B2 (en) * | 2012-11-21 | 2016-07-05 | Nvidia Corporation | Variable-size solder bump structures for integrated circuit packaging |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651382A (en) * | 2011-02-28 | 2012-08-29 | 索尼公司 | Method of manufacturing solid-state imaging element, solid-state imaging element and electronic apparatus |
| CN103872063A (en) * | 2012-12-07 | 2014-06-18 | 索尼公司 | Solid-state image pickup device, method of manufacturing solid-state image pickup device, and electronic apparatus |
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