CN105739946A - Random digit generation method and device - Google Patents
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- CN105739946A CN105739946A CN201410746690.5A CN201410746690A CN105739946A CN 105739946 A CN105739946 A CN 105739946A CN 201410746690 A CN201410746690 A CN 201410746690A CN 105739946 A CN105739946 A CN 105739946A
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Abstract
The invention discloses a random digit generation method and device. The method comprises the following steps: obtaining a random digit seed; according to a first operation result of the bit of the random digit seed, obtaining N feedback terms used for a linear feedback shift register, wherein N is greater than 1; and in a single clock period, moving the linear feedback shift register for N bits to obtain N random digits corresponding to the feedback terms. The method can simply and efficiently generate a plurality of random digits in the single clock period, and the plurality of generated random digits have the characteristics of evenness in distribution. Therefore, through a simple combination operation method, the random digit with Gaussian distribution can be also quickly and efficiently obtained. According to the random digit with the Gaussian distribution, a random digit sequence of the Gaussian distribution can be obtained after a plurality of clock periods, wherein the random digit is generated in each clock period. The method is simple and effective, and the generated Gaussian random digit sequence can effectively overcome the problem of the correlation and the periodicity of the sub sequence of the Gaussian random digit sequence.
Description
Technical field
The present invention relates to communication technical field, particularly relate to a kind of random digit generation method and generating random number device.
Background technology
Along with popularizing of computer network and developing rapidly of various digitizing technique, all it is likely to there is the user demand to random number in various fields, such as, in the communications field, the modulation /demodulation of signal, the transmission of signal, the scrambling of signal and the simulation etc. of descrambling, channel are required for using random number.
May be usually based on software mode or hardware mode etc. and realize the generation of random number.For example, it is possible to passed through the generation of programming realization random number by Generating Random Number, it is also possible by means the hardware such as mobile depositor realize the generation of random number.Such as,
In the process being realized random number by hardware mode, it will usually utilize linear feedback shift register (LFSR, LinearFeedbackShiftRegister) to realize the generation of random number.
But in prior art, in the process generating random number, such as in generating the process of random number of equally distributed random number or Gauss distribution, all there are some problems, although such as meeting equally distributed requirement in the random sequence generated by LFSR, but it is usually present and produces the problem that random number is inefficient, each cycle can be only generated a random number, and in generating the process of random number of Gauss distribution, it is usually present hardware construction complicated, relatively costly, and generates the problem that random number is inefficient.
Prior art exist be difficult to simple, efficiently produce to have and be uniformly distributed or the problem of random number of Gauss distribution.
Summary of the invention
This invention address that be difficult to simple, generate to have and be uniformly distributed or the problem of random number of Gauss distribution at a high speed.
For solving the problems referred to above, technical solution of the present invention provides a kind of random digit generation method, and described method includes:
Obtain random number seed；
First operating result of the bit according to described random number seed, obtains the N number of feedback term for linear feedback shift register, and wherein, N is more than 1；
In the single clock cycle, described linear feedback shift register is moved N position, to obtain N number of random number of corresponding described feedback term.
Optionally, described first operation includes XOR or XNOR computing.
Optionally, described each feedback term for linear feedback shift register is determined by the first operating result of M the bit chosen respectively in described random number seed, and wherein, M is less than N.
Optionally, containing K feedback term in k-th random number in described N number of random number, the value of described K is less than or equal to N.
Optionally, described method also includes: using the random number containing N number of feedback term as the random number seed generating random number next time.
Optionally, described method also includes:
After getting N number of random number within the single clock cycle, described N number of random number is combined, to generate the random number of Gauss distribution.
Optionally, the process that described N number of random number is combined is included:
S bit is chosen from each random number；
The first numerical value of each random number corresponding is determined by S bit selected in each random number；
By each first numerical value summation, obtain the second value after sum operation.
Optionally, described method also includes: described second value is defined as the random number of Gauss distribution.
Optionally, described method includes: in the described process choosing S bit from each random number, and the position of bit selected in each random number is identical.
Optionally, described method also includes: formed gaussian random Number Sequence by the random number of multiple Gauss distribution.
For solving above-mentioned technical problem, technical solution of the present invention also provides for a kind of generating random number device, and described device includes:
Seed acquiring unit, is used for obtaining random number seed；
Feedback term acquiring unit, for the first operating result of the bit according to described random number seed, obtains the N number of feedback term for linear feedback shift register, and wherein, N is more than 1；
Random number acquiring unit, for moving N position by described linear feedback shift register, to obtain N number of random number of corresponding described feedback term within the single clock cycle.
Optionally, described feedback term acquiring unit includes:
First chooses unit, for choosing M bit from described random number seed respectively；
Feedback unit, determines each feedback term for linear feedback shift register for the first operating result according to M the bit chosen respectively in described random number seed.
Optionally, described device also includes:
Assembled unit, after getting N number of random number within the single clock cycle, is combined described N number of random number；
Generate unit, for generating the random number of Gauss distribution.
Optionally, described assembled unit includes:
Second chooses unit, for choosing S bit from each random number；
First determines unit, for being determined the first numerical value of each random number corresponding by S bit selected in each random number；
Second determines unit, for each first numerical value summation, obtaining the second value after sum operation.
Optionally, described device also includes: retrieval unit, for being formed gaussian random Number Sequence by the random number of multiple Gauss distribution.
Compared with prior art, technical scheme has the advantage that
By first of the bit to the random number seed obtained the operation, obtain the N number of feedback term for linear feedback shift register, and then within the single clock cycle, described linear feedback shift register is moved to right N position, often mobile one, a corresponding random number all can be got in conjunction with feedback term, so in the process moving to right N position, N number of random number of corresponding described feedback term can be obtained, the method can be effectively improved the speed producing random number, N number of random number all can be produced within each clock cycle, a random number is once generated compared to prior art, can be simple within the single clock cycle, produce multiple randoms number efficiently, and produced multiple random number has equally distributed characteristic.
After getting N number of random number within the single clock cycle, described N number of random number can be combined, and then generate the random number of Gauss distribution, the efficiency comparison with equally distributed random number owing to producing is high, equally possible quickly by the method for simple combinatorial operation, get the random number of Gauss distribution efficiently, there is the random number of Gauss distribution produced by each clock cycle, after multiple clock cycle, the random number sequence of Gauss distribution can be obtained, method is simply effective, and the gaussian random Number Sequence generated can effectively overcome dependency and periodic problem.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the random digit generation method that technical solution of the present invention provides；
Fig. 2 is the schematic flow sheet of the random digit generation method that the embodiment of the present invention provides；
Fig. 3 is the random number seed schematic diagram that the embodiment of the present invention provides；
Fig. 4 is the position view of the bit after the linear feedback shift register single clock cycle displacement of 20 bits that the embodiment of the present invention provides；
Fig. 5 is the structural representation of the generating random number device that the embodiment of the present invention provides.
Detailed description of the invention
Prior art exist be difficult to simple, efficiently produce to have and be uniformly distributed or the problem of random number of Gauss distribution.
For solving the problems referred to above, technical solution of the present invention provides the schematic flow sheet of a kind of random digit generation method.
In present specification, mentioned random number is pseudo random number, and mentioned random number sequence also refers both to pseudo-random number sequence.
Fig. 1 is the schematic flow sheet of a kind of random digit generation method that technical solution of the present invention provides.
As it is shown in figure 1, step S1 is first carried out, obtain random number seed.
Obtaining initial random number seed, described initial random number seed is generally inputted by the external world, for instance, for the linear feedback shift register of 20bit (bit), it may be determined that the initial random number seed of a 20bit.
Perform step S2, the first operating result according to the bit of described random number seed, obtain the N number of feedback term for linear feedback shift register.
Suitable bit can be chosen from described random number seed, generate N number of feedback term of linear feedback shift register, described each feedback term for linear feedback shift register is determined by the first operating result of M the bit chosen respectively in described random number seed, the value of described N is more than 1, the value of M is associated with the bit sum of linear feedback shift register and the number N of feedback term, and the value of described M is less than N.
Such as, linear feedback shift register for 20 bits, two bits can be chosen from the random number seed of 20 bits, generate a feedback term, then from described random number seed, choose other two bits again, generate another one feedback term, by that analogy, it is possible to generate the multiple feedback terms for linear feedback shift register.When choosing the bit generating feedback term from random number seed, selected bit is by the constraint of primitive polynomial (prime polynomial) principle, the method of the described feedback term generating linear feedback shift register according to primitive polynomial principle is well known to those skilled in the art, and does not repeat them here.
Described first operation can be XOR or XNOR computing, and those skilled in the art can also adopt other operation methods to determine the feedback term of linear feedback shift register.
Perform step S3, in the single clock cycle, described linear feedback shift register is moved to right N position, to obtain N number of random number of corresponding described feedback term.
Get N number of for the feedback term of linear feedback shift register after, within the single clock cycle, described linear feedback shift register is moved to right N position, a corresponding random number all can be got in conjunction with feedback term, so in the process moving to right N position, it is possible to obtain N number of random number of corresponding described feedback term.
Understandable for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from, below in conjunction with accompanying drawing, specific embodiments of the invention are described in detail.
In the present embodiment, with the linear feedback shift register of 20 bits, the number of bits that each clock cycle moves is 8 and illustrates for example.
Fig. 2 is the schematic flow sheet of the random digit generation method that the embodiment of the present invention provides.
Step S201 is first carried out, obtains the initial random number seed of 20 bits.
Initial random seeds can be determined according to the stored bit of the linear feedback shift register of 20 bits.
It is assumed that acquired initial random seeds as it is shown on figure 3, wherein Q1 to Q20 represent each bit of the random number seed of 20 bits accessed by the linear feedback shift register according to 20 bits.
Perform step S202, from described initial random number seed, choose the bit of each feedback term for determining linear feedback shift register.
In the present embodiment, by initial random number seed being chosen two bits respectively for determining each feedback term of linear feedback shift register.
In the present embodiment, to determine 8 feedback terms, and each feedback term is represented respectively respectively with D1 to D8.Specifically, D8 feedback term can be determined by the bit Q20 in initial random number seed as shown in Figure 3 and bit Q17, D7 is determined by bit Q19 and bit Q16, D6 is determined by bit Q18 and bit Q15, D5 is determined by bit Q17 and bit Q14, D4 is determined by bit Q16 and bit Q13, D3 is determined by bit Q15 and bit Q12, determine D2 by bit Q14 and bit Q11, determine D1 finally by bit Q13 and bit Q10.
Perform step S203, determine the value of each feedback term according to the XOR of the bit of the selected each feedback term of correspondence.
Can using the XOR result of the bit Q20 in initial random number seed and the bit Q17 value as feedback term D8, using the XOR result of bit Q19 and the bit Q16 value as feedback term D7, the like, using the XOR result of bit Q13 and the bit Q10 value as feedback term D1. the XOR result of two bits in the initial random number seed got corresponding to each feedback term, all can obtain the value of feedback term.
It should be noted that, in the present embodiment, determine that feedback term illustrates choosing two bits from random number seed, in other embodiments, it is also possible to from random number seed, choose some bits according to the constraint of primitive polynomial principle and determine feedback term.For the number of bit of linear feedback shift register and be not specifically limited from the number of bit for determining feedback term selected by corresponding random number seed at this.
Perform step S204, within the single clock cycle, described linear feedback shift register is moved to right 8 according to determined multiple feedback terms, to generate the random number of 8 20 bits.
When obtaining the feedback term of D1 to D8, it is possible to described linear feedback shift register is moved 8 within the single clock cycle, is simultaneously generated the random number of 8 20 bits.
Specifically, within the single clock cycle, described D1 to D8 is input to after linear feedback shift register as feedback term, the situation of the bit in the linear feedback shift register of 20 bits is referred to Fig. 4, as described in Figure 4, after one clock cycle, the sequence of the bit in linear feedback shift register is D1, D2 ..., D8, Q1, Q2 ..., Q11, Q12, and Q13 to Q20 (in figure shown in broken box) is moved out of outside the scope of 20 initial bits.
In the process that described linear feedback shift register moves within the above-mentioned single cycle, 8 randoms number of corresponding feedback term can be obtained, specifically, corresponding feedback term D8, can obtain bit is D8, Q1, Q2 ..., Q11, Q12 ..., the random number of Q18, Q19, random number r1 can be designated as at this；Can obtain again bit after obtaining feedback term D7 is D7, D8, Q1, Q2 ..., Q11, Q12 ..., the random number of Q17, Q18, be designated as random number r2；Can obtain again bit after obtaining feedback term D6 is D6, D7, D8, Q1, Q2 ..., Q11, Q12 ..., the random number of Q16, Q17, be designated as random number r3 at this；The like, it is possible to respectively obtain the random number of corresponding each feedback term, within a clock cycle, thus can generate the random number of 8 20 bits altogether, be designated as r1, r2, r3 ..., r7, r8 respectively at this.
The random number of the 8 of generation described above 20 bits is lined up in order, then can obtain one and meet equally distributed random number sequence.
And then, can by bit be D1, D2 ..., D8, Q1, Q2 ..., Q11, Q12 random number generate the random number seed of random number as linear feedback shift register next time, the like, each clock cycle gets 8 equally distributed randoms number, thus can simply, quickly produce multiple random number, a random number is once generated compared to prior art, can simply and efficiently produce multiple randoms number within the single clock cycle, and produced multiple random number has equally distributed characteristic.
In the present embodiment, it is also possible to multiple according to what generate there is equally distributed generating random number meet the random number of Gauss distribution further.
Specifically, step S205 can be performed after step s 204.
Step S205, is combined the random number of 8 20 bits, generates the random number of Gauss distribution.
Within each clock cycle, all can generate r1, r2, r3 ..., r7, r8 totally 8 randoms number according to above-mentioned steps, above-mentioned 8 randoms number are combined according to the principle of central limit theorem, then can obtain meeting the random number of Gauss distribution.
In the present embodiment, each random number is chosen several bits from r1, r2, r3 ..., r7, r8, such as choose S bit, the value of S should less than the number of bits of random number, and the value of concrete S can the number of number of bits contained by actual experiment data and random number set accordingly.
Specifically, from r1, such as choose S bit, also S bit is chosen from r2, the rest may be inferred, S bit all can be chosen from each random number, these bits, by certain order one value of composition, namely be may determine that a corresponding numerical value by S bit selected in each random number, are designated as the first numerical value of corresponding random number at this.Specifically, first numerical value of corresponding random number r1 being designated as s1, first numerical value of corresponding random number r2 is designated as s2, the like, first numerical value of corresponding random number r8 is designated as s8.
In the process choosing S bit from each random number, the position of bit selected in each random number in r1, r2, r3 ..., r7, r8 is identical, put in order also identical, in r1, such as choose first bit, the 3rd bit position, then in the bit of other r2 to r8, also should choose first bit, the 3rd bit position.The first numerical value corresponding to r1, r2, r3 ..., r7, r8 is designated as s1, s2 ..., s8 successively.
And then correspondence random number r1, r2, r3 ..., the first numerical value s1 of r7, r8, s2 ..., s8 totally 8 numerical value are sued for peace, namely obtain s1+s2+ ...+s8's and value, obtained is called second value with value, by verifying it appeared that accessed second value meets Gauss distribution, described second value may determine that the random number into Gauss distribution.For whether a sequence meets Gauss distribution, those skilled in the art can adopt multiple method to be verified, and does not repeat them here.
Random number for above-mentioned accessed Gauss distribution, correction that those skilled in the art can be set according to the actual requirements and adjustment, such as can carry out suitable adjustment by moving right, adding the modes such as correction value, to meet concrete user demand.
Perform step S206, the random number of multiple Gauss distribution form gaussian random Number Sequence.
Produced by each clock cycle, multiple randoms number all can obtain the random number of a Gauss distribution, then after several clock cycle, can be obtained by the random number of multiple Gauss distribution, namely the random number of the plurality of Gauss distribution can form a gaussian random Number Sequence.
It should be noted that, in the present embodiment, illustrate for the linear feedback shift register of 20 bits and feedback term number for 8, in other embodiments, the linear feedback shift register of other figure place can also be adopted, the feedback term of other figure place can also be adopted according to practical situation, be not especially limited at this.
It should be noted that, in the present embodiment, produce according to step S201 to step S204 multiple random after, the random number with Gauss distribution is produced again according to step S205 and step S206, in other embodiments, multiple random number can also be obtained within the single cycle only with method similar for step S201 to step S204, and not be combined obtaining Gauss number to it.Those skilled in the art according to actually used demand, can obtain corresponding random number on the basis of the present embodiment.
The random digit generation method that the present embodiment provides, the speed producing random number can be effectively improved, multiple random number all can be produced within each single clock cycle, produced random number has equally distributed characteristic, and then, by according to the process to multiple randoms number, it is possible to obtain meeting the random number sequence of Gauss distribution, and the random number sequence of Gauss distribution can effectively reduce the dependency between each random number and periodicity.The method is simply effective.
Corresponding above-mentioned random digit generation method, the embodiment of the present invention also provides for a kind of generating random number device.
Fig. 5 is the structural representation of the generating random number device that the present embodiment provides.
As it is shown in figure 5, described device includes seed acquiring unit U11, feedback term acquiring unit U12 and random number acquiring unit U13.
Described seed acquiring unit U11, is used for obtaining random number seed.
Described feedback term acquiring unit U12, for the first operating result of the bit according to described random number seed, obtains the N number of feedback term for linear feedback shift register, and wherein, N is more than 1.
Described random number acquiring unit U13, for moving N position by described linear feedback shift register, to obtain N number of random number of corresponding described feedback term within the single clock cycle.
Described feedback term acquiring unit U12 includes first and chooses unit U121, feedback unit U122.
Described first chooses unit U121, for choosing M bit from described random number seed respectively.
Described feedback unit U122, determines each feedback term for linear feedback shift register for the first operating result according to M the bit chosen respectively in described random number seed.
Described device also includes assembled unit U14 and generates unit U15.
Described assembled unit U14, after getting N number of random number within the single clock cycle, is combined described N number of random number.
Described generation unit U15, for generating the random number of Gauss distribution.
Described assembled unit U14 includes second choosing unit U141, first determining that unit U142 and the second determines unit U143.
Described second chooses unit U141, for choosing S bit from each random number.
Described first determines unit U142, for S the bit that institute is selected from each random number is defined as the First ray of each random number of correspondence.
Described second determines unit U143, for the value summation of correspondence position in each First ray, obtaining the second sequence after sum operation.
Described device also includes retrieval unit U16, for being formed gaussian random Number Sequence by the random number of multiple Gauss distribution.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (15)
1. a random digit generation method, it is characterised in that including:
Obtain random number seed；
First operating result of the bit according to described random number seed, obtains the N number of feedback term for linear feedback shift register, and wherein, N is more than 1；
In the single clock cycle, described linear feedback shift register is moved N position, to obtain N number of random number of corresponding described feedback term.
2. random digit generation method as claimed in claim 1, it is characterised in that described first operation includes XOR or XNOR computing.
3. random digit generation method as claimed in claim 1, it is characterised in that described each feedback term for linear feedback shift register is determined by the first operating result of M the bit chosen respectively in described random number seed, and wherein, M is less than N.
4. random digit generation method as claimed in claim 1, it is characterised in that containing K feedback term in k-th random number in described N number of random number, the value of described K is less than or equal to N.
5. random digit generation method as claimed in claim 1, it is characterised in that also include: using the random number containing N number of feedback term as the random number seed generating random number next time.
6. random digit generation method as claimed in claim 1, it is characterised in that also include:
After getting N number of random number within the single clock cycle, described N number of random number is combined, to generate the random number of Gauss distribution.
7. random digit generation method as claimed in claim 6, it is characterised in that the process that described N number of random number is combined is included:
S bit is chosen from each random number；
The first numerical value of each random number corresponding is determined by S bit selected in each random number；
By each first numerical value summation, obtain the second value after sum operation.
8. random digit generation method as claimed in claim 7, it is characterised in that also include: described second value is defined as the random number of Gauss distribution.
9. random digit generation method as claimed in claim 7, it is characterised in that including: in the described process choosing S bit from each random number, the position of bit selected in each random number is identical.
10. random digit generation method as claimed in claim 6, it is characterised in that also include: formed gaussian random Number Sequence by the random number of multiple Gauss distribution.
11. a generating random number device, it is characterised in that including:
Seed acquiring unit, is used for obtaining random number seed；
Feedback term acquiring unit, for the first operating result of the bit according to described random number seed, obtains the N number of feedback term for linear feedback shift register, and wherein, N is more than 1；
Random number acquiring unit, for moving N position by described linear feedback shift register, to obtain N number of random number of corresponding described feedback term within the single clock cycle.
12. generating random number device as claimed in claim 11, it is characterised in that described feedback term acquiring unit includes:
First chooses unit, for choosing M bit from described random number seed respectively；
Feedback unit, determines each feedback term for linear feedback shift register for the first operating result according to M the bit chosen respectively in described random number seed.
13. generating random number device as claimed in claim 11, it is characterised in that also include:
Assembled unit, after getting N number of random number within the single clock cycle, is combined described N number of random number；
Generate unit, for generating the random number of Gauss distribution.
14. generating random number device as claimed in claim 13, it is characterised in that described assembled unit includes:
Second chooses unit, for choosing S bit from each random number；
First determines unit, for being determined the first numerical value of each random number corresponding by S bit selected in each random number；
Second determines unit, for each first numerical value summation, obtaining the second value after sum operation.
15. generating random number device as claimed in claim 13, it is characterised in that also include: retrieval unit, for being formed gaussian random Number Sequence by the random number of multiple Gauss distribution.
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