CN105721381A - FPGA realization method based on threshold vector circle-based OFDM peak-to-average power ratio reducing technique - Google Patents

FPGA realization method based on threshold vector circle-based OFDM peak-to-average power ratio reducing technique Download PDF

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CN105721381A
CN105721381A CN201610072747.7A CN201610072747A CN105721381A CN 105721381 A CN105721381 A CN 105721381A CN 201610072747 A CN201610072747 A CN 201610072747A CN 105721381 A CN105721381 A CN 105721381A
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theta
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CN105721381B (en
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王晶琦
吴青青
张春蕾
张霖泽
王栋
吴文
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Nanjing University of Science and Technology
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2614Peak power aspects
    • H04L27/2615Reduction thereof using coding

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Abstract

The invention discloses an FPGA realization method based on a threshold vector circle-based OFDM peak-to-average power ratio reducing technique. The FPGA hardware based on the threshold vector circle technique provided by the invention is realized through adoption of a lookup table method; the sampling values of adjusted constellation points are calculated in advance by MATLAB software and are stored in the ROM of an FPGA; and the data in the ROM is directly invoked according to enabling signals when the FPGA hardware is realized. According to the hardware realization method based on the lookup table method provided by the invention, the data in a lookup table is directly invoked; the hardware realization complexity is greatly reduced; the operation rate is improved; and the generated PAPR values of OFDM signals can be greatly reduced on the precise of satisfying the demand of a communication protocol for EVM indexes.

Description

The FPGA implementation method of technology is reduced based on threshold vector circle OFDM peak-to-average ratio
Technical field
The invention belongs to signal processing and field of wireless communications, specifically a kind of FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio.
Background technology
Developing rapidly so that data traffic requirement is constantly increased sharply of wireless communication technology, causes that frequency spectrum resource is day by day rare.The non-constant envelope signals of widely used high spectrum utilization in Modern Communication System.But this type of signal peak-to-average power is higher, it is further exacerbated by the contradiction between linearity of radio-frequency power amplifier and efficiency.How to effectively reduce signal peak-to-average ratio and become a big crucial problem in ofdm communication system.
Peak-to-average force ratio owing to reducing ofdm signal is significant to practical application, and current Chinese scholars has been achieved with numerous achievement in research, it is proposed to substantial amounts of algorithm, and these algorithms substantially can be divided three classes: pre-distortion signal class, encodes class, probability class.Pre-distortion signal class algorithm mainly adopts non-linear process to reduce PAPR value near the amplitude peak or valley of signal, it is the most also be the most simply, most popular peak-to-average force ratio reduction technology, but such algorithm reduces peak value essentially by introducing distorted signals, all can increase EVM.Owing to the index of EVM is proposed requirement by Modern Communication System agreement, therefore in systems in practice, it is necessary to effectively control the balance between peak-to-average force ratio and EVM value, reduce the peak-to-average force ratio of ofdm signal under meeting the communication protocol premise to EVM index request.
The advantages such as FPGA relies on fast operation, architecture and logical block utilization flexible, repeatable, integrated level height and construction cycle short, are widely used in Digital ASIC design.Therefore, the peak-to-average force ratio of ofdm signal is reduced technology by FPGA platform to realize, it is possible to more deep all kinds of peak-to-average force ratios of understanding reduce pluses and minuses and the scope of application of technology.
Summary of the invention
It is an object of the invention to provide the FPGA implementation method of a kind of ofdm signal peak-to-average force ratio reduction technology based on threshold vector circle.The method can apply to the communication system of any use OFDM transmission mode, it is possible under meeting the communication protocol premise to EVM index request, the peak-to-average ratio of generated ofdm signal is greatly reduced.
The technical scheme realizing the object of the invention is: a kind of FPGA implementation method based on threshold vector circle ofdm signal peak-to-average force ratio reduction technology, specifically comprises the following steps that
Step 1, the ofdm signal through direct amplitude limit is transformed into frequency domain, the frequency domain constellation point of each quadrant is defined an identical threshold vector radius of circle R;
Step 2, two tangent lines (L1, L2) justified through constellation coordinate initial point O picture threshold vector, and obtain the angle theta of tangent line L1 and x-axis1And the angle of tangent line L2 and x-axis is θ2, and θ12
Step 3, according to threshold vector radius of circle R, calculate in look-up table 1 and 2 constellation point value after the adjustment of storage in advance with MATLAB software;
Step 4, calculate each constellation point distance Distance to respective quadrants ideal constellation point, and whether judging distance Distance is more than threshold radius R;If Distance < R, then constellation point does not do any process;If Distance >=R, then assess the phase place Phase calculating this constellation point with the CORDIC in FPGA, then in two kinds of situation constellation point is adjusted;
Step 5, according to look-up table address label k with enable signal en and address look-up table 1 and 2, read corresponding storage value.
Compared with prior art, its remarkable advantage is the present invention:
(1) present invention ofdm signal peak-to-average force ratio reduce technology reduce peak-to-average force ratio simultaneously taken account of the communication system protocol index request to EVM, the PAPR value of generated ofdm signal under meeting the communication protocol premise to EVM index request, can be greatly reduced.
(2) the ofdm signal peak-to-average force ratio of the present invention reduces the method that the FPGA hardware of technology realizes have employed look-up table, the value of constellation point after adjustment is calculated in advance and is stored in the ROM of FPGA, the address of look-up table so can be first calculated when realizing, then the data in look-up table are directly invoked according to enable signal, multiplication and the division arithmetic of many consuming resources can be saved, enormously simplify hard-wired complexity, there is actual application value.
Accompanying drawing explanation
Fig. 1 is the FPGA hardware flowchart of the threshold vector circle technology of the present invention.
Fig. 2 is the schematic diagram of the threshold vector circle technology of the present invention.
In Fig. 2, O ' is the round heart of threshold vector, is also ideal constellation point position simultaneously;R is threshold vector radius of circle;O is rectangular axes intersection point;L1 and L2 is through O point and two tangent lines tangent with threshold vector circle;The point of contact that G1 and G2 respectively tangent line L1, L2 is round with threshold vector;θ1And θ2The respectively angle of tangent line L1, L2 and x-axis;A is the constellation point needing to adjust;B, C are two optional positions after A point adjusts, if the distance between A, B is less than the distance between A, C, then A point are adjusted to B point at 2 at 2, otherwise, adjust C point.
Fig. 3 is in the embodiment of the present invention 1 on FPGA hardware platform, reduces the time domain waveform of ofdm signal after peak-to-average force ratio and the comparison diagram of primary signal time domain waveform through threshold vector circle technology.
Fig. 4 is in the embodiment of the present invention 1 on FPGA hardware platform, the ofdm signal planisphere after direct amplitude limit.
Fig. 5 is in the embodiment of the present invention 1 on FPGA hardware platform, and the ofdm signal after direct amplitude limit uses threshold vector circle technology to reduce the planisphere after peak-to-average force ratio.
Fig. 6 is in the embodiment of the present invention 1 on FPGA hardware platform, and original OFDM signal reduces the CCDF curve of the ofdm signal after peak-to-average force ratio with utilization threshold vector circle technology.
Detailed description of the invention
The basic thought of threshold vector circle technology is to set planisphere threshold circle radius according to EVM index request, the amplitude of signal constellation point after amplitude limit and phase place are adjusted, constellation point is limited within the scope of threshold circle, thus ensureing that the ofdm signal after peak-to-average force ratio reduction processes still can meet the communication system index request to EVM.Constellation point, by adjusting amplitude and the phase place of frequency-region signal constellation point, is limited within the scope of threshold circle, such that it is able under meeting the communication protocol premise to EVM index request, the peak-to-average ratio of generated ofdm signal is greatly reduced by the present invention.It addition, the method adopting look-up table when hardware realizes, by computed in advance for the sampled value of constellation point after adjusting and be stored in the ROM of FPGA, then directly invoke data in ROM according to enabling signal, greatly reduce hard-wired complexity.
Below in conjunction with accompanying drawing, the present invention will be further described.
In conjunction with Fig. 1-6, the present invention reduces the FPGA implementation method of technology based on threshold vector circle ofdm signal peak-to-average force ratio, specifically comprises the following steps that
Step 1, by the original direct amplitude limit of ofdm signal, it is then passed through FFT computing and is transformed into frequency domain, the constellation point of the ofdm signal after direct amplitude limit is as shown in Figure 4, it can be seen that clipping operation causes serious inband distortion and out-of-band interference, its constellation point is dispersed in around ideal constellation point, the probability made mistakes when adding Demodulation Systems, calculating obtains, the EVM=12.63% of signal after direct amplitude limit, it is necessary to carry out EVM control.
Step 2, the frequency domain constellation point of the ofdm signal after direct amplitude limit is defined a threshold vector radius of circle R, for first quartile, as shown in Figure 2.
Step 3, two tangent lines (L1, L2) justified through constellation coordinate axle initial point O picture threshold vector, and obtain the angle theta of tangent line L1 and x-axis1And the angle of tangent line L2 and x-axis is θ2, and θ12, as shown in Figure 2.
Step 4, according to threshold vector radius of circle R, calculate in look-up table 1 and table 2 constellation point value after the adjustment of storage in advance with MATLAB software, circular is:
A1). according to radius R, calculate the angle theta between tangent line L1 and L2:
&theta; = &theta; 2 - &theta; 1 = ( &pi; 4 + a r c s i n R 2 ) - ( &pi; 4 - a r c s i n R 2 ) = 2 &CenterDot; a r c s i n R 2 - - - ( 1 )
A2). angle, θ is equally divided into 20 equal portions, obtains angle interval
A3). for the angle, θ of each equal portionsm1+ m Δ θ (m=0,1 ..., 19), calculate through O point and slope be tan θmTwo groups of intersection point (x of straight line and threshold circlem1,ym1) and (xm2,ym2):
x m 1 = i &CenterDot; ( 1 + k m ) + ( R 2 - i 2 ) &CenterDot; ( 1 + k m 2 ) + i 2 &CenterDot; 2 &CenterDot; k m 1 + k m 2 y m 1 = k m &CenterDot; x - - - ( 2 )
x m 2 = i &CenterDot; ( 1 + k m ) - ( R 2 - i 2 ) &CenterDot; ( 1 + k m 2 ) + i 2 &CenterDot; 2 &CenterDot; k m 1 + k m 2 y m 2 = k m &CenterDot; x - - - ( 3 )
Wherein, km=tan θm, i represents the coordinate figure of respective quadrants ideal constellation point, and value is 1 or-1.For four quadrants, amount to calculation and obtain 80 groups of sampled point (xm1,ym1) and 80 groups of (xm2,ym2) value;
Step 5, by above-mentioned steps a1-a3 calculate gained 80 groups of sampled point (xm1,ym1) and 80 groups of (xm2,ym2) value is stored in look-up table 1 and 2, storage mode particularly as follows:
For the point of first quartile and third quadrant, the coordinate figure (x that formula (2) is calculatedm1,ym1) to be stored respectively in table 1 address be the position of 0-19 and 40-59, the coordinate figure (x calculated by formula (3)m2,ym2) it is stored in table 2 same position place;For the point of the second quadrant and fourth quadrant, the coordinate figure (x that formula (2) is calculatedm1,ym1) to be stored respectively in table 1 address be the position of 20-39 and 60-79, the coordinate figure (x calculated by formula (3)m2,ym2) it is stored in table 2 same position place.
Real part (Re) and imaginary part (Im) value (R=0.109) after the circle technology constellation point adjustment of table 1 threshold vector
Real part (Re) and imaginary part (Im) value (R=0.109) after table 2 threshold vector circle technology constellation adjustment point
Step 6, calculate each constellation point distance Distance to respective quadrants ideal constellation point, and whether judging distance Distance is more than threshold radius R.If Distance < R, then constellation point does not do any process;If Distance >=R, then assess the phase place Phase calculating this constellation point with the CORDIC in FPGA, then in two kinds of situation constellation point be adjusted, as shown in flow chart 1:
B1). for phase place Phase [0, θ1] constellation point in scope, it is possible to directly adjust the G1 position, point of contact of tangent line L1 and threshold vector circle;In like manner can by phase place Phase at [θ2, pi/2) and point in scope adjusts the G2 place, point of contact of tangent line L2 and threshold circle.
B2). for phase place Phase at (θ12) constellation point in scope, it is assumed that its phase place is θn, then corresponding look-up table address label is:
k = &theta; - &theta; 1 &Delta; &theta; = &theta; - &theta; 1 &theta; 2 - &theta; 1 20 &ap; &theta; - &theta; 1 2 - 6
Meanwhile, the enable signal en of look-up table 1 and 2 is drawn high;
Step 7, the address label k obtained according to step 6 and enable signal en, read look-up table storage value, method particularly includes:
For the sampled point of first quartile and third quadrant, if its value of real part is more than xk1, then output storage value (xk1,yk1), otherwise output (xk2,yk2);For the sampled point of the second quadrant and fourth quadrant, if value of real part is less than xk1, then output storage value (xk1,yk1), otherwise output (xk2,yk2).Wherein, xk1Constellation point value of real part after the adjustment that in expression look-up table 1, address is corresponding when being k;
Below in conjunction with specific embodiment, the present invention will be further described.
Embodiment 1
Below in conjunction with specific embodiment, it is further elucidated with the present invention, it should be understood that this embodiment is merely to illustrate the present invention rather than restriction the scope of the present invention, after having read the present invention, the amendment of the various equivalent form of values of the present invention is all fallen within the application claims limited range by those skilled in the art.
The ofdm signal of the embodiment of the present invention is on FPGA hardware platform, generates based on IEEE802.11a PHY, and design parameter is: modulation system is QPSK;Data rate is 12Mbit/s;Adopt 1/2 convolutional encoding;Specifying according to IEEE802.11a PHY, when data rate is 12Mbit/s, transmitter can allow relative planisphere mistake EVM to be 10%;Sample frequency is 20MHz;It is 64 that FFT counts;Each OFDM symbol has 53 subcarriers, including 48 valid data, and 4 pilot tones and do not transmit the direct current subcarrier of symbol;The present embodiment have sent 95 OFDM symbol altogether;Threshold vector radius of circle R is set to 0.109.
As it is shown on figure 3, abscissa represents the sampled point of signal, for the ease of observing, figure takes 3 frame ofdm signals and has observed;Vertical coordinate is the normalization amplitude of signal, is normalized with the Amplitude maxima of original OFDM signal for benchmark;Dotted line represents the time domain beamformer of original OFDM signal;Solid line represents the time domain beamformer of the ofdm signal after threshold vector circle technology.It can be seen that after threshold vector circle technology, the peak value of ofdm signal obtains obvious reduction, through calculating, amplitude reduction is within the 78.46% of original signal amplitude maximum.
Fig. 4 represents ofdm signal planisphere after direct amplitude limit, can be seen that, clipping operation causes serious inband distortion and out-of-band interference, its constellation point is dispersed in around ideal constellation point, the probability made mistakes when adding Demodulation Systems, calculating obtains, the EVM=12.63% of clipping module, it is necessary to use threshold vector circle technology to carry out EVM control.
Fig. 5 represents the planisphere after the ofdm signal of direct amplitude limit uses threshold vector circle technology.It can be seen that through threshold vector circle technology after, signal constellation point is adjusted by threshold circle, namely from ideal constellation point closer to.It is obvious that EVM is controlled effectively.Calculating obtains, the EVM=9.17% of threshold vector circle module, meets 802.11a protocol requirement, and compared to clipping module, EVM reduces by 3.46%.
Fig. 6 represents original OFDM signal and the CCDF curve using threshold vector circle technology to reduce the ofdm signal after peak-to-average force ratio.Calculating obtains, and the peak-to-average force ratio of primary signal is 8.616dB, and after using threshold vector circle technology, the peak-to-average force ratio of ofdm signal is reduced to 6.766dB, reduces 1.85dB.
The Hardware Implementation of the threshold vector circle technology of the present invention is by calculating the sampled value MATLAB software of constellation point after adjustment in advance and be stored in the ROM of FPGA, the method of data in ROM is directly invoked according to enable signal when realizing, greatly reduce the complexity of computing when hardware realizes, improve arithmetic speed, the PAPR value of generated ofdm signal under meeting the communication protocol premise to EVM index request, can be greatly reduced simultaneously.

Claims (6)

1. the FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio, it is characterised in that comprise the following steps:
Step 1, the ofdm signal through direct amplitude limit is transformed into frequency domain, the frequency domain constellation point of each quadrant is defined an identical threshold vector radius of circle R;
Step 2, two tangent lines (L1, L2) justified through constellation coordinate initial point O picture threshold vector, and obtain the angle theta of tangent line L1 and x-axis1And the angle of tangent line L2 and x-axis is θ2, and θ12
Step 3, according to threshold vector radius of circle R, calculate in look-up table 1 and 2 constellation point value after the adjustment of storage in advance with MATLAB software;
Step 4, calculate each constellation point distance Distance to respective quadrants ideal constellation point, and whether judging distance Distance is more than threshold radius R;If Distance < R, then constellation point does not do any process;If Distance >=R, then assess the phase place Phase calculating this constellation point with the CORDIC in FPGA, then in two kinds of situation constellation point is adjusted;
Step 5, according to look-up table address label k with enable signal en and address look-up table 1 and 2, read corresponding storage value.
2. the FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio according to claim 1, it is characterised in that: described look-up table 1 and 2 is
Real part (Re) and imaginary part (Im) value (R=0.109) after the circle technology constellation point adjustment of table 1 threshold vector
Real part (Re) and imaginary part (Im) value (R=0.109) after table 2 threshold vector circle technology constellation adjustment point
Address Re Im Address Re Im Address Re Im Address Re Im 0 0.77 0.63 20 -0.63 0.77 40 0.63 -0.77 60 -0.77 -0.63 1 0.73 0.59 21 -0.59 0.73 41 0.59 -0.73 61 -0.73 -0.59 2 0.70 0.59 22 -0.59 0.70 42 0.59 -0.70 62 -0.70 -0.59 3 0.69 0.59 23 -0.59 0.69 43 0.59 -0.69 63 -0.69 -0.59 4 0.69 0.59 24 -0.59 0.69 44 0.59 -0.69 64 -0.69 -0.59 5 0.67 0.59 25 -0.59 0.67 45 0.59 -0.67 65 -0.67 -0.59 6 0.66 0.61 26 -0.61 0.66 46 0.61 -0.66 66 -0.66 -0.61 7 0.66 0.61 27 -0.61 0.66 47 0.61 -0.66 67 -0.66 -0.61 8 0.64 0.61 28 -0.61 0.64 48 0.61 -0.64 68 -0.64 -0.61 9 0.64 0.63 29 -0.63 0.64 49 0.63 -0.64 69 -0.64 -0.63 10 0.63 0.63 30 -0.63 0.63 50 0.63 -0.63 70 -0.63 -0.63 11 0.63 0.64 31 -0.64 0.63 51 0.64 -0.63 71 -0.63 -0.64 12 0.61 0.64 32 -0.64 0.61 52 0.64 -0.61 72 -0.61 -0.64 13 0.61 0.66 33 -0.66 0.61 53 0.66 -0.61 73 -0.61 -0.66 14 0.61 0.66 34 -0.66 0.61 54 0.66 -0.61 74 -0.61 -0.66 15 0.59 0.67 35 -0.67 0.59 55 0.67 -0.59 75 -0.59 -0.67 16 0.59 0.69 36 -0.69 0.59 56 0.69 -0.59 76 -0.59 -0.69 17 0.59 0.69 37 -0.69 0.59 57 0.69 -0.59 77 -0.59 -0.69 18 0.59 0.70 38 -0.70 0.59 58 0.70 -0.59 78 -0.59 -0.70 19 0.59 0.73 39 -0.73 0.59 59 0.73 -0.59 79 -0.59 -0.73
3. the FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio according to claim 1 and 2, it is characterised in that: constellation point value after the adjustment of storage in calculating look-up table 1 and 2 described in step 3 method particularly includes:
A1). according to threshold vector radius of circle R, calculate the angle theta between tangent line L1 and L2:
&theta; = &theta; 2 - &theta; 1 = ( &pi; 4 + arcsin R 2 ) - ( &pi; 4 - arcsin R 2 ) = 2 &CenterDot; arcsin R 2 - - - ( 1 )
A2). angle, θ is equally divided into 20 equal portions, obtains angle interval
A3). for the angle, θ of each equal portionsm1+ m Δ θ (m=0,1 ..., 19), calculate through O point and slope be tan θmTwo groups of intersection point (x of straight line and threshold circlem1,ym1) and (xm2,ym2):
x m 1 = i &CenterDot; ( 1 + k m ) + ( R 2 - i 2 ) &CenterDot; ( 1 + k m 2 ) + i 2 &CenterDot; 2 &CenterDot; k m 1 + k m 2 y m 1 = k m &CenterDot; x - - - ( 2 )
x m 2 = i &CenterDot; ( 1 + k m ) - ( R 2 - i 2 ) &CenterDot; ( 1 + k m 2 ) + i 2 &CenterDot; 2 &CenterDot; k m 1 + k m 2 y m 2 = k m &CenterDot; x - - - ( 3 )
Wherein, km=tan θm, i represents the coordinate figure of respective quadrants ideal constellation point, and value is 1 or-1, for four quadrants, amounts to calculation and obtains 80 groups of sampled point (xm1,ym1) and 80 groups of (xm2,ym2) value.
4. the FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio according to claim 3, it is characterised in that: above-mentioned steps a1-a3 is calculated 80 groups of sampled point (x of gainedm1,ym1) and 80 groups of (xm2,ym2) value is stored in look-up table 1 and 2, concrete storage mode is:
For the point of first quartile and third quadrant, the coordinate figure (x that formula (2) is calculatedm1,ym1) to be stored respectively in table 1 address be the position of 0-19 and 40-59, the coordinate figure (x calculated by formula (3)m2,ym2) it is stored in table 2 same position place;For the point of the second quadrant and fourth quadrant, the coordinate figure (x that formula (2) is calculatedm1,ym1) to be stored respectively in table 1 address be the position of 20-39 and 60-79, the coordinate figure (x calculated by formula (3)m2,ym2) it is stored in table 2 same position place.
5. the FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio according to claim 1, it is characterized in that: described in step 4: as Distance >=R, the phase place Phase calculating this constellation point is assessed with the CORDIC in FPGA, then in two kinds of situation constellation point being adjusted, concrete method of adjustment is:
B1). for phase place Phase [0, θ1] constellation point in scope, directly adjust the G1 position, point of contact of tangent line L1 and threshold vector circle;By phase place Phase at [θ2, pi/2) and point in scope adjusts the G2 place, point of contact of tangent line L2 and threshold circle;
B2). for phase place Phase at (θ12) constellation point in scope, it is assumed that its phase place is θn, then corresponding look-up table address label is:
k = &theta; - &theta; 1 &Delta; &theta; = &theta; - &theta; 1 &theta; 2 - &theta; 1 20 &ap; &theta; - &theta; 1 2 - 6
Meanwhile, the enable signal en of look-up table 1 and 2 is drawn high.
6. the FPGA implementation method reducing technology based on threshold vector circle ofdm signal peak-to-average force ratio according to claim 1, it is characterised in that: according to address label k and enable signal en described in step 5, read corresponding storage value in look-up table method particularly includes:
For the sampled point of first quartile and third quadrant, if its value of real part is more than xk1, then output storage value (xk1,yk1), otherwise output (xk2,yk2);For the sampled point of the second quadrant and fourth quadrant, if value of real part is less than xk1, then output storage value (xk1,yk1), otherwise output (xk2,yk2);Wherein, xk1Constellation point value of real part after the adjustment that in expression look-up table 1, address is corresponding when being k.
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CN108183880A (en) * 2018-01-09 2018-06-19 福建江夏学院 A kind of OFDM peak-to-average ratio suppressor based on amplitude limit joint constellation extension method
CN108183880B (en) * 2018-01-09 2020-12-18 福建江夏学院 OFDM peak-to-average power ratio suppressor based on amplitude limiting joint constellation expansion method
CN109347779A (en) * 2018-10-26 2019-02-15 西安电子科技大学 FPGA implementation method based on the threshold vector circle direct limiting technology of ofdm signal
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CN111800193A (en) * 2020-07-08 2020-10-20 北京邮电大学 Signal processing method and device based on multi-core few-mode optical fiber transmission

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